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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id o10-20020a05600002ca00b002bde1ef87d8si22933701wry.561.2023.01.18.23.03.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 23:03:38 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id DB35F3858032 for ; Thu, 19 Jan 2023 07:03:33 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbg151.qq.com (smtpbg151.qq.com [18.169.211.239]) by sourceware.org (Postfix) with ESMTPS id 8AABA3858D28 for ; Thu, 19 Jan 2023 07:03:08 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 8AABA3858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp69t1674111781tyof7l2k Received: from rios-cad5.localdomain ( [58.60.1.11]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 19 Jan 2023 15:03:00 +0800 (CST) X-QQ-SSF: 01400000000000E0L000000A0000000 X-QQ-FEAT: fmY4SgAPM3v+8b7exodiNGY7r0UoLNSnSeetQ31apUV4isWGMQsGQHJx8Qz1A 1qnSFgFLwWw3dpMsubq63nX2kkwm8zOukCNX7ljRnW8hmZhcHttvSFU5KWy7KEh9pgorPav ScAA3ao1FITGfHmz978Did1FybiW94ZEndZVwYJbh16m8i+noR85ooCl/Zvt7uKKhu6iOsX 076hUGkEh3EfSPPp2CuitL6NHI00RnHpakQsbH6wVGRR+DRiOFQck2/0OyjPhZpgrTkjiTO 1Jr0WtTprdDk9Rpccgo61OKES1pPGteMt+raTcSifa+FKmV5VebmdIWHMqDui/wRmpl0kcZ FU04hRn109SJKCKPt9zLr/ScJK0a0oivfRA2R9tof+zUMIW/gZCvmL5oSMPlwO58pBTls1M X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Fix pred_mov constraint for vle.v Date: Thu, 19 Jan 2023 15:02:58 +0800 Message-Id: <20230119070258.38936-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1755433474689196547?= X-GMAIL-MSGID: =?utf-8?q?1755433474689196547?= From: Ju-Zhe Zhong The original constraint is incorrect in pred_mov pattern. Take a look at Alternative 2, the operands[0] is "vr", operands[1] which is mask operand can be "vm". Such alternative matching will give the wrong codegen (vle.v v0,0(a5),v0.t) This is illegal according to RVV ISA. To fix this issue and not destroy the RA performance, fix this pattern in this patch. gcc/ChangeLog: * config/riscv/vector.md: Fix constraints. --- gcc/config/riscv/vector.md | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index 48414e200cf..e1173f2d5a6 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -633,22 +633,23 @@ ;; 2. (const_vector:VNx1SF repeat [ ;; (const_double:SF 0.0 [0x0.0p+0])]). (define_insn_and_split "@pred_mov" - [(set (match_operand:V 0 "nonimmediate_operand" "=vd, vr, m, vr, vr") - (if_then_else:V - (unspec: - [(match_operand: 1 "vector_mask_operand" "vmWc1, vmWc1, vmWc1, Wc1, Wc1") - (match_operand 4 "vector_length_operand" " rK, rK, rK, rK, rK") - (match_operand 5 "const_int_operand" " i, i, i, i, i") - (match_operand 6 "const_int_operand" " i, i, i, i, i") - (match_operand 7 "const_int_operand" " i, i, i, i, i") - (reg:SI VL_REGNUM) - (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE) - (match_operand:V 3 "vector_move_operand" " m, m, vr, vr, viWc0") - (match_operand:V 2 "vector_merge_operand" " 0, vu, vu, vu0, vu0")))] + [(set (match_operand:V 0 "nonimmediate_operand" "=vr, vr, vd, m, vr, vr") + (if_then_else:V + (unspec: + [(match_operand: 1 "vector_mask_operand" "vmWc1, Wc1, vm, vmWc1, Wc1, Wc1") + (match_operand 4 "vector_length_operand" " rK, rK, rK, rK, rK, rK") + (match_operand 5 "const_int_operand" " i, i, i, i, i, i") + (match_operand 6 "const_int_operand" " i, i, i, i, i, i") + (match_operand 7 "const_int_operand" " i, i, i, i, i, i") + (reg:SI VL_REGNUM) + (reg:SI VTYPE_REGNUM)] UNSPEC_VPREDICATE) + (match_operand:V 3 "vector_move_operand" " m, m, m, vr, vr, viWc0") + (match_operand:V 2 "vector_merge_operand" " 0, vu, vu, vu, vu0, vu0")))] "TARGET_VECTOR" "@ vle.v\t%0,%3%p1 - vle.v\t%0,%3%p1 + vle.v\t%0,%3 + vle.v\t%0,%3,%1.t vse.v\t%3,%0%p1 vmv.v.v\t%0,%3 vmv.v.i\t%0,%v3" @@ -657,7 +658,7 @@ && satisfies_constraint_vu (operands[2])" [(set (match_dup 0) (match_dup 3))] "" - [(set_attr "type" "vlde,vlde,vste,vimov,vimov") + [(set_attr "type" "vlde,vlde,vlde,vste,vimov,vimov") (set_attr "mode" "")]) ;; Dedicated pattern for vse.v instruction since we can't reuse pred_mov pattern to include