RISC-V: Remove dirty_pat since it is redundant

Message ID 20230109231059.154229-1-juzhe.zhong@rivai.ai
State Unresolved
Headers
Series RISC-V: Remove dirty_pat since it is redundant |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

juzhe.zhong@rivai.ai Jan. 9, 2023, 11:10 p.m. UTC
  From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/ChangeLog:

        * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
        (vector_insn_info::merge): Ditto.
        (vector_insn_info::dump): Ditto.
        (pass_vsetvl::merge_successors): Ditto.
        (pass_vsetvl::backward_demand_fusion): Ditto.
        (pass_vsetvl::forward_demand_fusion): Ditto.
        (pass_vsetvl::commit_vsetvls): Ditto.
        * config/riscv/riscv-vsetvl.h: Ditto.

---
 gcc/config/riscv/riscv-vsetvl.cc | 28 ++++++++++++----------------
 gcc/config/riscv/riscv-vsetvl.h  | 11 +----------
 2 files changed, 13 insertions(+), 26 deletions(-)
  

Comments

Kito Cheng Jan. 26, 2023, 7:16 p.m. UTC | #1
committed, thanks.

On Tue, Jan 10, 2023 at 7:11 AM <juzhe.zhong@rivai.ai> wrote:

> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==):
> Remove dirty_pat.
>         (vector_insn_info::merge): Ditto.
>         (vector_insn_info::dump): Ditto.
>         (pass_vsetvl::merge_successors): Ditto.
>         (pass_vsetvl::backward_demand_fusion): Ditto.
>         (pass_vsetvl::forward_demand_fusion): Ditto.
>         (pass_vsetvl::commit_vsetvls): Ditto.
>         * config/riscv/riscv-vsetvl.h: Ditto.
>
> ---
>  gcc/config/riscv/riscv-vsetvl.cc | 28 ++++++++++++----------------
>  gcc/config/riscv/riscv-vsetvl.h  | 11 +----------
>  2 files changed, 13 insertions(+), 26 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vsetvl.cc
> b/gcc/config/riscv/riscv-vsetvl.cc
> index 3c920779992..0f12d4ddb23 100644
> --- a/gcc/config/riscv/riscv-vsetvl.cc
> +++ b/gcc/config/riscv/riscv-vsetvl.cc
> @@ -1083,10 +1083,10 @@ vector_insn_info::operator== (const
> vector_insn_info &other) const
>      if (m_demands[i] != other.demand_p ((enum demand_type) i))
>        return false;
>
> -  if (m_insn != other.get_insn ())
> -    return false;
> -  if (m_dirty_pat != other.get_dirty_pat ())
> -    return false;
> +  if (vector_config_insn_p (m_insn->rtl ())
> +      || vector_config_insn_p (other.get_insn ()->rtl ()))
> +    if (m_insn != other.get_insn ())
> +      return false;
>
>    if (!same_avl_p (other))
>      return false;
> @@ -1317,8 +1317,6 @@ vector_insn_info::merge (const vector_insn_info
> &merge_info,
>         new_info.set_insn (merge_info.get_insn ());
>      }
>
> -  new_info.set_dirty_pat (merge_info.get_dirty_pat ());
> -
>    if (!demand_p (DEMAND_AVL) && !merge_info.demand_p (DEMAND_AVL))
>      new_info.undemand (DEMAND_AVL);
>    if (!demand_p (DEMAND_SEW) && !merge_info.demand_p (DEMAND_SEW))
> @@ -1431,11 +1429,6 @@ vector_insn_info::dump (FILE *file) const
>           fprintf (file, "The real INSN=");
>           print_rtl_single (file, get_insn ()->rtl ());
>         }
> -      if (get_dirty_pat ())
> -       {
> -         fprintf (file, "Dirty RTL Pattern=");
> -         print_rtl_single (file, get_dirty_pat ());
> -       }
>      }
>  }
>
> @@ -1967,7 +1960,6 @@ pass_vsetvl::merge_successors (const basic_block
> father,
>
>        new_info.set_dirty ();
>        rtx new_pat = gen_vsetvl_pat (new_info.get_insn ()->rtl (),
> new_info);
> -      new_info.set_dirty_pat (new_pat);
>
>        father_info.local_dem = new_info;
>        father_info.reaching_out = new_info;
> @@ -2051,7 +2043,6 @@ pass_vsetvl::backward_demand_fusion (void)
>
>                   block_info.reaching_out = prop;
>                   block_info.reaching_out.set_dirty ();
> -                 block_info.reaching_out.set_dirty_pat (new_pat);
>                   block_info.local_dem = block_info.reaching_out;
>                   changed_p = true;
>                 }
> @@ -2080,7 +2071,6 @@ pass_vsetvl::backward_demand_fusion (void)
>               rtx new_pat
>                 = gen_vsetvl_pat (new_info.get_insn ()->rtl (), new_info);
>               new_info.set_dirty ();
> -             new_info.set_dirty_pat (new_pat);
>               block_info.local_dem = new_info;
>               block_info.reaching_out = new_info;
>               changed_p = true;
> @@ -2178,7 +2168,6 @@ pass_vsetvl::forward_demand_fusion (void)
>                     = gen_vsetvl_pat (prop.get_insn ()->rtl (), prop);
>                   local_dem = prop;
>                   local_dem.set_dirty ();
> -                 local_dem.set_dirty_pat (dirty_pat);
>                   reaching_out = local_dem;
>                 }
>               else
> @@ -2507,10 +2496,17 @@ pass_vsetvl::commit_vsetvls (void)
>        if (!reaching_out.dirty_p ())
>         continue;
>
> -      rtx new_pat = reaching_out.get_dirty_pat ();
> +
> +      rtx new_pat;
>        if (can_refine_vsetvl_p (cfg_bb, reaching_out.get_ratio ()))
>         new_pat
>           = gen_vsetvl_pat (VSETVL_VTYPE_CHANGE_ONLY, reaching_out,
> NULL_RTX);
> +      else if (vlmax_avl_p (reaching_out.get_avl ()))
> +       new_pat = gen_vsetvl_pat (VSETVL_NORMAL, reaching_out,
> +                                 get_vl (reaching_out.get_insn ()->rtl
> ()));
> +      else
> +       new_pat
> +         = gen_vsetvl_pat (VSETVL_DISCARD_RESULT, reaching_out, NULL_RTX);
>
>        start_sequence ();
>        emit_insn (new_pat);
> diff --git a/gcc/config/riscv/riscv-vsetvl.h
> b/gcc/config/riscv/riscv-vsetvl.h
> index dc16c55b918..563ad3084ed 100644
> --- a/gcc/config/riscv/riscv-vsetvl.h
> +++ b/gcc/config/riscv/riscv-vsetvl.h
> @@ -220,13 +220,6 @@ private:
>       (with AVL included) before vmv.x.s, but vmv.x.s is not the INSN
> holding the
>       definition of AVL.  */
>    rtl_ssa::insn_info *m_insn;
> -  /* Save instruction pattern for Dirty block.
> -     Since empty block may be polluted as a dirty block during dem
> backward
> -     propagation (phase 3) which is intending to cheat LCM there is a
> VSETVL
> -     instruction here to gain better LCM optimization. Such instruction
> is not
> -     emit yet, we save this here and then emit it in the 4th phase if it
> is
> -     necessary.  */
> -  rtx m_dirty_pat;
>
>    /* Parse the instruction to get VL/VTYPE information and demanding
>     * information.  */
> @@ -243,7 +236,7 @@ private:
>  public:
>    vector_insn_info ()
>      : vl_vtype_info (), m_state (UNINITIALIZED), m_demands{false},
> -      m_insn (nullptr), m_dirty_pat (NULL_RTX)
> +      m_insn (nullptr)
>    {}
>
>    bool operator> (const vector_insn_info &) const;
> @@ -271,7 +264,6 @@ public:
>    void set_unknown () { m_state = UNKNOWN; }
>    void set_empty () { m_state = EMPTY; }
>    void set_dirty () { m_state = DIRTY; }
> -  void set_dirty_pat (rtx pat) { m_dirty_pat = pat; }
>    void set_insn (rtl_ssa::insn_info *insn) { m_insn = insn; }
>    void set_demand_info (const vector_insn_info &);
>
> @@ -287,7 +279,6 @@ public:
>    vector_insn_info merge (const vector_insn_info &, bool) const;
>
>    rtl_ssa::insn_info *get_insn () const { return m_insn; }
> -  rtx get_dirty_pat () const { return m_dirty_pat; }
>
>    void dump (FILE *) const;
>  };
> --
> 2.36.1
>
>
  

Patch

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 3c920779992..0f12d4ddb23 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -1083,10 +1083,10 @@  vector_insn_info::operator== (const vector_insn_info &other) const
     if (m_demands[i] != other.demand_p ((enum demand_type) i))
       return false;
 
-  if (m_insn != other.get_insn ())
-    return false;
-  if (m_dirty_pat != other.get_dirty_pat ())
-    return false;
+  if (vector_config_insn_p (m_insn->rtl ())
+      || vector_config_insn_p (other.get_insn ()->rtl ()))
+    if (m_insn != other.get_insn ())
+      return false;
 
   if (!same_avl_p (other))
     return false;
@@ -1317,8 +1317,6 @@  vector_insn_info::merge (const vector_insn_info &merge_info,
 	new_info.set_insn (merge_info.get_insn ());
     }
 
-  new_info.set_dirty_pat (merge_info.get_dirty_pat ());
-
   if (!demand_p (DEMAND_AVL) && !merge_info.demand_p (DEMAND_AVL))
     new_info.undemand (DEMAND_AVL);
   if (!demand_p (DEMAND_SEW) && !merge_info.demand_p (DEMAND_SEW))
@@ -1431,11 +1429,6 @@  vector_insn_info::dump (FILE *file) const
 	  fprintf (file, "The real INSN=");
 	  print_rtl_single (file, get_insn ()->rtl ());
 	}
-      if (get_dirty_pat ())
-	{
-	  fprintf (file, "Dirty RTL Pattern=");
-	  print_rtl_single (file, get_dirty_pat ());
-	}
     }
 }
 
@@ -1967,7 +1960,6 @@  pass_vsetvl::merge_successors (const basic_block father,
 
       new_info.set_dirty ();
       rtx new_pat = gen_vsetvl_pat (new_info.get_insn ()->rtl (), new_info);
-      new_info.set_dirty_pat (new_pat);
 
       father_info.local_dem = new_info;
       father_info.reaching_out = new_info;
@@ -2051,7 +2043,6 @@  pass_vsetvl::backward_demand_fusion (void)
 
 		  block_info.reaching_out = prop;
 		  block_info.reaching_out.set_dirty ();
-		  block_info.reaching_out.set_dirty_pat (new_pat);
 		  block_info.local_dem = block_info.reaching_out;
 		  changed_p = true;
 		}
@@ -2080,7 +2071,6 @@  pass_vsetvl::backward_demand_fusion (void)
 	      rtx new_pat
 		= gen_vsetvl_pat (new_info.get_insn ()->rtl (), new_info);
 	      new_info.set_dirty ();
-	      new_info.set_dirty_pat (new_pat);
 	      block_info.local_dem = new_info;
 	      block_info.reaching_out = new_info;
 	      changed_p = true;
@@ -2178,7 +2168,6 @@  pass_vsetvl::forward_demand_fusion (void)
 		    = gen_vsetvl_pat (prop.get_insn ()->rtl (), prop);
 		  local_dem = prop;
 		  local_dem.set_dirty ();
-		  local_dem.set_dirty_pat (dirty_pat);
 		  reaching_out = local_dem;
 		}
 	      else
@@ -2507,10 +2496,17 @@  pass_vsetvl::commit_vsetvls (void)
       if (!reaching_out.dirty_p ())
 	continue;
 
-      rtx new_pat = reaching_out.get_dirty_pat ();
+
+      rtx new_pat;
       if (can_refine_vsetvl_p (cfg_bb, reaching_out.get_ratio ()))
 	new_pat
 	  = gen_vsetvl_pat (VSETVL_VTYPE_CHANGE_ONLY, reaching_out, NULL_RTX);
+      else if (vlmax_avl_p (reaching_out.get_avl ()))
+	new_pat = gen_vsetvl_pat (VSETVL_NORMAL, reaching_out,
+				  get_vl (reaching_out.get_insn ()->rtl ()));
+      else
+	new_pat
+	  = gen_vsetvl_pat (VSETVL_DISCARD_RESULT, reaching_out, NULL_RTX);
 
       start_sequence ();
       emit_insn (new_pat);
diff --git a/gcc/config/riscv/riscv-vsetvl.h b/gcc/config/riscv/riscv-vsetvl.h
index dc16c55b918..563ad3084ed 100644
--- a/gcc/config/riscv/riscv-vsetvl.h
+++ b/gcc/config/riscv/riscv-vsetvl.h
@@ -220,13 +220,6 @@  private:
      (with AVL included) before vmv.x.s, but vmv.x.s is not the INSN holding the
      definition of AVL.  */
   rtl_ssa::insn_info *m_insn;
-  /* Save instruction pattern for Dirty block.
-     Since empty block may be polluted as a dirty block during dem backward
-     propagation (phase 3) which is intending to cheat LCM there is a VSETVL
-     instruction here to gain better LCM optimization. Such instruction is not
-     emit yet, we save this here and then emit it in the 4th phase if it is
-     necessary.  */
-  rtx m_dirty_pat;
 
   /* Parse the instruction to get VL/VTYPE information and demanding
    * information.  */
@@ -243,7 +236,7 @@  private:
 public:
   vector_insn_info ()
     : vl_vtype_info (), m_state (UNINITIALIZED), m_demands{false},
-      m_insn (nullptr), m_dirty_pat (NULL_RTX)
+      m_insn (nullptr)
   {}
 
   bool operator> (const vector_insn_info &) const;
@@ -271,7 +264,6 @@  public:
   void set_unknown () { m_state = UNKNOWN; }
   void set_empty () { m_state = EMPTY; }
   void set_dirty () { m_state = DIRTY; }
-  void set_dirty_pat (rtx pat) { m_dirty_pat = pat; }
   void set_insn (rtl_ssa::insn_info *insn) { m_insn = insn; }
   void set_demand_info (const vector_insn_info &);
 
@@ -287,7 +279,6 @@  public:
   vector_insn_info merge (const vector_insn_info &, bool) const;
 
   rtl_ssa::insn_info *get_insn () const { return m_insn; }
-  rtx get_dirty_pat () const { return m_dirty_pat; }
 
   void dump (FILE *) const;
 };