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[8.43.85.97]) by mx.google.com with ESMTPS id wz9-20020a170906fe4900b007adf38290f1si10418201ejb.642.2022.12.19.15.10.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Dec 2022 15:10:23 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E22093858417 for ; Mon, 19 Dec 2022 23:10:20 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) by sourceware.org (Postfix) with ESMTPS id 06EEF3858D28 for ; Mon, 19 Dec 2022 23:09:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 06EEF3858D28 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai X-QQ-mid: bizesmtp77t1671491379t2j0ci6v Received: from server1.localdomain ( [58.60.1.22]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 20 Dec 2022 07:09:37 +0800 (CST) X-QQ-SSF: 01400000002000E0K000B00A0000000 X-QQ-FEAT: 0laiA9+vjAA1G0hE22UORmxSBubvruvqMskn8U/4KFg5H7hwFDOSnA+z3ElMQ fPux16ZC+KRkQh3LGtQqTvdLylhTwZwD/sd9mOsZ4mxMWsffp5m8bVDV7+WeF8K0cW6UA9w ipVzLmOckHVG+MkN/ryh/wykWgcbh2SBstD1ISXs3vvdKx9dJzAOhvFTsmz7gIVHPAbEI9k EYhW6Dijg1aqhsQqpj36cUj2Bj0eo25z0z1FNcVoehX+9bc1MY+BNB04Bqx4AuhyZX5nMHl 3x6sGhIDzUhpgaiXZDmw6HfR2QMipO4g+JgWHnD6usX6WzZupmRwJfVOeEiht/9oN45IbpG e1khBWlVEAhiSA+d3XGvTeKxjo0LdklCd6gFkiTV/o2IB4lfcG6Gdi60+ojXQ== X-QQ-GoodBg: 2 From: juzhe.zhong@rivai.ai To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, palmer@dabbelt.com, jeffreyalaw@gmail.com, Ju-Zhe Zhong Subject: [PATCH] RISC-V: Fix muti-line condition format Date: Tue, 20 Dec 2022 07:09:35 +0800 Message-Id: <20221219230935.89797-1-juzhe.zhong@rivai.ai> X-Mailer: git-send-email 2.36.1 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvr:qybglogicsvr7 X-Spam-Status: No, score=-10.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_BARRACUDACENTRAL, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, TXREP, T_SPF_HELO_TEMPERROR autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752685790154351324?= X-GMAIL-MSGID: =?utf-8?q?1752685790154351324?= From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (vlmax_avl_insn_p): Fix multi-line conditional. (vsetvl_insn_p): Ditto. (same_bb_and_before_p): Ditto. (same_bb_and_after_or_equal_p): Ditto. --- gcc/config/riscv/riscv-vsetvl.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 3ca3fc15e5a..0c2ff630e96 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -112,8 +112,8 @@ vlmax_avl_p (rtx x) static bool vlmax_avl_insn_p (rtx_insn *rinsn) { - return INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi - || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi; + return (INSN_CODE (rinsn) == CODE_FOR_vlmax_avlsi + || INSN_CODE (rinsn) == CODE_FOR_vlmax_avldi); } static bool @@ -156,24 +156,24 @@ vector_config_insn_p (rtx_insn *rinsn) static bool vsetvl_insn_p (rtx_insn *rinsn) { - return INSN_CODE (rinsn) == CODE_FOR_vsetvldi - || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi; + return (INSN_CODE (rinsn) == CODE_FOR_vsetvldi + || INSN_CODE (rinsn) == CODE_FOR_vsetvlsi); } /* Return true if INSN1 comes befeore INSN2 in the same block. */ static bool same_bb_and_before_p (const insn_info *insn1, const insn_info *insn2) { - return (insn1->bb ()->index () == insn2->bb ()->index ()) - && (*insn1 < *insn2); + return ((insn1->bb ()->index () == insn2->bb ()->index ()) + && (*insn1 < *insn2)); } /* Return true if INSN1 comes after or equal INSN2 in the same block. */ static bool same_bb_and_after_or_equal_p (const insn_info *insn1, const insn_info *insn2) { - return (insn1->bb ()->index () == insn2->bb ()->index ()) - && (*insn1 >= *insn2); + return ((insn1->bb ()->index () == insn2->bb ()->index ()) + && (*insn1 >= *insn2)); } /* An "anticipatable occurrence" is one that is the first occurrence in the