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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id s24-20020a05640217d800b0046bf2cb7a3asi1342395edy.578.2022.12.06.00.07.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Dec 2022 00:07:15 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b="rSH/Dsjt"; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EF7A63947403 for ; Tue, 6 Dec 2022 08:07:13 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EF7A63947403 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1670314034; bh=jtqvc+41MpTkhqVxHnWE3smfv8Rfi+OXu1cydERAlYM=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=rSH/DsjtNSPGGuOgC/+6VthnV5y5wGP4qBH/dsmq4V9GgJ9/VDhXT1qBiL5WQFuo5 OlJeoN/0fzUCRciak2zs6WQEMkjVhVodyXbsGT/dGd0M/43z5cWwxNdZUvhZX82KmB SULlqsnj/BczeFJRZ+ZLCsbtHLQ6kBHVeDOXZU8k= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by sourceware.org (Postfix) with ESMTPS id C8F5F382E755 for ; Tue, 6 Dec 2022 08:06:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org C8F5F382E755 X-IronPort-AV: E=McAfee;i="6500,9779,10552"; a="318424796" X-IronPort-AV: E=Sophos;i="5.96,220,1665471600"; d="scan'208";a="318424796" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Dec 2022 00:06:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10552"; a="623812358" X-IronPort-AV: E=Sophos;i="5.96,220,1665471600"; d="scan'208";a="623812358" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by orsmga006.jf.intel.com with ESMTP; 06 Dec 2022 00:06:24 -0800 Received: from shliclel4051.sh.intel.com (shliclel4051.sh.intel.com [10.239.240.51]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 3104710056FA; Tue, 6 Dec 2022 16:06:23 +0800 (CST) To: gcc-patches@gcc.gnu.org Cc: crazylht@gmail.com, hjl.tools@gmail.com, ubizjak@gmail.com Subject: [PATCH] [x86] Fix ICE due to condition mismatch between expander and define_insn. Date: Tue, 6 Dec 2022 16:06:23 +0800 Message-Id: <20221206080623.1879920-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751451209786644449?= X-GMAIL-MSGID: =?utf-8?q?1751451209786644449?= ice.i:7:1: error: unrecognizable insn: 7 | } | ^ (insn 7 6 8 2 (set (reg:V2SF 84 [ vect__3.8 ]) (unspec:V2SF [ (reg:V2SF 86 [ vect__1.7 ]) (const_int 11 [0xb]) ] UNSPEC_ROUND)) "ice.i":5:14 -1 (nil)) during RTL pass: vregs Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. I checked other round patterns are ok, just typo in this one. Ready push to trunk as obvious patch. gcc/ChangeLog: PR target/107970 * config/i386/mmx.md (btruncv2sf2): Add TARGET_MMX_WITH_SSE to the condition. gcc/testsuite/ChangeLog: * gcc.target/i386/pr107970.c: New test. --- gcc/config/i386/mmx.md | 3 ++- gcc/testsuite/gcc.target/i386/pr107970.c | 10 ++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr107970.c diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 63aff287795..c3afc6b5846 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1709,7 +1709,8 @@ (define_expand "btruncv2sf2" [(match_operand:V2SF 1 "register_operand") (match_dup 2)] UNSPEC_ROUND))] - "TARGET_SSE4_1 && !flag_trapping_math" + "TARGET_SSE4_1 && !flag_trapping_math + && TARGET_MMX_WITH_SSE" "operands[2] = GEN_INT (ROUND_TRUNC | ROUND_NO_EXC);") (define_insn "*mmx_roundv2sf2" diff --git a/gcc/testsuite/gcc.target/i386/pr107970.c b/gcc/testsuite/gcc.target/i386/pr107970.c new file mode 100644 index 00000000000..1fbbb14ee72 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr107970.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target ia32 } } */ +/* { dg-options "-Ofast -m3dnow -msse4.1" } */ + +float *foo_p; + +void +foo(float *__restrict q) { + foo_p[0] = __builtin_truncf(q[0]); + foo_p[1] = __builtin_truncf(q[1]); +}