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Thu, 24 Nov 2022 09:17:06 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E376242041; Thu, 24 Nov 2022 09:17:05 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E22C84203F; Thu, 24 Nov 2022 09:17:04 +0000 (GMT) Received: from trout.aus.stglabs.ibm.com (unknown [9.40.194.100]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 24 Nov 2022 09:17:04 +0000 (GMT) To: gcc-patches@gcc.gnu.org Cc: Kewen Lin , segher@kernel.crashing.org, dje.gcc@gmail.com, bergner@linux.ibm.com, meissner@linux.ibm.com Subject: [PATCH 8/9] rs6000: Rework vector integer comparison in rs6000_emit_vector_compare - p4 Date: Thu, 24 Nov 2022 03:15:56 -0600 Message-Id: <20221124091557.514727-9-linkw@linux.ibm.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20221124091557.514727-1-linkw@linux.ibm.com> References: <20221124091557.514727-1-linkw@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: AjK7Q46A6r-mqBdw0xabqGAl9nQ5pRp8 X-Proofpoint-GUID: PhDCEgRvcIyifK2G-SrOb4MLPqOlILrL X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-24_05,2022-11-23_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 priorityscore=1501 spamscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 mlxscore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211240072 X-Spam-Status: No, score=-12.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Kewen Lin via Gcc-patches From: "Kewen.Lin" Reply-To: Kewen Lin Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750368816440066719?= X-GMAIL-MSGID: =?utf-8?q?1750368816440066719?= The current handlings in rs6000_emit_vector_compare is a bit complicated to me, especially after we emit vector float comparison insn with the given code directly. So it's better to refactor the handlings of vector integer comparison here. This is part 4, it's to rework the handlings on GE/GEU/LE/LEU, also make the function not recursive any more. This patch doesn't introduce any functionality change. gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_emit_vector_compare): Refine the handlings for operators GE/GEU/LE/LEU. --- gcc/config/rs6000/rs6000.cc | 87 ++++++++----------------------------- 1 file changed, 17 insertions(+), 70 deletions(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index b4ca7b3d1b1..a3645e321a7 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -15640,7 +15640,7 @@ output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn) } /* Emit vector compare for operands OP0 and OP1 using code RCODE. - DMODE is expected destination mode. This is a recursive function. */ + DMODE is expected destination mode. */ static rtx rs6000_emit_vector_compare (enum rtx_code rcode, @@ -15649,7 +15649,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode, { gcc_assert (VECTOR_UNIT_ALTIVEC_OR_VSX_P (dmode)); gcc_assert (GET_MODE (op0) == GET_MODE (op1)); - rtx mask; + rtx mask = gen_reg_rtx (dmode); /* In vector.md, we support all kinds of vector float point comparison operators in a comparison rtl pattern, we can @@ -15658,7 +15658,6 @@ rs6000_emit_vector_compare (enum rtx_code rcode, of raising invalid exception. */ if (GET_MODE_CLASS (dmode) == MODE_VECTOR_FLOAT) { - mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); return mask; } @@ -15667,11 +15666,7 @@ rs6000_emit_vector_compare (enum rtx_code rcode, have direct hardware instructions, just emit it directly here. */ if (rcode == EQ || rcode == GT || rcode == GTU) - { - mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); - return mask; - } + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (rcode, dmode, op0, op1))); else if (rcode == LT || rcode == LTU) { /* lt{,u}(a,b) = gt{,u}(b,a) */ @@ -15679,76 +15674,28 @@ rs6000_emit_vector_compare (enum rtx_code rcode, std::swap (op0, op1); mask = gen_reg_rtx (dmode); emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); - return mask; } - else if (rcode == NE) + else if (rcode == NE || rcode == LE || rcode == LEU) { - /* ne(a,b) = ~eq(a,b) */ + /* ne(a,b) = ~eq(a,b); le{,u}(a,b) = ~gt{,u}(a,b) */ + enum rtx_code code = reverse_condition (rcode); mask = gen_reg_rtx (dmode); - emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (EQ, dmode, op0, op1))); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); + enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); + gcc_assert (nor_code != CODE_FOR_nothing); + emit_insn (GEN_FCN (nor_code) (mask, mask)); + } else { + /* ge{,u}(a,b) = ~gt{,u}(b,a) */ + gcc_assert (rcode == GE || rcode == GEU); + enum rtx_code code = rcode == GE ? GT : GTU; + mask = gen_reg_rtx (dmode); + emit_insn (gen_rtx_SET (mask, gen_rtx_fmt_ee (code, dmode, op0, op1))); enum insn_code nor_code = optab_handler (one_cmpl_optab, dmode); gcc_assert (nor_code != CODE_FOR_nothing); emit_insn (GEN_FCN (nor_code) (mask, mask)); - return mask; - } - - switch (rcode) - { - case GE: - case GEU: - case LE: - case LEU: - /* Try GT/GTU/LT/LTU OR EQ */ - { - rtx c_rtx, eq_rtx; - enum insn_code ior_code; - enum rtx_code new_code; - - switch (rcode) - { - case GE: - new_code = GT; - break; - - case GEU: - new_code = GTU; - break; - - case LE: - new_code = LT; - break; - - case LEU: - new_code = LTU; - break; - - default: - gcc_unreachable (); - } - - ior_code = optab_handler (ior_optab, dmode); - if (ior_code == CODE_FOR_nothing) - return NULL_RTX; - - c_rtx = rs6000_emit_vector_compare (new_code, op0, op1, dmode); - if (!c_rtx) - return NULL_RTX; - - eq_rtx = rs6000_emit_vector_compare (EQ, op0, op1, dmode); - if (!eq_rtx) - return NULL_RTX; - - mask = gen_reg_rtx (dmode); - emit_insn (GEN_FCN (ior_code) (mask, c_rtx, eq_rtx)); - return mask; - } - break; - default: - return NULL_RTX; } - /* You only get two chances. */ - return NULL_RTX; + return mask; } /* Emit vector conditional expression. DEST is destination. OP_TRUE and