Message ID | 20221122094842.2629693-1-chenyixuan@iscas.ac.cn |
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State | Accepted |
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(unknown [27.16.214.61]) by APP-01 (Coremail) with SMTP id qwCowACXnDT9mnxjFprPAA--.7910S2; Tue, 22 Nov 2022 17:48:45 +0800 (CST) From: Yixuan Chen <chenyixuan@iscas.ac.cn> To: gcc-patches@gcc.gnu.org Cc: kito.cheng@gmail.com, andrew@sifive.com, oriachiuan@gmail.com, jiawei@iscas.ac.cn, Yixuan Chen <chenyixuan@iscas.ac.cn> Subject: [PATCH] Ver2: Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option. Date: Tue, 22 Nov 2022 17:48:42 +0800 Message-Id: <20221122094842.2629693-1-chenyixuan@iscas.ac.cn> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: qwCowACXnDT9mnxjFprPAA--.7910S2 X-Coremail-Antispam: 1UD129KBjvdXoWrtF1fXryfKr17JrWrAFy7Wrg_yoWfAwc_tF y7Grs7Jr4UAw48AFn5Zr48K3yFyw4DurySgFWfK3ZFqFyDXa90ya1kuas8AryUCrWjqFW3 Kr1SvrWayr9rKjkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJTRUUUbwkFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2IYs7xG 6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8w A2z4x0Y4vE2Ix0cI8IcVAFwI0_tr0E3s1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_ Gr1UM28EF7xvwVC2z280aVAFwI0_GcCE3s1l84ACjcxK6I8E87Iv6xkF7I0E14v26rxl6s 0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xII jxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr 1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7MxAIw28IcxkI7VAKI48J MxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwV AFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6xIIjxv2 0xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4 v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AK xVW8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUbrMaUUUUUU== X-Originating-IP: [27.16.214.61] X-CM-SenderInfo: xfkh05pl0xt046lvutnvoduhdfq/ X-Spam-Status: No, score=-13.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750189270795668404?= X-GMAIL-MSGID: =?utf-8?q?1750189270795668404?= |
Series |
Ver2: Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option.
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Checks
Context | Check | Description |
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snail/gcc-patch-check | success | Github commit url |
Commit Message
陈逸轩
Nov. 22, 2022, 9:48 a.m. UTC
gcc/testsuite/ChangeLog: Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option. 2022-11-22 Yixuan Chen <chenyixuan@iscas.ac.cn> * gcc.dg/pr106397.c: Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option. --- gcc/testsuite/gcc.dg/pr106397.c | 1 + 1 file changed, 1 insertion(+)
Comments
> Am 22.11.2022 um 10:49 schrieb Yixuan Chen <chenyixuan@iscas.ac.cn>: > > gcc/testsuite/ChangeLog: > > Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option. Ok. Richard > 2022-11-22 Yixuan Chen <chenyixuan@iscas.ac.cn> > > * gcc.dg/pr106397.c: Riscv don't support "-fprefetch-loop-arrays" option, add "-w" option. > --- > gcc/testsuite/gcc.dg/pr106397.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/gcc/testsuite/gcc.dg/pr106397.c b/gcc/testsuite/gcc.dg/pr106397.c > index 2bc17f8cf80..b0983b61dfc 100644 > --- a/gcc/testsuite/gcc.dg/pr106397.c > +++ b/gcc/testsuite/gcc.dg/pr106397.c > @@ -1,6 +1,7 @@ > /* { dg-do compile } */ > /* { dg-options "-O3 -fprefetch-loop-arrays --param l2-cache-size=0 --param prefetch-latency=3 -fprefetch-loop-arrays" } */ > /* { dg-additional-options "-march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ > +/* { dg-additional-options "-w" { target riscv*-*-* } } */ > > int > bar (void) > -- > 2.37.2 >
diff --git a/gcc/testsuite/gcc.dg/pr106397.c b/gcc/testsuite/gcc.dg/pr106397.c index 2bc17f8cf80..b0983b61dfc 100644 --- a/gcc/testsuite/gcc.dg/pr106397.c +++ b/gcc/testsuite/gcc.dg/pr106397.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O3 -fprefetch-loop-arrays --param l2-cache-size=0 --param prefetch-latency=3 -fprefetch-loop-arrays" } */ /* { dg-additional-options "-march=i686 -msse" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ +/* { dg-additional-options "-w" { target riscv*-*-* } } */ int bar (void)