[01/35] arm: improve vcreateq* tests

Message ID 20221117163809.1009526-2-andrea.corallo@arm.com
State Accepted
Headers
Series arm: rework MVE testsuite and rework backend where necessary (1st chunk) |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Andrea Corallo Nov. 17, 2022, 4:37 p.m. UTC
  gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test.
	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
---
 .../arm/mve/intrinsics/vcreateq_f16.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_f32.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_s16.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_s32.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_s64.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_s8.c          | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_u16.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_u32.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_u64.c         | 23 ++++++++++++++++++-
 .../arm/mve/intrinsics/vcreateq_u8.c          | 23 ++++++++++++++++++-
 10 files changed, 220 insertions(+), 10 deletions(-)
  

Comments

Kyrylo Tkachov Nov. 18, 2022, 9:47 a.m. UTC | #1
> -----Original Message-----
> From: Andrea Corallo <andrea.corallo@arm.com>
> Sent: Thursday, November 17, 2022 4:38 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com>; Richard Earnshaw
> <Richard.Earnshaw@arm.com>; Andrea Corallo <Andrea.Corallo@arm.com>
> Subject: [PATCH 01/35] arm: improve vcreateq* tests
> 
> gcc/testsuite/ChangeLog:
> 
> 	* gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise.
> 	* gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise.
> ---
>  .../arm/mve/intrinsics/vcreateq_f16.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_f32.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_s16.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_s32.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_s64.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_s8.c          | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_u16.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_u32.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_u64.c         | 23 ++++++++++++++++++-
>  .../arm/mve/intrinsics/vcreateq_u8.c          | 23 ++++++++++++++++++-
>  10 files changed, 220 insertions(+), 10 deletions(-)
> 
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> index fb3601edb94..c39303daa03 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
>  /* { dg-add-options arm_v8_1m_mve_fp } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...

Eventually I'd like to see these tests tightened to match more specific codegen for the tests that have only one intrinsic call in their body, but I appreciate the codegen for many of these is still immature and there are softfp/hard ABI differences as well.
This patch is definitely an improvement over what's there now though, so ok.
Thanks,
Kyrill

> +*/
>  float16x8_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_f16 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +float16x8_t
> +foo1 ()
> +{
> +  return vcreateq_f16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> index 4f4da62eed7..ad66f4407cd 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
>  /* { dg-add-options arm_v8_1m_mve_fp } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  float32x4_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_f32 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +float32x4_t
> +foo1 ()
> +{
> +  return vcreateq_f32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> index 103be6310bd..7e70a486513 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  int16x8_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_s16 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +int16x8_t
> +foo1 ()
> +{
> +  return vcreateq_s16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> index 96f7a972d93..ffcfc80ff40 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  int32x4_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_s32 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +int32x4_t
> +foo1 ()
> +{
> +  return vcreateq_s32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> index 74c554506c0..26642f9cd68 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  int64x2_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_s64 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +int64x2_t
> +foo1 ()
> +{
> +  return vcreateq_s64 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> index 03c50a0928a..7e7e4d5948d 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  int8x16_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_s8 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +int8x16_t
> +foo1 ()
> +{
> +  return vcreateq_s8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> index 411cec8471e..858a3a4546f 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  uint16x8_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_u16 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +uint16x8_t
> +foo1 ()
> +{
> +  return vcreateq_u16 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> index 8bc8f60640e..5f27cf68845 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  uint32x4_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_u32 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +uint32x4_t
> +foo1 ()
> +{
> +  return vcreateq_u32 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> index e74641c32f3..78553dec701 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  uint64x2_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_u64 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +uint64x2_t
> +foo1 ()
> +{
> +  return vcreateq_u64 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> index de79f471d63..4a8ab61f865 100644
> --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
> @@ -1,13 +1,34 @@
>  /* { dg-require-effective-target arm_v8_1m_mve_ok } */
>  /* { dg-add-options arm_v8_1m_mve } */
>  /* { dg-additional-options "-O2" } */
> +/* { dg-final { check-function-bodies "**" "" } } */
> 
>  #include "arm_mve.h"
> 
> +/*
> +**foo:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
>  uint8x16_t
>  foo (uint64_t a, uint64_t b)
>  {
>    return vcreateq_u8 (a, b);
>  }
> 
> -/* { dg-final { scan-assembler "vmov"  }  } */
> +/*
> +**foo1:
> +**	...
> +**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
> +**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
> +**	...
> +*/
> +uint8x16_t
> +foo1 ()
> +{
> +  return vcreateq_u8 (1, 1);
> +}
> +
> +/* { dg-final { scan-assembler-not "__ARM_undef" } } */
> \ No newline at end of file
> --
> 2.25.1
  

Patch

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
index fb3601edb94..c39303daa03 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 float16x8_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_f16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+float16x8_t
+foo1 ()
+{
+  return vcreateq_f16 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
index 4f4da62eed7..ad66f4407cd 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
 /* { dg-add-options arm_v8_1m_mve_fp } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 float32x4_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_f32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+float32x4_t
+foo1 ()
+{
+  return vcreateq_f32 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
index 103be6310bd..7e70a486513 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 int16x8_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_s16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+int16x8_t
+foo1 ()
+{
+  return vcreateq_s16 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
index 96f7a972d93..ffcfc80ff40 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 int32x4_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_s32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+int32x4_t
+foo1 ()
+{
+  return vcreateq_s32 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
index 74c554506c0..26642f9cd68 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 int64x2_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_s64 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+int64x2_t
+foo1 ()
+{
+  return vcreateq_s64 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
index 03c50a0928a..7e7e4d5948d 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 int8x16_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_s8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+int8x16_t
+foo1 ()
+{
+  return vcreateq_s8 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
index 411cec8471e..858a3a4546f 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 uint16x8_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_u16 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+uint16x8_t
+foo1 ()
+{
+  return vcreateq_u16 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
index 8bc8f60640e..5f27cf68845 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 uint32x4_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_u32 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+uint32x4_t
+foo1 ()
+{
+  return vcreateq_u32 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
index e74641c32f3..78553dec701 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 uint64x2_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_u64 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+uint64x2_t
+foo1 ()
+{
+  return vcreateq_u64 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
index de79f471d63..4a8ab61f865 100644
--- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c
@@ -1,13 +1,34 @@ 
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
 uint8x16_t
 foo (uint64_t a, uint64_t b)
 {
   return vcreateq_u8 (a, b);
 }
 
-/* { dg-final { scan-assembler "vmov"  }  } */
+/*
+**foo1:
+**	...
+**	vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+]
+**	vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+]
+**	...
+*/
+uint8x16_t
+foo1 ()
+{
+  return vcreateq_u8 (1, 1);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file