[v2,4/4] LoongArch: Add flogb.{s, d} instructions and expand logb{sf, df}2
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Commit Message
On LoongArch, flogb instructions extract the exponent of a non-negative
floating point value, but produces NaN for negative values. So we need
to add a fabs instruction when we expand logb.
gcc/ChangeLog:
* config/loongarch/loongarch.md (UNSPEC_FLOGB): New unspec.
(type): Add flogb.
(logb_non_negative<mode>2): New instruction template.
(logb<mode>2): New define_expand.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/flogb.c: New test.
---
gcc/config/loongarch/loongarch.md | 35 ++++++++++++++++++++--
gcc/testsuite/gcc.target/loongarch/flogb.c | 18 +++++++++++
2 files changed, 51 insertions(+), 2 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/flogb.c
Comments
LGTM!
Thanks.
在 2022/11/9 下午9:53, Xi Ruoyao 写道:
> On LoongArch, flogb instructions extract the exponent of a non-negative
> floating point value, but produces NaN for negative values. So we need
> to add a fabs instruction when we expand logb.
>
> gcc/ChangeLog:
>
> * config/loongarch/loongarch.md (UNSPEC_FLOGB): New unspec.
> (type): Add flogb.
> (logb_non_negative<mode>2): New instruction template.
> (logb<mode>2): New define_expand.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/loongarch/flogb.c: New test.
> ---
> gcc/config/loongarch/loongarch.md | 35 ++++++++++++++++++++--
> gcc/testsuite/gcc.target/loongarch/flogb.c | 18 +++++++++++
> 2 files changed, 51 insertions(+), 2 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/loongarch/flogb.c
>
> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
> index c141c9adde2..682ab961741 100644
> --- a/gcc/config/loongarch/loongarch.md
> +++ b/gcc/config/loongarch/loongarch.md
> @@ -42,6 +42,7 @@ (define_c_enum "unspec" [
> UNSPEC_FTINTRM
> UNSPEC_FTINTRP
> UNSPEC_FSCALEB
> + UNSPEC_FLOGB
>
> ;; Override return address for exception handling.
> UNSPEC_EH_RETURN
> @@ -217,6 +218,7 @@ (define_attr "qword_mode" "no,yes"
> ;; fdiv floating point divide
> ;; frdiv floating point reciprocal divide
> ;; fabs floating point absolute value
> +;; flogb floating point exponent extract
> ;; fneg floating point negation
> ;; fcmp floating point compare
> ;; fcopysign floating point copysign
> @@ -233,8 +235,8 @@ (define_attr "type"
> "unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,
> prefetch,prefetchx,condmove,mgtf,mftg,const,arith,logical,
> shift,slt,signext,clz,trap,imul,idiv,move,
> - fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcopysign,fcvt,fscaleb,
> - fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost"
> + fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,flogb,fneg,fcmp,fcopysign,fcvt,
> + fscaleb,fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost"
> (cond [(eq_attr "jirl" "!unset") (const_string "call")
> (eq_attr "got" "load") (const_string "load")
>
> @@ -1039,6 +1041,35 @@ (define_insn "ldexp<mode>3"
> (set_attr "mode" "<UNITMODE>")])
>
> ;;
> +;; ....................
> +;;
> +;; FLOATING POINT EXPONENT EXTRACT
> +;;
> +;; ....................
> +
> +(define_insn "logb_non_negative<mode>2"
> + [(set (match_operand:ANYF 0 "register_operand" "=f")
> + (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")]
> + UNSPEC_FLOGB))]
> + "TARGET_HARD_FLOAT"
> + "flogb.<fmt>\t%0,%1"
> + [(set_attr "type" "flogb")
> + (set_attr "mode" "<UNITMODE>")])
> +
> +(define_expand "logb<mode>2"
> + [(set (match_operand:ANYF 0 "register_operand")
> + (unspec:ANYF [(abs:ANYF (match_operand:ANYF 1 "register_operand"))]
> + UNSPEC_FLOGB))]
> + "TARGET_HARD_FLOAT"
> +{
> + rtx tmp = gen_reg_rtx (<MODE>mode);
> +
> + emit_insn (gen_abs<mode>2 (tmp, operands[1]));
> + emit_insn (gen_logb_non_negative<mode>2 (operands[0], tmp));
> + DONE;
> +})
> +
> +;;
> ;; ...................
> ;;
> ;; Count leading zeroes.
> diff --git a/gcc/testsuite/gcc.target/loongarch/flogb.c b/gcc/testsuite/gcc.target/loongarch/flogb.c
> new file mode 100644
> index 00000000000..1daefe54e13
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/loongarch/flogb.c
> @@ -0,0 +1,18 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mdouble-float -fno-math-errno" } */
> +/* { dg-final { scan-assembler "fabs\\.s" } } */
> +/* { dg-final { scan-assembler "fabs\\.d" } } */
> +/* { dg-final { scan-assembler "flogb\\.s" } } */
> +/* { dg-final { scan-assembler "flogb\\.d" } } */
> +
> +double
> +my_logb (double a)
> +{
> + return __builtin_logb (a);
> +}
> +
> +float
> +my_logbf (float a)
> +{
> + return __builtin_logbf (a);
> +}
@@ -42,6 +42,7 @@ (define_c_enum "unspec" [
UNSPEC_FTINTRM
UNSPEC_FTINTRP
UNSPEC_FSCALEB
+ UNSPEC_FLOGB
;; Override return address for exception handling.
UNSPEC_EH_RETURN
@@ -217,6 +218,7 @@ (define_attr "qword_mode" "no,yes"
;; fdiv floating point divide
;; frdiv floating point reciprocal divide
;; fabs floating point absolute value
+;; flogb floating point exponent extract
;; fneg floating point negation
;; fcmp floating point compare
;; fcopysign floating point copysign
@@ -233,8 +235,8 @@ (define_attr "type"
"unknown,branch,jump,call,load,fpload,fpidxload,store,fpstore,fpidxstore,
prefetch,prefetchx,condmove,mgtf,mftg,const,arith,logical,
shift,slt,signext,clz,trap,imul,idiv,move,
- fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,fneg,fcmp,fcopysign,fcvt,fscaleb,
- fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost"
+ fmove,fadd,fmul,fmadd,fdiv,frdiv,fabs,flogb,fneg,fcmp,fcopysign,fcvt,
+ fscaleb,fsqrt,frsqrt,accext,accmod,multi,atomic,syncloop,nop,ghost"
(cond [(eq_attr "jirl" "!unset") (const_string "call")
(eq_attr "got" "load") (const_string "load")
@@ -1039,6 +1041,35 @@ (define_insn "ldexp<mode>3"
(set_attr "mode" "<UNITMODE>")])
;;
+;; ....................
+;;
+;; FLOATING POINT EXPONENT EXTRACT
+;;
+;; ....................
+
+(define_insn "logb_non_negative<mode>2"
+ [(set (match_operand:ANYF 0 "register_operand" "=f")
+ (unspec:ANYF [(match_operand:ANYF 1 "register_operand" "f")]
+ UNSPEC_FLOGB))]
+ "TARGET_HARD_FLOAT"
+ "flogb.<fmt>\t%0,%1"
+ [(set_attr "type" "flogb")
+ (set_attr "mode" "<UNITMODE>")])
+
+(define_expand "logb<mode>2"
+ [(set (match_operand:ANYF 0 "register_operand")
+ (unspec:ANYF [(abs:ANYF (match_operand:ANYF 1 "register_operand"))]
+ UNSPEC_FLOGB))]
+ "TARGET_HARD_FLOAT"
+{
+ rtx tmp = gen_reg_rtx (<MODE>mode);
+
+ emit_insn (gen_abs<mode>2 (tmp, operands[1]));
+ emit_insn (gen_logb_non_negative<mode>2 (operands[0], tmp));
+ DONE;
+})
+
+;;
;; ...................
;;
;; Count leading zeroes.
new file mode 100644
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-mdouble-float -fno-math-errno" } */
+/* { dg-final { scan-assembler "fabs\\.s" } } */
+/* { dg-final { scan-assembler "fabs\\.d" } } */
+/* { dg-final { scan-assembler "flogb\\.s" } } */
+/* { dg-final { scan-assembler "flogb\\.d" } } */
+
+double
+my_logb (double a)
+{
+ return __builtin_logb (a);
+}
+
+float
+my_logbf (float a)
+{
+ return __builtin_logbf (a);
+}