[2/4] LoongArch: Add ftint{,rm,rp}.{w,l}.{s,d} instructions

Message ID 20221109072147.789090-3-xry111@xry111.site
State Accepted
Headers
Series LoongArch: Add some floating-point operations |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

Xi Ruoyao Nov. 9, 2022, 7:21 a.m. UTC
  This allows to optimize the following builtins if -fno-math-errno:

- __builtin_lrint{,f}
- __builtin_lfloor{,f}
- __builtin_lceil{,f}

Inspired by
https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605287.html.

ANYFI is added so the compiler won't try ftint.l.s if -mfpu=32.  If we
simply used GPR here an ICE would be triggered with __builtin_lrintf
and -mfpu=32.

Note that the .w.{s,d} variants are not tested because we don't support
ILP32 for now.

gcc/ChangeLog:

	* config/loongarch/loongarch.md (UNSPEC_FTINT): New unspec.
	(UNSPEC_FTINTRM): Likewise.
	(UNSPEC_FTINTRP): Likewise.
	(LRINT): New define_int_iterator.
	(lrint_pattern): New define_int_attr.
	(lrint_submenmonic): Likewise.
	(ANYFI): New define_mode_iterator.
	(lrint<ANYF><ANYFI>): New instruction template.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/ftint.c: New test.
---
 gcc/config/loongarch/loongarch.md          | 28 ++++++++++++++
 gcc/testsuite/gcc.target/loongarch/ftint.c | 44 ++++++++++++++++++++++
 2 files changed, 72 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint.c
  

Comments

chenglulu Nov. 9, 2022, 7:46 a.m. UTC | #1
There is a paragraph in the explanation information for the compile 
parameter '-fno-fp-int-builtin-inexact' in the gcc.pdf document:

     "Do not allow the built-in functions ceil, floor, round and trunc, 
and their float and long double variants,

     to generate code that raises the “inexact” floating-point exception 
for noninteger arguments.

     ISO C99 and C11 allow these functions to raise the “inexact” 
exception, but ISO/IEC TS 18661-1:2014,

     the C bindings to IEEE 754-2008, as integrated into ISO C2X, does 
not allow these functions to do so."

So I think the implementation of these functions needs to be confirmed 
again.

Or am I misinterpreting this description?:-[


在 2022/11/9 下午3:21, Xi Ruoyao 写道:
> This allows to optimize the following builtins if -fno-math-errno:
>
> - __builtin_lrint{,f}
> - __builtin_lfloor{,f}
> - __builtin_lceil{,f}
>
> Inspired by
> https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605287.html.
>
> ANYFI is added so the compiler won't try ftint.l.s if -mfpu=32.  If we
> simply used GPR here an ICE would be triggered with __builtin_lrintf
> and -mfpu=32.
>
> Note that the .w.{s,d} variants are not tested because we don't support
> ILP32 for now.
>
> gcc/ChangeLog:
>
> 	* config/loongarch/loongarch.md (UNSPEC_FTINT): New unspec.
> 	(UNSPEC_FTINTRM): Likewise.
> 	(UNSPEC_FTINTRP): Likewise.
> 	(LRINT): New define_int_iterator.
> 	(lrint_pattern): New define_int_attr.
> 	(lrint_submenmonic): Likewise.
> 	(ANYFI): New define_mode_iterator.
> 	(lrint<ANYF><ANYFI>): New instruction template.
>
> gcc/testsuite/ChangeLog:
>
> 	* gcc.target/loongarch/ftint.c: New test.
> ---
>   gcc/config/loongarch/loongarch.md          | 28 ++++++++++++++
>   gcc/testsuite/gcc.target/loongarch/ftint.c | 44 ++++++++++++++++++++++
>   2 files changed, 72 insertions(+)
>   create mode 100644 gcc/testsuite/gcc.target/loongarch/ftint.c
>
> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
> index a14ab14ac24..35cef272060 100644
> --- a/gcc/config/loongarch/loongarch.md
> +++ b/gcc/config/loongarch/loongarch.md
> @@ -38,6 +38,9 @@ (define_c_enum "unspec" [
>     UNSPEC_FMAX
>     UNSPEC_FMIN
>     UNSPEC_FCOPYSIGN
> +  UNSPEC_FTINT
> +  UNSPEC_FTINTRM
> +  UNSPEC_FTINTRP
>   
>     ;; Override return address for exception handling.
>     UNSPEC_EH_RETURN
> @@ -374,6 +377,11 @@ (define_mode_iterator QHWD [QI HI SI (DI "TARGET_64BIT")])
>   (define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT")
>   			    (DF "TARGET_DOUBLE_FLOAT")])
>   
> +;; Iterator for fixed-point modes which can be hold by a hardware
> +;; floating-point register.
> +(define_mode_iterator ANYFI [(SI "TARGET_HARD_FLOAT")
> +			     (DI "TARGET_DOUBLE_FLOAT")])
> +
>   ;; A mode for which moves involving FPRs may need to be split.
>   (define_mode_iterator SPLITF
>     [(DF "!TARGET_64BIT && TARGET_DOUBLE_FLOAT")
> @@ -515,6 +523,16 @@ (define_code_attr fcond [(unordered "cun")
>   (define_code_attr sel [(eq "masknez") (ne "maskeqz")])
>   (define_code_attr selinv [(eq "maskeqz") (ne "masknez")])
>   
> +;; Iterator and attributes for floating-point to fixed-point conversion
> +;; instructions.
> +(define_int_iterator LRINT [UNSPEC_FTINT UNSPEC_FTINTRM UNSPEC_FTINTRP])
> +(define_int_attr lrint_pattern [(UNSPEC_FTINT "lrint")
> +				(UNSPEC_FTINTRM "lfloor")
> +				(UNSPEC_FTINTRP "lceil")])
> +(define_int_attr lrint_submenmonic [(UNSPEC_FTINT "")
> +				    (UNSPEC_FTINTRM "rm")
> +				    (UNSPEC_FTINTRP "rp")])
> +
>   ;;
>   ;;  ....................
>   ;;
> @@ -2022,6 +2040,16 @@ (define_insn "rint<mode>2"
>     [(set_attr "type" "fcvt")
>      (set_attr "mode" "<MODE>")])
>   
> +;; Convert floating-point numbers to integers
> +(define_insn "<lrint_pattern><ANYF:mode><ANYFI:mode>2"
> +  [(set (match_operand:ANYFI 0 "register_operand" "=f")
> +	(unspec:ANYFI [(match_operand:ANYF 1 "register_operand" "f")]
> +		      LRINT))]
> +  "TARGET_HARD_FLOAT"
> +  "ftint<lrint_submenmonic>.<ANYFI:ifmt>.<ANYF:fmt> %0,%1"
> +  [(set_attr "type" "fcvt")
> +   (set_attr "mode" "<ANYF:MODE>")])
> +
>   ;; Load the low word of operand 0 with operand 1.
>   (define_insn "load_low<mode>"
>     [(set (match_operand:SPLITF 0 "register_operand" "=f,f")
> diff --git a/gcc/testsuite/gcc.target/loongarch/ftint.c b/gcc/testsuite/gcc.target/loongarch/ftint.c
> new file mode 100644
> index 00000000000..9c3c3a8a756
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/loongarch/ftint.c
> @@ -0,0 +1,44 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno" } */
> +/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */
> +/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */
> +/* { dg-final { scan-assembler "ftintrm\\.l\\.s" } } */
> +/* { dg-final { scan-assembler "ftintrm\\.l\\.d" } } */
> +/* { dg-final { scan-assembler "ftintrp\\.l\\.s" } } */
> +/* { dg-final { scan-assembler "ftintrp\\.l\\.d" } } */
> +
> +long
> +my_lrint (double a)
> +{
> +  return __builtin_lrint (a);
> +}
> +
> +long
> +my_lrintf (float a)
> +{
> +  return __builtin_lrintf (a);
> +}
> +
> +long
> +my_lfloor (double a)
> +{
> +  return __builtin_lfloor (a);
> +}
> +
> +long
> +my_lfloorf (float a)
> +{
> +  return __builtin_lfloorf (a);
> +}
> +
> +long
> +my_lceil (double a)
> +{
> +  return __builtin_lceil (a);
> +}
> +
> +long
> +my_lceilf (float a)
> +{
> +  return __builtin_lceilf (a);
> +}
  
Xi Ruoyao Nov. 9, 2022, 8:14 a.m. UTC | #2
On Wed, 2022-11-09 at 15:46 +0800, Lulu Cheng wrote:
> There is a paragraph in the explanation information for the compile 
> parameter '-fno-fp-int-builtin-inexact' in the gcc.pdf document:
> 
>      "Do not allow the built-in functions ceil, floor, round and
> trunc, 
> and their float and long double variants,
> 
>      to generate code that raises the “inexact” floating-point
> exception 
> for noninteger arguments.
> 
>      ISO C99 and C11 allow these functions to raise the “inexact” 
> exception, but ISO/IEC TS 18661-1:2014,
> 
>      the C bindings to IEEE 754-2008, as integrated into ISO C2X, does
> not allow these functions to do so."
> 
> So I think the implementation of these functions needs to be confirmed
> again.
> 
> Or am I misinterpreting this description?:-[

You are correct, I'm wrong :(.

This patch breaks:

long x(double d)
{
	return __builtin_ceil(d);
}

The compiler then folds it into __builtin_lceil and produce
ftintrp.l.d $f0,$f0, even if -fno-fp-int-builtin-inexact is used.

I'll revise this patch to limit lceil and lfloor for -ffp-int-builtin-
inexact only.
  

Patch

diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
index a14ab14ac24..35cef272060 100644
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -38,6 +38,9 @@  (define_c_enum "unspec" [
   UNSPEC_FMAX
   UNSPEC_FMIN
   UNSPEC_FCOPYSIGN
+  UNSPEC_FTINT
+  UNSPEC_FTINTRM
+  UNSPEC_FTINTRP
 
   ;; Override return address for exception handling.
   UNSPEC_EH_RETURN
@@ -374,6 +377,11 @@  (define_mode_iterator QHWD [QI HI SI (DI "TARGET_64BIT")])
 (define_mode_iterator ANYF [(SF "TARGET_HARD_FLOAT")
 			    (DF "TARGET_DOUBLE_FLOAT")])
 
+;; Iterator for fixed-point modes which can be hold by a hardware
+;; floating-point register.
+(define_mode_iterator ANYFI [(SI "TARGET_HARD_FLOAT")
+			     (DI "TARGET_DOUBLE_FLOAT")])
+
 ;; A mode for which moves involving FPRs may need to be split.
 (define_mode_iterator SPLITF
   [(DF "!TARGET_64BIT && TARGET_DOUBLE_FLOAT")
@@ -515,6 +523,16 @@  (define_code_attr fcond [(unordered "cun")
 (define_code_attr sel [(eq "masknez") (ne "maskeqz")])
 (define_code_attr selinv [(eq "maskeqz") (ne "masknez")])
 
+;; Iterator and attributes for floating-point to fixed-point conversion
+;; instructions.
+(define_int_iterator LRINT [UNSPEC_FTINT UNSPEC_FTINTRM UNSPEC_FTINTRP])
+(define_int_attr lrint_pattern [(UNSPEC_FTINT "lrint")
+				(UNSPEC_FTINTRM "lfloor")
+				(UNSPEC_FTINTRP "lceil")])
+(define_int_attr lrint_submenmonic [(UNSPEC_FTINT "")
+				    (UNSPEC_FTINTRM "rm")
+				    (UNSPEC_FTINTRP "rp")])
+
 ;;
 ;;  ....................
 ;;
@@ -2022,6 +2040,16 @@  (define_insn "rint<mode>2"
   [(set_attr "type" "fcvt")
    (set_attr "mode" "<MODE>")])
 
+;; Convert floating-point numbers to integers
+(define_insn "<lrint_pattern><ANYF:mode><ANYFI:mode>2"
+  [(set (match_operand:ANYFI 0 "register_operand" "=f")
+	(unspec:ANYFI [(match_operand:ANYF 1 "register_operand" "f")]
+		      LRINT))]
+  "TARGET_HARD_FLOAT"
+  "ftint<lrint_submenmonic>.<ANYFI:ifmt>.<ANYF:fmt> %0,%1"
+  [(set_attr "type" "fcvt")
+   (set_attr "mode" "<ANYF:MODE>")])
+
 ;; Load the low word of operand 0 with operand 1.
 (define_insn "load_low<mode>"
   [(set (match_operand:SPLITF 0 "register_operand" "=f,f")
diff --git a/gcc/testsuite/gcc.target/loongarch/ftint.c b/gcc/testsuite/gcc.target/loongarch/ftint.c
new file mode 100644
index 00000000000..9c3c3a8a756
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/ftint.c
@@ -0,0 +1,44 @@ 
+/* { dg-do compile } */
+/* { dg-options "-mabi=lp64d -mdouble-float -fno-math-errno" } */
+/* { dg-final { scan-assembler "ftint\\.l\\.s" } } */
+/* { dg-final { scan-assembler "ftint\\.l\\.d" } } */
+/* { dg-final { scan-assembler "ftintrm\\.l\\.s" } } */
+/* { dg-final { scan-assembler "ftintrm\\.l\\.d" } } */
+/* { dg-final { scan-assembler "ftintrp\\.l\\.s" } } */
+/* { dg-final { scan-assembler "ftintrp\\.l\\.d" } } */
+
+long
+my_lrint (double a)
+{
+  return __builtin_lrint (a);
+}
+
+long
+my_lrintf (float a)
+{
+  return __builtin_lrintf (a);
+}
+
+long
+my_lfloor (double a)
+{
+  return __builtin_lfloor (a);
+}
+
+long
+my_lfloorf (float a)
+{
+  return __builtin_lfloorf (a);
+}
+
+long
+my_lceil (double a)
+{
+  return __builtin_lceil (a);
+}
+
+long
+my_lceilf (float a)
+{
+  return __builtin_lceilf (a);
+}