Initial Granite Rapids support
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Commit Message
From: "Hu, Lin1" <lin1.hu@intel.com>
Hi all,
This patch aimed to add initial Granite Rapids support for GCC.
It needs to be checked in after prefetchit0/t1 patch.
The information for Granite Rapids comes following:
https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Regtested on x86_64-pc-linux-gnu. Ok for trunk?
BRs,
Haochen
gcc/Changelog:
* common/config/i386/cpuinfo.h:
(get_intel_cpu): Handle Granite Rapids.
* common/config/i386/i386-common.cc:
(processor_names): Add graniterapids.
(processor_alias_table): Ditto.
* common/config/i386/i386-cpuinfo.h:
(enum processor_types): Add INTEL_GRANITERAPIDS.
* config.gcc: Add -march=graniterapids.
* config/i386/driver-i386.cc (host_detect_local_cpu):
Handle graniterapids.
* config/i386/i386-c.cc (ix86_target_macros_internal):
Ditto.
* config/i386/i386-options.cc (m_GRANITERAPIDS): New define.
(processor_cost_table): Add graniterapids.
* config/i386/i386.h (enum processor_type):
Add PROCESSOR_GRANITERAPIDS.
(PTA_GRANITERAPIDS): Ditto.
* doc/extend.texi: Add graniterapids.
* doc/invoke.texi: Ditto.
gcc/testsuite/ChangeLog:
* gcc/testsuite/g++.target/i386/mv16.C: Add graniterapids.
* gcc.target/i386/funcspec-56.inc: Handle new march.
---
gcc/common/config/i386/cpuinfo.h | 9 +++++++++
gcc/common/config/i386/i386-common.cc | 3 +++
gcc/common/config/i386/i386-cpuinfo.h | 1 +
gcc/config.gcc | 2 +-
gcc/config/i386/driver-i386.cc | 5 ++++-
gcc/config/i386/i386-c.cc | 7 +++++++
gcc/config/i386/i386-options.cc | 4 +++-
gcc/config/i386/i386.h | 3 +++
gcc/doc/extend.texi | 3 +++
gcc/doc/invoke.texi | 11 +++++++++++
gcc/testsuite/g++.target/i386/mv16.C | 6 ++++++
gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 +
12 files changed, 52 insertions(+), 3 deletions(-)
Comments
On Fri, Nov 4, 2022 at 4:14 PM Haochen Jiang via Gcc-patches
<gcc-patches@gcc.gnu.org> wrote:
>
> From: "Hu, Lin1" <lin1.hu@intel.com>
>
> Hi all,
>
> This patch aimed to add initial Granite Rapids support for GCC.
> It needs to be checked in after prefetchit0/t1 patch.
>
> The information for Granite Rapids comes following:
> https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
>
> Regtested on x86_64-pc-linux-gnu. Ok for trunk?
Ok.
>
> BRs,
> Haochen
>
> gcc/Changelog:
>
> * common/config/i386/cpuinfo.h:
> (get_intel_cpu): Handle Granite Rapids.
> * common/config/i386/i386-common.cc:
> (processor_names): Add graniterapids.
> (processor_alias_table): Ditto.
> * common/config/i386/i386-cpuinfo.h:
> (enum processor_types): Add INTEL_GRANITERAPIDS.
> * config.gcc: Add -march=graniterapids.
> * config/i386/driver-i386.cc (host_detect_local_cpu):
> Handle graniterapids.
> * config/i386/i386-c.cc (ix86_target_macros_internal):
> Ditto.
> * config/i386/i386-options.cc (m_GRANITERAPIDS): New define.
> (processor_cost_table): Add graniterapids.
> * config/i386/i386.h (enum processor_type):
> Add PROCESSOR_GRANITERAPIDS.
> (PTA_GRANITERAPIDS): Ditto.
> * doc/extend.texi: Add graniterapids.
> * doc/invoke.texi: Ditto.
>
> gcc/testsuite/ChangeLog:
>
> * gcc/testsuite/g++.target/i386/mv16.C: Add graniterapids.
> * gcc.target/i386/funcspec-56.inc: Handle new march.
> ---
> gcc/common/config/i386/cpuinfo.h | 9 +++++++++
> gcc/common/config/i386/i386-common.cc | 3 +++
> gcc/common/config/i386/i386-cpuinfo.h | 1 +
> gcc/config.gcc | 2 +-
> gcc/config/i386/driver-i386.cc | 5 ++++-
> gcc/config/i386/i386-c.cc | 7 +++++++
> gcc/config/i386/i386-options.cc | 4 +++-
> gcc/config/i386/i386.h | 3 +++
> gcc/doc/extend.texi | 3 +++
> gcc/doc/invoke.texi | 11 +++++++++++
> gcc/testsuite/g++.target/i386/mv16.C | 6 ++++++
> gcc/testsuite/gcc.target/i386/funcspec-56.inc | 1 +
> 12 files changed, 52 insertions(+), 3 deletions(-)
>
> diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
> index ac7761699af..42c25b8a636 100644
> --- a/gcc/common/config/i386/cpuinfo.h
> +++ b/gcc/common/config/i386/cpuinfo.h
> @@ -564,6 +564,15 @@ get_intel_cpu (struct __processor_model *cpu_model,
> CHECK___builtin_cpu_is ("sierraforest");
> cpu_model->__cpu_type = INTEL_SIERRAFOREST;
> break;
> + case 0xad:
> + case 0xae:
> + /* Granite Rapids. */
> + cpu = "graniterapids";
> + CHECK___builtin_cpu_is ("corei7");
> + CHECK___builtin_cpu_is ("graniterapids");
> + cpu_model->__cpu_type = INTEL_COREI7;
> + cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS;
> + break;
> case 0x17:
> case 0x1d:
> /* Penryn. */
> diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
> index 9bcae020a00..c828ae5b7d7 100644
> --- a/gcc/common/config/i386/i386-common.cc
> +++ b/gcc/common/config/i386/i386-common.cc
> @@ -1918,6 +1918,7 @@ const char *const processor_names[] =
> "sapphirerapids",
> "alderlake",
> "rocketlake",
> + "graniterapids",
> "intel",
> "lujiazui",
> "geode",
> @@ -2037,6 +2038,8 @@ const pta processor_alias_table[] =
> M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
> {"meteorlake", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE,
> M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
> + {"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS,
> + M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F},
> {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
> M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
> {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
> diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h
> index 68eda7a8696..c06f089b0c5 100644
> --- a/gcc/common/config/i386/i386-cpuinfo.h
> +++ b/gcc/common/config/i386/i386-cpuinfo.h
> @@ -96,6 +96,7 @@ enum processor_subtypes
> INTEL_COREI7_ROCKETLAKE,
> ZHAOXIN_FAM7H_LUJIAZUI,
> AMDFAM19H_ZNVER4,
> + INTEL_COREI7_GRANITERAPIDS,
> CPU_SUBTYPE_MAX
> };
>
> diff --git a/gcc/config.gcc b/gcc/config.gcc
> index 5c782b2f298..03c1523f7af 100644
> --- a/gcc/config.gcc
> +++ b/gcc/config.gcc
> @@ -668,7 +668,7 @@ silvermont knl knm skylake-avx512 cannonlake icelake-client icelake-server \
> skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \
> sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \
> nano-x2 eden-x4 nano-x4 lujiazui x86-64 x86-64-v2 x86-64-v3 x86-64-v4 \
> -sierraforest native"
> +sierraforest graniterapids native"
>
> # Additional x86 processors supported by --with-cpu=. Each processor
> # MUST be separated by exactly one space.
> diff --git a/gcc/config/i386/driver-i386.cc b/gcc/config/i386/driver-i386.cc
> index a265b1c39f9..3117d83de00 100644
> --- a/gcc/config/i386/driver-i386.cc
> +++ b/gcc/config/i386/driver-i386.cc
> @@ -591,8 +591,11 @@ const char *host_detect_local_cpu (int argc, const char **argv)
> /* This is unknown family 0x6 CPU. */
> if (has_feature (FEATURE_AVX))
> {
> + /* Assume Granite Rapids. */
> + if (has_feature (FEATURE_AMX_FP16))
> + cpu = "graniterapids";
> /* Assume Sierra Forest. */
> - if (has_feature (FEATURE_AVXVNNIINT8))
> + else if (has_feature (FEATURE_AVXVNNIINT8))
> cpu = "sierraforest";
> /* Assume Tiger Lake */
> else if (has_feature (FEATURE_AVX512VP2INTERSECT))
> diff --git a/gcc/config/i386/i386-c.cc b/gcc/config/i386/i386-c.cc
> index 07ce0f8a5a7..c92796281e0 100644
> --- a/gcc/config/i386/i386-c.cc
> +++ b/gcc/config/i386/i386-c.cc
> @@ -250,6 +250,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
> def_or_undef (parse_in, "__sapphirerapids");
> def_or_undef (parse_in, "__sapphirerapids__");
> break;
> + case PROCESSOR_GRANITERAPIDS:
> + def_or_undef (parse_in, "__graniterapids");
> + def_or_undef (parse_in, "__graniterapids__");
> + break;
> case PROCESSOR_ALDERLAKE:
> def_or_undef (parse_in, "__alderlake");
> def_or_undef (parse_in, "__alderlake__");
> @@ -433,6 +437,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
> case PROCESSOR_ROCKETLAKE:
> def_or_undef (parse_in, "__tune_rocketlake__");
> break;
> + case PROCESSOR_GRANITERAPIDS:
> + def_or_undef (parse_in, "__tune_graniterapids__");
> + break;
> case PROCESSOR_INTEL:
> case PROCESSOR_GENERIC:
> break;
> diff --git a/gcc/config/i386/i386-options.cc b/gcc/config/i386/i386-options.cc
> index 625739658c9..633d5dd7eea 100644
> --- a/gcc/config/i386/i386-options.cc
> +++ b/gcc/config/i386/i386-options.cc
> @@ -127,10 +127,11 @@ along with GCC; see the file COPYING3. If not see
> #define m_SAPPHIRERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_SAPPHIRERAPIDS)
> #define m_ALDERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ALDERLAKE)
> #define m_ROCKETLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ROCKETLAKE)
> +#define m_GRANITERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_GRANITERAPIDS)
> #define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
> | m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
> | m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS \
> - | m_ROCKETLAKE)
> + | m_ROCKETLAKE | m_GRANITERAPIDS)
> #define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
> #define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
> #define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
> @@ -765,6 +766,7 @@ static const struct processor_costs *processor_cost_table[] =
> &icelake_cost,
> &alderlake_cost,
> &icelake_cost,
> + &icelake_cost,
> &intel_cost,
> &lujiazui_cost,
> &geode_cost,
> diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
> index bf676e401ab..e3e675d36c5 100644
> --- a/gcc/config/i386/i386.h
> +++ b/gcc/config/i386/i386.h
> @@ -2239,6 +2239,7 @@ enum processor_type
> PROCESSOR_SAPPHIRERAPIDS,
> PROCESSOR_ALDERLAKE,
> PROCESSOR_ROCKETLAKE,
> + PROCESSOR_GRANITERAPIDS,
> PROCESSOR_INTEL,
> PROCESSOR_LUJIAZUI,
> PROCESSOR_GEODE,
> @@ -2348,6 +2349,8 @@ constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_TREMONT | PTA_ADX | PTA_AVX
> | PTA_HRESET | PTA_KL | PTA_WIDEKL | PTA_AVXVNNI;
> constexpr wide_int_bitmask PTA_SIERRAFOREST = PTA_ALDERLAKE | PTA_AVXIFMA
> | PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD;
> +constexpr wide_int_bitmask PTA_GRANITERAPIDS = PTA_SAPPHIRERAPIDS | PTA_AMX_FP16
> + | PTA_PREFETCHI;
> constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW
> | PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ;
> constexpr wide_int_bitmask PTA_ZNVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2
> diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
> index ba1e12b4fa9..8ac9f9108bf 100644
> --- a/gcc/doc/extend.texi
> +++ b/gcc/doc/extend.texi
> @@ -21960,6 +21960,9 @@ Intel Core i7 Alderlake CPU.
> @item rocketlake
> Intel Core i7 Rocketlake CPU.
>
> +@item graniterapids
> +Intel Core i7 graniterapids CPU.
> +
> @item bonnell
> Intel Atom Bonnell CPU.
>
> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
> index bb908f81ba9..4ea93856caa 100644
> --- a/gcc/doc/invoke.texi
> +++ b/gcc/doc/invoke.texi
> @@ -32147,6 +32147,17 @@ CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD
> PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
> VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support.
>
> +@item graniterapids
> +Intel graniterapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
> +SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
> +RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW,
> +AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
> +AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
> +VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB,
> +MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG,
> +SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16,
> +AVX512BF16, AMX-FP16 and PREFETCHI instruction set support.
> +
> @item k6
> AMD K6 CPU with MMX instruction set support.
>
> diff --git a/gcc/testsuite/g++.target/i386/mv16.C b/gcc/testsuite/g++.target/i386/mv16.C
> index 11530817d1c..e0e0f153d1c 100644
> --- a/gcc/testsuite/g++.target/i386/mv16.C
> +++ b/gcc/testsuite/g++.target/i386/mv16.C
> @@ -96,6 +96,10 @@ int __attribute__ ((target("arch=sierraforest"))) foo () {
> return 25;
> }
>
> +int __attribute__ ((target("arch=graniterapids"))) foo () {
> + return 26;
> +}
> +
> int main ()
> {
> int val = foo ();
> @@ -136,6 +140,8 @@ int main ()
> assert (val == 24);
> else if (__builtin_cpu_is ("sierraforest"))
> assert (val == 25);
> + else if (__builtin_cpu_is ("graniterapids"))
> + assert (val == 26);
> else
> assert (val == 0);
>
> diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
> index 631d5c2b950..1dca8b060d3 100644
> --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc
> +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc
> @@ -197,6 +197,7 @@ extern void test_arch_cooperlake (void) __attribute__((__target__("arch=
> extern void test_arch_sapphirerapids (void) __attribute__((__target__("arch=sapphirerapids")));
> extern void test_arch_alderlake (void) __attribute__((__target__("arch=alderlake")));
> extern void test_arch_rocketlake (void) __attribute__((__target__("arch=rocketlake")));
> +extern void test_arch_graniterapids (void) __attribute__((__target__("arch=graniterapids")));
> extern void test_arch_lujiazui (void) __attribute__((__target__("arch=lujiazui")));
> extern void test_arch_k8 (void) __attribute__((__target__("arch=k8")));
> extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3")));
> --
> 2.18.1
>
@@ -564,6 +564,15 @@ get_intel_cpu (struct __processor_model *cpu_model,
CHECK___builtin_cpu_is ("sierraforest");
cpu_model->__cpu_type = INTEL_SIERRAFOREST;
break;
+ case 0xad:
+ case 0xae:
+ /* Granite Rapids. */
+ cpu = "graniterapids";
+ CHECK___builtin_cpu_is ("corei7");
+ CHECK___builtin_cpu_is ("graniterapids");
+ cpu_model->__cpu_type = INTEL_COREI7;
+ cpu_model->__cpu_subtype = INTEL_COREI7_GRANITERAPIDS;
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
@@ -1918,6 +1918,7 @@ const char *const processor_names[] =
"sapphirerapids",
"alderlake",
"rocketlake",
+ "graniterapids",
"intel",
"lujiazui",
"geode",
@@ -2037,6 +2038,8 @@ const pta processor_alias_table[] =
M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
{"meteorlake", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
+ {"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS,
+ M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL,
@@ -96,6 +96,7 @@ enum processor_subtypes
INTEL_COREI7_ROCKETLAKE,
ZHAOXIN_FAM7H_LUJIAZUI,
AMDFAM19H_ZNVER4,
+ INTEL_COREI7_GRANITERAPIDS,
CPU_SUBTYPE_MAX
};
@@ -668,7 +668,7 @@ silvermont knl knm skylake-avx512 cannonlake icelake-client icelake-server \
skylake goldmont goldmont-plus tremont cascadelake tigerlake cooperlake \
sapphirerapids alderlake rocketlake eden-x2 nano nano-1000 nano-2000 nano-3000 \
nano-x2 eden-x4 nano-x4 lujiazui x86-64 x86-64-v2 x86-64-v3 x86-64-v4 \
-sierraforest native"
+sierraforest graniterapids native"
# Additional x86 processors supported by --with-cpu=. Each processor
# MUST be separated by exactly one space.
@@ -591,8 +591,11 @@ const char *host_detect_local_cpu (int argc, const char **argv)
/* This is unknown family 0x6 CPU. */
if (has_feature (FEATURE_AVX))
{
+ /* Assume Granite Rapids. */
+ if (has_feature (FEATURE_AMX_FP16))
+ cpu = "graniterapids";
/* Assume Sierra Forest. */
- if (has_feature (FEATURE_AVXVNNIINT8))
+ else if (has_feature (FEATURE_AVXVNNIINT8))
cpu = "sierraforest";
/* Assume Tiger Lake */
else if (has_feature (FEATURE_AVX512VP2INTERSECT))
@@ -250,6 +250,10 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__sapphirerapids");
def_or_undef (parse_in, "__sapphirerapids__");
break;
+ case PROCESSOR_GRANITERAPIDS:
+ def_or_undef (parse_in, "__graniterapids");
+ def_or_undef (parse_in, "__graniterapids__");
+ break;
case PROCESSOR_ALDERLAKE:
def_or_undef (parse_in, "__alderlake");
def_or_undef (parse_in, "__alderlake__");
@@ -433,6 +437,9 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case PROCESSOR_ROCKETLAKE:
def_or_undef (parse_in, "__tune_rocketlake__");
break;
+ case PROCESSOR_GRANITERAPIDS:
+ def_or_undef (parse_in, "__tune_graniterapids__");
+ break;
case PROCESSOR_INTEL:
case PROCESSOR_GENERIC:
break;
@@ -127,10 +127,11 @@ along with GCC; see the file COPYING3. If not see
#define m_SAPPHIRERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_SAPPHIRERAPIDS)
#define m_ALDERLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ALDERLAKE)
#define m_ROCKETLAKE (HOST_WIDE_INT_1U<<PROCESSOR_ROCKETLAKE)
+#define m_GRANITERAPIDS (HOST_WIDE_INT_1U<<PROCESSOR_GRANITERAPIDS)
#define m_CORE_AVX512 (m_SKYLAKE_AVX512 | m_CANNONLAKE \
| m_ICELAKE_CLIENT | m_ICELAKE_SERVER | m_CASCADELAKE \
| m_TIGERLAKE | m_COOPERLAKE | m_SAPPHIRERAPIDS \
- | m_ROCKETLAKE)
+ | m_ROCKETLAKE | m_GRANITERAPIDS)
#define m_CORE_AVX2 (m_HASWELL | m_SKYLAKE | m_CORE_AVX512)
#define m_CORE_ALL (m_CORE2 | m_NEHALEM | m_SANDYBRIDGE | m_CORE_AVX2)
#define m_GOLDMONT (HOST_WIDE_INT_1U<<PROCESSOR_GOLDMONT)
@@ -765,6 +766,7 @@ static const struct processor_costs *processor_cost_table[] =
&icelake_cost,
&alderlake_cost,
&icelake_cost,
+ &icelake_cost,
&intel_cost,
&lujiazui_cost,
&geode_cost,
@@ -2239,6 +2239,7 @@ enum processor_type
PROCESSOR_SAPPHIRERAPIDS,
PROCESSOR_ALDERLAKE,
PROCESSOR_ROCKETLAKE,
+ PROCESSOR_GRANITERAPIDS,
PROCESSOR_INTEL,
PROCESSOR_LUJIAZUI,
PROCESSOR_GEODE,
@@ -2348,6 +2349,8 @@ constexpr wide_int_bitmask PTA_ALDERLAKE = PTA_TREMONT | PTA_ADX | PTA_AVX
| PTA_HRESET | PTA_KL | PTA_WIDEKL | PTA_AVXVNNI;
constexpr wide_int_bitmask PTA_SIERRAFOREST = PTA_ALDERLAKE | PTA_AVXIFMA
| PTA_AVXVNNIINT8 | PTA_AVXNECONVERT | PTA_CMPCCXADD;
+constexpr wide_int_bitmask PTA_GRANITERAPIDS = PTA_SAPPHIRERAPIDS | PTA_AMX_FP16
+ | PTA_PREFETCHI;
constexpr wide_int_bitmask PTA_KNM = PTA_KNL | PTA_AVX5124VNNIW
| PTA_AVX5124FMAPS | PTA_AVX512VPOPCNTDQ;
constexpr wide_int_bitmask PTA_ZNVER1 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2
@@ -21960,6 +21960,9 @@ Intel Core i7 Alderlake CPU.
@item rocketlake
Intel Core i7 Rocketlake CPU.
+@item graniterapids
+Intel Core i7 graniterapids CPU.
+
@item bonnell
Intel Atom Bonnell CPU.
@@ -32147,6 +32147,17 @@ CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD
PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
VPCLMULQDQ, AVX512BITALG, RDPID and AVX512VPOPCNTDQ instruction set support.
+@item graniterapids
+Intel graniterapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3,
+SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE,
+RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW,
+AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ,
+AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2,
+VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB,
+MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG,
+SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16,
+AVX512BF16, AMX-FP16 and PREFETCHI instruction set support.
+
@item k6
AMD K6 CPU with MMX instruction set support.
@@ -96,6 +96,10 @@ int __attribute__ ((target("arch=sierraforest"))) foo () {
return 25;
}
+int __attribute__ ((target("arch=graniterapids"))) foo () {
+ return 26;
+}
+
int main ()
{
int val = foo ();
@@ -136,6 +140,8 @@ int main ()
assert (val == 24);
else if (__builtin_cpu_is ("sierraforest"))
assert (val == 25);
+ else if (__builtin_cpu_is ("graniterapids"))
+ assert (val == 26);
else
assert (val == 0);
@@ -197,6 +197,7 @@ extern void test_arch_cooperlake (void) __attribute__((__target__("arch=
extern void test_arch_sapphirerapids (void) __attribute__((__target__("arch=sapphirerapids")));
extern void test_arch_alderlake (void) __attribute__((__target__("arch=alderlake")));
extern void test_arch_rocketlake (void) __attribute__((__target__("arch=rocketlake")));
+extern void test_arch_graniterapids (void) __attribute__((__target__("arch=graniterapids")));
extern void test_arch_lujiazui (void) __attribute__((__target__("arch=lujiazui")));
extern void test_arch_k8 (void) __attribute__((__target__("arch=k8")));
extern void test_arch_k8_sse3 (void) __attribute__((__target__("arch=k8-sse3")));