[v7,04/34] Reorganize LIB1ASMFUNCS object wrapper macros
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Commit Message
This will make it easier to isolate changes in subsequent patches.
gcc/libgcc/ChangeLog:
2022-10-09 Daniel Engel <gnu@danielengel.com>
* config/arm/t-elf (LIB1ASMFUNCS): Split macros into logical groups.
---
libgcc/config/arm/t-elf | 66 +++++++++++++++++++++++++++++++++--------
1 file changed, 53 insertions(+), 13 deletions(-)
@@ -14,19 +14,59 @@ LIB1ASMFUNCS += _arm_muldf3 _arm_mulsf3
endif
endif # !__symbian__
-# For most CPUs we have an assembly soft-float implementations.
-# However this is not true for ARMv6M. Here we want to use the soft-fp C
-# implementation. The soft-fp code is only build for ARMv6M. This pulls
-# in the asm implementation for other CPUs.
-LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
- _call_via_rX _interwork_call_via_rX \
- _lshrdi3 _ashrdi3 _ashldi3 \
- _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
- _arm_fixdfsi _arm_fixunsdfsi \
- _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
- _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
- _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \
- _clzsi2 _clzdi2 _ctzsi2
+# This pulls in the available assembly function implementations.
+# The soft-fp code is only built for ARMv6M, since there is no
+# assembly implementation here for double-precision values.
+
+
+# Group 1: Integer function objects.
+LIB1ASMFUNCS += \
+ _ashldi3 \
+ _ashrdi3 \
+ _lshrdi3 \
+ _clzdi2 \
+ _clzsi2 \
+ _ctzsi2 \
+ _dvmd_tls \
+ _divsi3 \
+ _modsi3 \
+ _udivsi3 \
+ _umodsi3 \
+
+
+# Group 2: Single precision floating point function objects.
+LIB1ASMFUNCS += \
+ _arm_addsubsf3 \
+ _arm_cmpsf2 \
+ _arm_fixsfsi \
+ _arm_fixunssfsi \
+ _arm_floatdisf \
+ _arm_floatundisf \
+ _arm_muldivsf3 \
+ _arm_negsf2 \
+ _arm_unordsf2 \
+
+
+# Group 3: Double precision floating point function objects.
+LIB1ASMFUNCS += \
+ _arm_addsubdf3 \
+ _arm_cmpdf2 \
+ _arm_fixdfsi \
+ _arm_fixunsdfsi \
+ _arm_floatdidf \
+ _arm_floatundidf \
+ _arm_muldivdf3 \
+ _arm_negdf2 \
+ _arm_truncdfsf2 \
+ _arm_unorddf2 \
+
+
+# Group 4: Miscellaneous function objects.
+LIB1ASMFUNCS += \
+ _bb_init_func \
+ _call_via_rX \
+ _interwork_call_via_rX \
+
# Currently there is a bug somewhere in GCC's alias analysis
# or scheduling code that is breaking _fpmul_parts in fp-bit.c.