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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id ji10-20020a170907980a00b007a641e472f0si1160806ejc.139.2022.10.29.00.11.28 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 29 Oct 2022 00:11:28 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C588B3857011 for ; Sat, 29 Oct 2022 07:11:05 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from loongson.cn (mail.loongson.cn [114.242.206.163]) by sourceware.org (Postfix) with ESMTP id ACDD03858437 for ; Sat, 29 Oct 2022 07:10:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org ACDD03858437 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=loongson.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=loongson.cn Received: from loongson.cn (unknown [10.2.5.5]) by gateway (Coremail) with SMTP id _____8DxTtvq0VxjcDwDAA--.12220S3; Sat, 29 Oct 2022 15:10:34 +0800 (CST) Received: from 5.5.5 (unknown [10.2.5.5]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Dx9Vbd0VxjWT0HAA--.5956S4; Sat, 29 Oct 2022 15:10:33 +0800 (CST) From: Lulu Cheng To: gcc-patches@gcc.gnu.org Subject: [PATCH v1 2/2] LoongArch: Add prefetch insns. Date: Sat, 29 Oct 2022 15:05:25 +0800 Message-Id: <20221029070524.2570782-3-chenglulu@loongson.cn> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20221029070524.2570782-1-chenglulu@loongson.cn> References: <20221029070524.2570782-1-chenglulu@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Dx9Vbd0VxjWT0HAA--.5956S4 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBjvJXoW3XF1rtr4UAr1DCr1kXw1DKFg_yoWxGFyUpr Zruw43tr48Xrn7G3yDta45Wws8Jr92gr12vFy3KFy8CF47XryUZF1rtrZxXFyjqw4rtrya gr1fCa1Yva1UAw7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj qI5I8CrVACY4xI64kE6c02F40Ex7xfYxn0WfASr-VFAUDa7-sFnT9fnUUIcSsGvfJTRUUU b28YFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I6I8E6xAIw20EY4v20xvaj40_Wr0E3s 1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM28CjxkF64kEwVA0rcxSw2x7M28EF7xv wVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwA2z4 x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1l e2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAqx4xG64xvF2 IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_JF0_Jw1lYx0Ex4A2jsIE14v26r4j6F4U McvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x0EwIxGrwCFx2 IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v2 6r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67 AKxVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IY s7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr 0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07j1q2_UUUUU= X-Spam-Status: No, score=-11.0 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_SBL_CSS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: xuchenghua@loongson.cn, xujiahao , Lulu Cheng , i@xen0n.name Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1748005016580634343?= X-GMAIL-MSGID: =?utf-8?q?1748005016580634343?= Co-Authored-By: xujiahao gcc/ChangeLog: * config/loongarch/loongarch-def.c: Initial number of parallel prefetch. * config/loongarch/loongarch-protos.h (loongarch_prefetch_cookie): Function declaration. * config/loongarch/loongarch-tune.h (struct loongarch_cache): Define number of parallel prefetch. * config/loongarch/loongarch.cc (loongarch_option_override_internal): Set up parameters to be used in prefetching algorithm. (loongarch_prefetch_cookie): Select load or store based on the value of write. * config/loongarch/loongarch.md (prefetch): New template. (*prefetch_indexed_): New template. --- gcc/config/loongarch/loongarch-def.c | 2 ++ gcc/config/loongarch/loongarch-protos.h | 1 + gcc/config/loongarch/loongarch-tune.h | 1 + gcc/config/loongarch/loongarch.cc | 48 +++++++++++++++++++++++++ gcc/config/loongarch/loongarch.md | 23 ++++++++++++ 5 files changed, 75 insertions(+) diff --git a/gcc/config/loongarch/loongarch-def.c b/gcc/config/loongarch/loongarch-def.c index cbf995d81b5..80ab10a52a8 100644 --- a/gcc/config/loongarch/loongarch-def.c +++ b/gcc/config/loongarch/loongarch-def.c @@ -62,11 +62,13 @@ loongarch_cpu_cache[N_TUNE_TYPES] = { .l1d_line_size = 64, .l1d_size = 64, .l2d_size = 256, + .simultaneous_prefetches = 4, }, [CPU_LA464] = { .l1d_line_size = 64, .l1d_size = 64, .l2d_size = 256, + .simultaneous_prefetches = 4, }, }; diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h index 77b2217247d..489525b520e 100644 --- a/gcc/config/loongarch/loongarch-protos.h +++ b/gcc/config/loongarch/loongarch-protos.h @@ -179,5 +179,6 @@ extern tree loongarch_builtin_decl (unsigned int, bool); extern rtx loongarch_expand_builtin (tree, rtx, rtx subtarget ATTRIBUTE_UNUSED, machine_mode, int); extern tree loongarch_build_builtin_va_list (void); +extern rtx loongarch_prefetch_cookie (rtx, rtx); #endif /* ! GCC_LOONGARCH_PROTOS_H */ diff --git a/gcc/config/loongarch/loongarch-tune.h b/gcc/config/loongarch/loongarch-tune.h index 6f3530f5c02..8e3eb29472b 100644 --- a/gcc/config/loongarch/loongarch-tune.h +++ b/gcc/config/loongarch/loongarch-tune.h @@ -45,6 +45,7 @@ struct loongarch_cache { int l1d_line_size; /* bytes */ int l1d_size; /* KiB */ int l2d_size; /* kiB */ + int simultaneous_prefetches; /* number of parallel prefetch */ }; #endif /* LOONGARCH_TUNE_H */ diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 5e8cd293645..d663afe434d 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -63,6 +63,7 @@ along with GCC; see the file COPYING3. If not see #include "context.h" #include "builtins.h" #include "rtl-iter.h" +#include "params.h" /* This file should be included last. */ #include "target-def.h" @@ -6126,6 +6127,33 @@ loongarch_option_override_internal (struct gcc_options *opts) if (loongarch_branch_cost == 0) loongarch_branch_cost = loongarch_cost->branch_cost; + /* Set up parameters to be used in prefetching algorithm. */ + maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES, + loongarch_cpu_cache[LARCH_ACTUAL_TUNE].simultaneous_prefetches, + opts->x_param_values, + opts_set->x_param_values); + + maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE, + loongarch_cpu_cache[LARCH_ACTUAL_TUNE].l1d_line_size, + opts->x_param_values, + opts_set->x_param_values); + + maybe_set_param_value (PARAM_L1_CACHE_SIZE, + loongarch_cpu_cache[LARCH_ACTUAL_TUNE].l1d_size, + opts->x_param_values, + opts_set->x_param_values); + + maybe_set_param_value (PARAM_L2_CACHE_SIZE, + loongarch_cpu_cache[LARCH_ACTUAL_TUNE].l2d_size, + opts->x_param_values, + opts_set->x_param_values); + + /* Enable sw prefetching at -O3 and higher. */ + if (opts->x_flag_prefetch_loop_arrays < 0 + && (opts->x_optimize >= 3 || opts->x_flag_profile_use) + && !opts->x_optimize_size) + opts->x_flag_prefetch_loop_arrays = 1; + if (TARGET_DIRECT_EXTERN_ACCESS && flag_shlib) error ("%qs cannot be used for compiling a shared library", "-mdirect-extern-access"); @@ -6506,6 +6534,26 @@ loongarch_asan_shadow_offset (void) return TARGET_64BIT ? (HOST_WIDE_INT_1 << 46) : 0; } +/* LoongArch only implements preld hint=0 (prefetch for load) and hint=8 + (prefetch for store), other hint just scale to hint = 0 and hint = 1. */ + +rtx +loongarch_prefetch_cookie (rtx write, rtx locality) +{ + if (INTVAL (locality) == 1 && INTVAL (write) == 0) + return GEN_INT (INTVAL (write) + 2); + + /* store. */ + if (INTVAL (write) == 1) + return GEN_INT (INTVAL (write) + 7); + + /* load. */ + if (INTVAL (write) == 0) + return GEN_INT (INTVAL (write)); + + gcc_unreachable (); +} + /* Initialize the GCC target structure. */ #undef TARGET_ASM_ALIGNED_HI_OP #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t" diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 7eaa9ab66e3..be247164eb4 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -3201,6 +3201,29 @@ (define_expand "untyped_call" ;; .................... ;; +(define_insn "prefetch" + [(prefetch (match_operand 0 "address_operand" "p") + (match_operand 1 "const_int_operand" "n") + (match_operand 2 "const_int_operand" "n"))] + "" +{ + operands[1] = loongarch_prefetch_cookie (operands[1], operands[2]); + return "preld\t%1,%a0"; +} + [(set_attr "type" "prefetch")]) + +(define_insn "*prefetch_indexed_" + [(prefetch (plus:P (match_operand 0 "register_operand" "r") + (match_operand 1 "register_operand" "r")) + (match_operand 2 "const_int_operand" "n") + (match_operand 3 "const_int_operand" "n"))] + "" +{ + operands[2] = loongarch_prefetch_cookie (operands[2], operands[3]); + return "preldx\t%2,%1,%0"; +} + [(set_attr "type" "prefetchx")]) + (define_insn "nop" [(const_int 0)] ""