RISC-V: Remove unused TI/TF vector modes.

Message ID 20221024020524.27704-1-juzhe.zhong@rivai.ai
State Accepted
Headers
Series RISC-V: Remove unused TI/TF vector modes. |

Checks

Context Check Description
snail/gcc-patch-check success Github commit url

Commit Message

juzhe.zhong@rivai.ai Oct. 24, 2022, 2:05 a.m. UTC
  From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/ChangeLog:

	* config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes.

---
 gcc/config/riscv/riscv-vector-switch.def | 4 ----
 1 file changed, 4 deletions(-)
  

Comments

Kito Cheng Oct. 24, 2022, 2:21 a.m. UTC | #1
Committed, thanks :)

On Mon, Oct 24, 2022 at 10:06 AM <juzhe.zhong@rivai.ai> wrote:
>
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv-vector-switch.def (ENTRY): Remove unused TI/TF vector modes.
>
> ---
>  gcc/config/riscv/riscv-vector-switch.def | 4 ----
>  1 file changed, 4 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vector-switch.def b/gcc/config/riscv/riscv-vector-switch.def
> index cacfccb6d29..ee8ebd5f1cc 100644
> --- a/gcc/config/riscv/riscv-vector-switch.def
> +++ b/gcc/config/riscv/riscv-vector-switch.def
> @@ -155,10 +155,6 @@ ENTRY (VNx4DF, TARGET_VECTOR_FP64)
>  ENTRY (VNx2DF, TARGET_VECTOR_FP64)
>  ENTRY (VNx1DF, TARGET_VECTOR_FP64)
>
> -/* SEW = 128. Disable all of them.  */
> -ENTRY (VNx2TI, false)
> -ENTRY (VNx2TF, false)
> -
>  #undef TARGET_VECTOR_FP32
>  #undef TARGET_VECTOR_FP64
>  #undef ENTRY
> --
> 2.36.1
>
  

Patch

diff --git a/gcc/config/riscv/riscv-vector-switch.def b/gcc/config/riscv/riscv-vector-switch.def
index cacfccb6d29..ee8ebd5f1cc 100644
--- a/gcc/config/riscv/riscv-vector-switch.def
+++ b/gcc/config/riscv/riscv-vector-switch.def
@@ -155,10 +155,6 @@  ENTRY (VNx4DF, TARGET_VECTOR_FP64)
 ENTRY (VNx2DF, TARGET_VECTOR_FP64)
 ENTRY (VNx1DF, TARGET_VECTOR_FP64)
 
-/* SEW = 128. Disable all of them.  */
-ENTRY (VNx2TI, false)
-ENTRY (VNx2TF, false)
-
 #undef TARGET_VECTOR_FP32
 #undef TARGET_VECTOR_FP64
 #undef ENTRY