diff --git a/gcc/testsuite/gcc.dg/c2x-float-7.c b/gcc/testsuite/gcc.dg/c2x-float-7.c
index 0c90ff24165..c699e94aff8 100644
--- a/gcc/testsuite/gcc.dg/c2x-float-7.c
+++ b/gcc/testsuite/gcc.dg/c2x-float-7.c
@@ -39,11 +39,21 @@ main (void)
     abort ();
   feclearexcept (FE_ALL_EXCEPT);
   d += d;
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (fetestexcept (FE_INVALID))
+#else
   if (!fetestexcept (FE_INVALID))
+#endif
     abort ();
   feclearexcept (FE_ALL_EXCEPT);
   ld += ld;
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (fetestexcept (FE_INVALID))
+#else
   if (!fetestexcept (FE_INVALID))
+#endif
     abort ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/pr95115.c b/gcc/testsuite/gcc.dg/pr95115.c
index 46a95dfb698..15bc6854819 100644
--- a/gcc/testsuite/gcc.dg/pr95115.c
+++ b/gcc/testsuite/gcc.dg/pr95115.c
@@ -19,7 +19,12 @@ main (void)
   double r = x ();
   if (!__builtin_isnan (r))
 	abort ();
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (fetestexcept (FE_INVALID))
+#else
   if (!fetestexcept (FE_INVALID))
+#endif
 	abort ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/torture/floatn-nan-floath.h b/gcc/testsuite/gcc.dg/torture/floatn-nan-floath.h
index 9892fd0cf63..5c9f28d4fdc 100644
--- a/gcc/testsuite/gcc.dg/torture/floatn-nan-floath.h
+++ b/gcc/testsuite/gcc.dg/torture/floatn-nan-floath.h
@@ -30,7 +30,12 @@ main (void)
 {
   volatile TYPE r;
   r = nans_cst + nans_cst;
+#if defined(__ARM_FP) && __ARM_FP == 4 && (EXT || WIDTH > 32)
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (fetestexcept (FE_INVALID))
+#else
   if (!fetestexcept (FE_INVALID))
+#endif
     abort ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/torture/floatn-nan.h b/gcc/testsuite/gcc.dg/torture/floatn-nan.h
index 89d2e2eec34..0abb0668677 100644
--- a/gcc/testsuite/gcc.dg/torture/floatn-nan.h
+++ b/gcc/testsuite/gcc.dg/torture/floatn-nan.h
@@ -30,10 +30,20 @@ main (void)
 {
   volatile TYPE r;
   r = nan_cst + nan_cst;
+#if defined(__ARM_FP) && __ARM_FP == 4 && (EXT || WIDTH > 32)
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (!fetestexcept (FE_INVALID))
+#else
   if (fetestexcept (FE_INVALID))
+#endif
     abort ();
   r = nans_cst + nans_cst;
+#if defined(__ARM_FP) && __ARM_FP == 4 && (EXT || WIDTH > 32)
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (fetestexcept (FE_INVALID))
+#else
   if (!fetestexcept (FE_INVALID))
+#endif
     abort ();
   exit (0);
 }
diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-1.c b/gcc/testsuite/gcc.dg/torture/inf-compare-1.c
index 70f255e680a..df0e61d9f89 100644
--- a/gcc/testsuite/gcc.dg/torture/inf-compare-1.c
+++ b/gcc/testsuite/gcc.dg/torture/inf-compare-1.c
@@ -16,6 +16,11 @@ int
 main (void)
 {
   i = x > __builtin_inf ();
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (i != 0 || fetestexcept (FE_INVALID))
+#else
   if (i != 0 || !fetestexcept (FE_INVALID))
+#endif
     abort ();
 }
diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-2.c b/gcc/testsuite/gcc.dg/torture/inf-compare-2.c
index 011f992d5a0..dcb43ccc444 100644
--- a/gcc/testsuite/gcc.dg/torture/inf-compare-2.c
+++ b/gcc/testsuite/gcc.dg/torture/inf-compare-2.c
@@ -16,6 +16,11 @@ int
 main (void)
 {
   i = x < -__builtin_inf ();
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (i != 0 || fetestexcept (FE_INVALID))
+#else
   if (i != 0 || !fetestexcept (FE_INVALID))
+#endif
     abort ();
 }
diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-3.c b/gcc/testsuite/gcc.dg/torture/inf-compare-3.c
index de5c478a8d8..1cd4d3e8199 100644
--- a/gcc/testsuite/gcc.dg/torture/inf-compare-3.c
+++ b/gcc/testsuite/gcc.dg/torture/inf-compare-3.c
@@ -16,6 +16,11 @@ int
 main (void)
 {
   i = x <= __builtin_inf ();
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (i != 0 || fetestexcept (FE_INVALID))
+#else
   if (i != 0 || !fetestexcept (FE_INVALID))
+#endif
     abort ();
 }
diff --git a/gcc/testsuite/gcc.dg/torture/inf-compare-4.c b/gcc/testsuite/gcc.dg/torture/inf-compare-4.c
index 685562d3a40..0cd27076079 100644
--- a/gcc/testsuite/gcc.dg/torture/inf-compare-4.c
+++ b/gcc/testsuite/gcc.dg/torture/inf-compare-4.c
@@ -16,6 +16,11 @@ int
 main (void)
 {
   i = x >= -__builtin_inf ();
+#if defined(__ARM_FP) && __ARM_FP == 4
+  /* Arm with SP FPU does not support exceptions (see pr102017).  */
+  if (i != 0 || fetestexcept (FE_INVALID))
+#else
   if (i != 0 || !fetestexcept (FE_INVALID))
+#endif
     abort ();
 }
