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[8.43.85.97]) by mx.google.com with ESMTPS id dm21-20020a170907949500b0073d6c0facdcsi977351ejc.259.2022.08.23.18.16.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 Aug 2022 18:16:23 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=DA6jkn0f; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0B609385AC2F for ; Wed, 24 Aug 2022 01:16:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0B609385AC2F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1661303782; bh=4QoozmgnGFVyI0VYKHzyBx9+LjRi9hcqlRFGKAMrPK0=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=DA6jkn0fySKhGKvR3kbiffa9DuilHbtcVVcCGGVvBdpaGhBuz8pp6Uu9stFfSmPIy Zm9SZv7OasJ7VW5hVr5PfXvLXXyKKaMEic1hdOJhDstinecOjqYQ3UtAs4iHIDWNIK UCKkx0tKdGhjgFr9C6LjnLlk2g/2S2j5rL5bWGlk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by sourceware.org (Postfix) with ESMTPS id 2B42638582BE for ; Wed, 24 Aug 2022 01:15:28 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 2B42638582BE X-IronPort-AV: E=McAfee;i="6500,9779,10448"; a="292580461" X-IronPort-AV: E=Sophos;i="5.93,259,1654585200"; d="scan'208";a="292580461" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Aug 2022 18:15:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,259,1654585200"; d="scan'208";a="712831151" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga002.fm.intel.com with ESMTP; 23 Aug 2022 18:15:25 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 8C0B4100B5C1; Wed, 24 Aug 2022 09:15:24 +0800 (CST) To: gcc-patches@gcc.gnu.org Subject: [PATCH] Don't gimple fold ymm-version vblendvpd/vblendvps/vpblendvb w/o TARGET_AVX2 Date: Wed, 24 Aug 2022 09:15:24 +0800 Message-Id: <20220824011524.73560-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_NUMSUBJECT, KAM_SHORT, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: liuhongt Reply-To: liuhongt Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1742003275970878323?= X-GMAIL-MSGID: =?utf-8?q?1742003275970878323?= Since 256-bit vector integer comparison is under TARGET_AVX2, and gimple folding for vblendvpd/vblendvps/vpblendvb relies on that. Restrict gimple fold condition to TARGET_AVX2. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: PR target/106704 * config/i386/i386-builtin.def (BDESC): Add CODE_FOR_avx_blendvpd256/CODE_FOR_avx_blendvps256 to corresponding builtins. * config/i386/i386.cc (ix86_gimple_fold_builtin): Don't fold IX86_BUILTIN_PBLENDVB256, IX86_BUILTIN_BLENDVPS256, IX86_BUILTIN_BLENDVPD256 w/o TARGET_AVX2. gcc/testsuite/ChangeLog: * gcc.target/i386/pr106704.c: New test. --- gcc/config/i386/i386-builtin.def | 4 ++-- gcc/config/i386/i386.cc | 12 +++++++++--- gcc/testsuite/gcc.target/i386/pr106704.c | 16 ++++++++++++++++ 3 files changed, 27 insertions(+), 5 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr106704.c diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index acb7e8ca64b..f9c7abde2cf 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -1036,8 +1036,8 @@ BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_vpermilvarv8sf3, "__builtin_ia32_vpe BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendpd256, "__builtin_ia32_blendpd256", IX86_BUILTIN_BLENDPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendps256, "__builtin_ia32_blendps256", IX86_BUILTIN_BLENDPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT) -BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd256", IX86_BUILTIN_BLENDVPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF) -BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps256", IX86_BUILTIN_BLENDVPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF) +BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendvpd256, "__builtin_ia32_blendvpd256", IX86_BUILTIN_BLENDVPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF) +BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_blendvps256, "__builtin_ia32_blendvps256", IX86_BUILTIN_BLENDVPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_dpps256, "__builtin_ia32_dpps256", IX86_BUILTIN_DPPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_shufpd256, "__builtin_ia32_shufpd256", IX86_BUILTIN_SHUFPD256, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_INT) BDESC (OPTION_MASK_ISA_AVX, 0, CODE_FOR_avx_shufps256, "__builtin_ia32_shufps256", IX86_BUILTIN_SHUFPS256, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_INT) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index e27c87f8c83..c4d0e36e9c0 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -18452,6 +18452,15 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) } break; + case IX86_BUILTIN_PBLENDVB256: + case IX86_BUILTIN_BLENDVPS256: + case IX86_BUILTIN_BLENDVPD256: + /* pcmpeqb/d/q is under avx2, w/o avx2, it's veclower + to scalar operations and not combined back. */ + if (!TARGET_AVX2) + break; + + /* FALLTHRU. */ case IX86_BUILTIN_BLENDVPD: /* blendvpd is under sse4.1 but pcmpgtq is under sse4.2, w/o sse4.2, it's veclowered to scalar operations and @@ -18460,10 +18469,7 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) break; /* FALLTHRU. */ case IX86_BUILTIN_PBLENDVB128: - case IX86_BUILTIN_PBLENDVB256: case IX86_BUILTIN_BLENDVPS: - case IX86_BUILTIN_BLENDVPS256: - case IX86_BUILTIN_BLENDVPD256: gcc_assert (n_args == 3); arg0 = gimple_call_arg (stmt, 0); arg1 = gimple_call_arg (stmt, 1); diff --git a/gcc/testsuite/gcc.target/i386/pr106704.c b/gcc/testsuite/gcc.target/i386/pr106704.c new file mode 100644 index 00000000000..44e052a4caa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr106704.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx -O2 -mno-avx2" } */ +/* { dg-final { scan-assembler-times {vblendvps[ \t]+%ymm[0-9]+} 1 } } */ +/* { dg-final { scan-assembler-times {vblendvpd[ \t]+%ymm[0-9]+} 1 } } */ + +#include + +__m256 bend_stuff( __m256 a, __m256 b, __m256 mask) +{ + return _mm256_blendv_ps(a, b, mask); +} + +__m256d bend_stuff1( __m256d a, __m256d b, __m256d mask) +{ + return _mm256_blendv_pd(a, b, mask); +}