[committed] Adjust expectations for pr59533-1.c

Message ID 1d1bfa3e-8b63-47d6-91e9-6646c71a408e@gmail.com
State Accepted
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Series [committed] Adjust expectations for pr59533-1.c |

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Commit Message

Jeff Law Jan. 22, 2024, 2:14 a.m. UTC
  The change for pr111267 twiddled code generation for sh/pr59533-1.c

We end up eliminating two comparisons, but require two shll instructions 
to do so.  And in a couple places we're using an addc sequence rather 
than a subc sequence.   This patch adjusts the expected codegen for the 
test as all those are either a wash or a

The fwprop change does cause some code regressions on the same test. 
I'll file a distinct but for that issue.

Pushed to the trunk,

Jeff
commit 7e16f819ff413c48702f9087b62eaac39a060a14
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Sun Jan 21 19:12:21 2024 -0700

    [committed] Adjust expectations for pr59533-1.c
    
    The change for pr111267 twiddled code generation for sh/pr59533-1.c
    
    We end up eliminating two comparisons, but require two shll instructions to do
    so.  And in a couple places we're using an addc sequence rather than a subc
    sequence.   This patch adjusts the expected codegen for the test as all those
    are either a wash or a
    
    The fwprop change does cause some code regressions on the same test.  I'll file
    a distinct but for that issue.
    
    gcc/testsuite
            * gcc.target/sh/pr59533-1.c: Adjust expected output.
  

Comments

Oleg Endo Jan. 22, 2024, 2:29 a.m. UTC | #1
On Sun, 2024-01-21 at 19:14 -0700, Jeff Law wrote:
> The change for pr111267 twiddled code generation for sh/pr59533-1.c
> 
> We end up eliminating two comparisons, but require two shll instructions 
> to do so.  And in a couple places we're using an addc sequence rather 
> than a subc sequence.   This patch adjusts the expected codegen for the 
> test as all those are either a wash or a
> 
> The fwprop change does cause some code regressions on the same test. 
> I'll file a distinct but for that issue.
> 
> Pushed to the trunk,
> 
> Jeff

Thanks for keeping an eye on this.

Note that on SH4 the comparison insns are of MT type, which increases
likelihood of parallel execution.  So it's better to use those e.g. to shift
out the MSB into T bit than shll.

Cheers,
Oleg
  

Patch

diff --git a/gcc/testsuite/gcc.target/sh/pr59533-1.c b/gcc/testsuite/gcc.target/sh/pr59533-1.c
index b0469859df5..859b8e2d24c 100644
--- a/gcc/testsuite/gcc.target/sh/pr59533-1.c
+++ b/gcc/testsuite/gcc.target/sh/pr59533-1.c
@@ -2,15 +2,15 @@ 
 /* { dg-do compile }  */
 /* { dg-options "-O1" } */
 
-/* { dg-final { scan-assembler-times "shll" 1 } }  */
+/* { dg-final { scan-assembler-times "shll" 3 } }  */
 /* { dg-final { scan-assembler-times "movt" 5 } }  */
 /* { dg-final { scan-assembler-times "rotcl" 1 } }  */
 /* { dg-final { scan-assembler-times "and" 3 } }  */
 /* { dg-final { scan-assembler-times "extu.b" 5 } }  */
 
-/* { dg-final { scan-assembler-times "cmp/pz" 27 { target { ! sh2a } } } }  */
-/* { dg-final { scan-assembler-times "addc" 4 { target { ! sh2a } } } }  */
-/* { dg-final { scan-assembler-times "subc" 16 { target { ! sh2a } } } }  */
+/* { dg-final { scan-assembler-times "cmp/pz" 25 { target { ! sh2a } } } }  */
+/* { dg-final { scan-assembler-times "addc" 6 { target { ! sh2a } } } }  */
+/* { dg-final { scan-assembler-times "subc" 14 { target { ! sh2a } } } }  */
 
 /* { dg-final { scan-assembler-times "cmp/pz" 25 { target { sh2a } } } }  */
 /* { dg-final { scan-assembler-times "addc" 6 { target { sh2a } } } }  */