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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id s9-20020a170906960900b00965dffc4e9bsi2263473ejx.280.2023.05.24.03.59.07 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 May 2023 03:59:07 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=KQwtjP82; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 898A63858289 for ; Wed, 24 May 2023 10:59:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 898A63858289 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684925946; bh=UtBG2R8RBjdWYtkPQnpqxzovqqTfaGBup7Agr5ryWdY=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=KQwtjP828mvu3Ncz6ytgrL1Fu8zwjhEFQPBdWMHnxM3r3Se/da6Y3l1PT6hlyq3Ba ZjKskzfVFtXRvEGyd7yHYdJTYcdmc+gp3itjNuRw801jNSMkmYhcSVDZ+lW4lyMb0N EQTW6XPLqRO8n3904QE+lCukfBkKywB5I1ritiUM= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from lxmtout2.gsi.de (lxmtout2.gsi.de [140.181.3.112]) by sourceware.org (Postfix) with ESMTPS id 141EF3858CDB; Wed, 24 May 2023 10:58:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 141EF3858CDB Received: from localhost (localhost [127.0.0.1]) by lxmtout2.gsi.de (Postfix) with ESMTP id D4FDD202AD46; Wed, 24 May 2023 12:58:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at lxmtout2.gsi.de Received: from lxmtout2.gsi.de ([127.0.0.1]) by localhost (lxmtout2.gsi.de [127.0.0.1]) (amavisd-new, port 10024) with LMTP id YGl_KMTFfis0; Wed, 24 May 2023 12:58:20 +0200 (CEST) Received: from srvEX6.campus.gsi.de (unknown [10.10.4.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lxmtout2.gsi.de (Postfix) with ESMTPS id BB0842038F7C; Wed, 24 May 2023 12:58:20 +0200 (CEST) Received: from minbar.localnet (140.181.3.12) by srvEX6.campus.gsi.de (10.10.4.96) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 24 May 2023 12:58:20 +0200 To: , Subject: [PATCH] libstdc++: Fix SFINAE for __is_intrinsic_type on ARM Date: Wed, 24 May 2023 12:58:19 +0200 Message-ID: <13148454.CDJkKcVGEf@minbar> Organization: GSI Helmholtz Centre for Heavy Ion Research MIME-Version: 1.0 X-Originating-IP: [140.181.3.12] X-ClientProxiedBy: srvEX8.Campus.gsi.de (10.10.4.160) To srvEX6.campus.gsi.de (10.10.4.96) X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Matthias Kretz via Gcc-patches From: Matthias Kretz Reply-To: Matthias Kretz Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1766772910905633925?= X-GMAIL-MSGID: =?utf-8?q?1766772910905633925?= OK for master and all branches? (this issue only surfaced because of the new test) ------------ 8< ----------------- On ARM NEON doesn't support double, so __is_intrinsic_type_v should say false (instead of being ill-formed). Signed-off-by: Matthias Kretz libstdc++-v3/ChangeLog: PR libstdc++/109261 * include/experimental/bits/simd.h (__intrinsic_type): Specialize __intrinsic_type and __intrinsic_type in any case, but provide the member type only with __aarch64__. --- libstdc++-v3/include/experimental/bits/simd.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -- ────────────────────────────────────────────────────────────────────────── Dr. Matthias Kretz https://mattkretz.github.io GSI Helmholtz Centre for Heavy Ion Research https://gsi.de stdₓ::simd ────────────────────────────────────────────────────────────────────────── diff --git a/libstdc++-v3/include/experimental/bits/simd.h b/libstdc++-v3/include/experimental/bits/simd.h index b0571ca26c4..d1f388310f9 100644 --- a/libstdc++-v3/include/experimental/bits/simd.h +++ b/libstdc++-v3/include/experimental/bits/simd.h @@ -2369,15 +2369,21 @@ struct __intrinsic_type struct __intrinsic_type { using type = float32x4_t; }; -#if _GLIBCXX_SIMD_HAVE_NEON_A64 template <> struct __intrinsic_type - { using type = float64x1_t; }; + { +#if _GLIBCXX_SIMD_HAVE_NEON_A64 + using type = float64x1_t; +#endif + }; template <> struct __intrinsic_type - { using type = float64x2_t; }; + { +#if _GLIBCXX_SIMD_HAVE_NEON_A64 + using type = float64x2_t; #endif + }; #define _GLIBCXX_SIMD_ARM_INTRIN(_Bits, _Np) \ template <> \