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[8.43.85.97]) by mx.google.com with ESMTPS id x9-20020aa7d6c9000000b00514b3d55fe0si5990328edr.289.2023.06.06.05.26.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 05:26:48 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=YlqnfP2h; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id BE5813857726 for ; Tue, 6 Jun 2023 12:26:36 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BE5813857726 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1686054396; bh=Am5PWMV9C+F4oAsOthUXlABe96CxlgCGWaf9OvkEG0Y=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=YlqnfP2hMfN0CZaBU0QSOOUPskmK7K5Vk/fKFrmcL0ww95OUXwVjLZVTtKkPhjKvB 858c59RywjMuhK+Ym4knPQNjy+xLFACN38lidpnNwsIe7q3fwz/j2tsmlXXUQdKyrr jBYOwlMPrdJSftamLaTBkYopop4ZDFeEDY/nvEsw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from lxmtout1.gsi.de (lxmtout1.gsi.de [140.181.3.111]) by sourceware.org (Postfix) with ESMTPS id DFB533858D38; Tue, 6 Jun 2023 12:25:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org DFB533858D38 Received: from localhost (localhost [127.0.0.1]) by lxmtout1.gsi.de (Postfix) with ESMTP id 2619A2051045; Tue, 6 Jun 2023 14:25:52 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at lxmtout1.gsi.de Received: from lxmtout1.gsi.de ([127.0.0.1]) by localhost (lxmtout1.gsi.de [127.0.0.1]) (amavisd-new, port 10024) with LMTP id e3DIh6fuh_Tx; Tue, 6 Jun 2023 14:25:52 +0200 (CEST) Received: from srvEX6.campus.gsi.de (unknown [10.10.4.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lxmtout1.gsi.de (Postfix) with ESMTPS id 0E1FA2051040; Tue, 6 Jun 2023 14:25:52 +0200 (CEST) Received: from minbar.localnet (140.181.3.12) by srvEX6.campus.gsi.de (10.10.4.96) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 6 Jun 2023 14:25:51 +0200 To: , Subject: [PATCH] libstdc++: Replace use of incorrect non-temporal store Date: Tue, 6 Jun 2023 14:25:51 +0200 Message-ID: <13130881.nUPlyArG6x@minbar> Organization: GSI Helmholtz Centre for Heavy Ion Research MIME-Version: 1.0 X-Originating-IP: [140.181.3.12] X-ClientProxiedBy: srvEX8.Campus.gsi.de (10.10.4.160) To srvEX6.campus.gsi.de (10.10.4.96) X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00, BODY_8BITS, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Matthias Kretz via Gcc-patches From: Matthias Kretz Reply-To: Matthias Kretz Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1767956186624159565?= X-GMAIL-MSGID: =?utf-8?q?1767956186624159565?= OK for master and backports? Tested on x86_64-pc-linux-gnu ----- >8 ----- The call to the base implementation sometimes didn't find a matching signature because the _Abi parameter of _SimdImpl* was "wrong" after conversion. It has to call into ::_SimdImpl instead of the current ABI tag's _SimdImpl. This also reduces the number of possible template instantiations. Signed-off-by: Matthias Kretz libstdc++-v3/ChangeLog: PR libstdc++/110054 * include/experimental/bits/simd_builtin.h (_S_masked_store): Call into deduced ABI's SimdImpl after conversion. * include/experimental/bits/simd_x86.h (_S_masked_store_nocvt): Don't use _mm_maskmoveu_si128. Use the generic fall-back implementation. Also fix masked stores without SSE2, which were not doing anything before. --- .../include/experimental/bits/simd_builtin.h | 6 +-- .../include/experimental/bits/simd_x86.h | 38 ++----------------- 2 files changed, 7 insertions(+), 37 deletions(-) -- ────────────────────────────────────────────────────────────────────────── Dr. Matthias Kretz https://mattkretz.github.io GSI Helmholtz Centre for Heavy Ion Research https://gsi.de stdₓ::simd ────────────────────────────────────────────────────────────────────────── diff --git a/libstdc++-v3/include/experimental/bits/simd_builtin.h b/libstdc++-v3/include/experimental/bits/simd_builtin.h index 8337fa2d9a6..64ef6efaf8c 100644 --- a/libstdc++-v3/include/experimental/bits/simd_builtin.h +++ b/libstdc++-v3/include/experimental/bits/simd_builtin.h @@ -1628,7 +1628,7 @@ _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, _MaskMember<_Tp> _ if constexpr (_UW_size == _TV_size) // one convert+store { const _UW __converted = __convert<_UW>(__v); - _SuperImpl::_S_masked_store_nocvt( + _UAbi::_SimdImpl::_S_masked_store_nocvt( __converted, __mem, _UAbi::_MaskImpl::template _S_convert< __int_for_sizeof_t<_Up>>(__k)); @@ -1643,7 +1643,7 @@ _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, _MaskMember<_Tp> _ const array<_UV, _NAllStores> __converted = __convert_all<_UV, _NAllStores>(__v); __execute_n_times<_NFullStores>([&](auto __i) _GLIBCXX_SIMD_ALWAYS_INLINE_LAMBDA { - _SuperImpl::_S_masked_store_nocvt( + _UAbi::_SimdImpl::_S_masked_store_nocvt( _UW(__converted[__i]), __mem + __i * _UW_size, _UAbi::_MaskImpl::template _S_convert< __int_for_sizeof_t<_Up>>( @@ -1651,7 +1651,7 @@ _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, _MaskMember<_Tp> _ }); if constexpr (_NAllStores > _NFullStores) // one partial at the end - _SuperImpl::_S_masked_store_nocvt( + _UAbi::_SimdImpl::_S_masked_store_nocvt( _UW(__converted[_NFullStores]), __mem + _NFullStores * _UW_size, _UAbi::_MaskImpl::template _S_convert< diff --git a/libstdc++-v3/include/experimental/bits/simd_x86.h b/libstdc++-v3/include/experimental/bits/simd_x86.h index 77d2f84ab71..2e301e45677 100644 --- a/libstdc++-v3/include/experimental/bits/simd_x86.h +++ b/libstdc++-v3/include/experimental/bits/simd_x86.h @@ -1106,31 +1106,6 @@ _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, _SimdWrapper= 4 or sizeof(_vi) <= 32 - // with Skylake-AVX512, __have_avx512bw is true - else if constexpr (__have_sse2) - { - using _M = __vector_type_t<_Tp, _Np>; - using _MVT = _VectorTraits<_M>; - _mm_maskmoveu_si128(__auto_bitcast(__extract<0, 4>(__v._M_data)), - __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>(__k._M_data)), - reinterpret_cast(__mem)); - _mm_maskmoveu_si128(__auto_bitcast(__extract<1, 4>(__v._M_data)), - __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>( - __k._M_data >> 1 * _MVT::_S_full_size)), - reinterpret_cast(__mem) + 1 * 16); - _mm_maskmoveu_si128(__auto_bitcast(__extract<2, 4>(__v._M_data)), - __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>( - __k._M_data >> 2 * _MVT::_S_full_size)), - reinterpret_cast(__mem) + 2 * 16); - if constexpr (_Np > 48 / sizeof(_Tp)) - _mm_maskmoveu_si128( - __auto_bitcast(__extract<3, 4>(__v._M_data)), - __auto_bitcast(_MaskImpl::template _S_convert<_Tp, _Np>( - __k._M_data >> 3 * _MVT::_S_full_size)), - reinterpret_cast(__mem) + 3 * 16); - } -#endif else __assert_unreachable<_Tp>(); } @@ -1233,8 +1208,8 @@ _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, else if constexpr (__have_avx && sizeof(_Tp) == 8) _mm_maskstore_pd(reinterpret_cast(__mem), __ki, __vector_bitcast(__vi)); - else if constexpr (__have_sse2) - _mm_maskmoveu_si128(__vi, __ki, reinterpret_cast(__mem)); + else + _Base::_S_masked_store_nocvt(__v, __mem, __k); } else if constexpr (sizeof(__v) == 32) { @@ -1259,13 +1234,8 @@ _S_masked_store_nocvt(_SimdWrapper<_Tp, _Np> __v, _Tp* __mem, else if constexpr (__have_avx && sizeof(_Tp) == 8) _mm256_maskstore_pd(reinterpret_cast(__mem), __ki, __vector_bitcast(__v)); - else if constexpr (__have_sse2) - { - _mm_maskmoveu_si128(__lo128(__vi), __lo128(__ki), - reinterpret_cast(__mem)); - _mm_maskmoveu_si128(__hi128(__vi), __hi128(__ki), - reinterpret_cast(__mem) + 16); - } + else + _Base::_S_masked_store_nocvt(__v, __mem, __k); } else __assert_unreachable<_Tp>();