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Wed, 11 Jan 2023 13:21:24 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4BA7A2004B; Wed, 11 Jan 2023 13:21:24 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4F80020040; Wed, 11 Jan 2023 13:21:22 +0000 (GMT) Received: from [9.197.230.44] (unknown [9.197.230.44]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 11 Jan 2023 13:21:21 +0000 (GMT) Message-ID: <1127c311-f580-78a8-abdc-a2626efb7b29@linux.ibm.com> Date: Wed, 11 Jan 2023 21:21:19 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.6.1 Content-Language: en-US To: GCC Patches Cc: Segher Boessenkool , David Edelsohn , Peter Bergner Subject: [PATCH] rs6000: Imply VSX early to adopt some checkings on conflict [PR108240] X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: DdBZoOFa8DAkKRb97n3kQGZ-PeJljB9k X-Proofpoint-GUID: AwT7fC2aZwccsC6lqdw-Ss6rHBwLJj_W X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-11_06,2023-01-11_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 adultscore=0 suspectscore=0 mlxlogscore=978 phishscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 mlxscore=0 spamscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2301110096 X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "Kewen.Lin via Gcc-patches" From: "Kewen.Lin" Reply-To: "Kewen.Lin" Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754732522366278669?= X-GMAIL-MSGID: =?utf-8?q?1754732522366278669?= Hi, As PR108240 shows, some options like -mmodulo can enable some flags implicitly including OPTION_MASK_VSX. But the enabled flag can conflict with some existing setting like soft float, it would result in some unexpected cases and consequent ICE. Actually there are already some checkings for VSX vs. soft float and no altivec etc., but unfortunately they happens ahead of the implicit enablements, and we can not postpone them since they can affect the generation of ignore_masks which is used in the following implicit enablements. This patch is to imply OPTION_MASK_VSX early for those options which will enable it implicitly later, put it right before the checkings for the possible conflicts with TARGET_VSX, then it's able to check if there are some possible conflicts, and prevent the unexpected (incompatible) cases if yes, otherwise it would be just the same as before (both would have it implied just at the different timings). Bootstrapped and regtested on powerpc64-linux-gnu P8 and powerpc64le-linux-gnu P9 and P10. Is it ok for trunk? BR, Kewen ----- PR target/108240 gcc/ChangeLog: * config/rs6000/rs6000.cc (rs6000_option_override_internal): Enable OPTION_MASK_VSX early to make the checkings on VSX conflicts take effect. gcc/testsuite/ChangeLog: * gcc.target/powerpc/ppc-fortran/pr108240.f90: New test. --- gcc/config/rs6000/rs6000.cc | 17 ++++++++++++ .../powerpc/ppc-fortran/pr108240.f90 | 27 +++++++++++++++++++ 2 files changed, 44 insertions(+) create mode 100644 gcc/testsuite/gcc.target/powerpc/ppc-fortran/pr108240.f90 -- 2.37.0 diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 6ac3adcec6b..c3582976521 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -3794,6 +3794,23 @@ rs6000_option_override_internal (bool global_init_p) & OPTION_MASK_DIRECT_MOVE)) rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; + /* Some options can enable OPTION_MASK_VSX implicitly, but the implicit + enablement is after the below checking and adjustment for TARGET_VSX, + it can result in some unexpected situation, like PR108240 without + hard float but vsx support, which is supposed to be checked and then + prevented in the below handlings for TARGET_VSX. So for any options + which can imply OPTION_MASK_VSX later, we want to imply it first here + to make the following checking take effects. */ + if (!(rs6000_isa_flags_explicit & OPTION_MASK_VSX) + && (TARGET_P9_VECTOR + || TARGET_MODULO + || TARGET_P9_MISC + || TARGET_P9_MINMAX + || TARGET_P8_VECTOR + || TARGET_DIRECT_MOVE + || TARGET_CRYPTO)) + rs6000_isa_flags |= OPTION_MASK_VSX; + /* Add some warnings for VSX. */ if (TARGET_VSX) { diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fortran/pr108240.f90 b/gcc/testsuite/gcc.target/powerpc/ppc-fortran/pr108240.f90 new file mode 100644 index 00000000000..d5ae80321ef --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fortran/pr108240.f90 @@ -0,0 +1,27 @@ +! { dg-options "-mmodulo -mcpu=401" } +! This need one explicit 64 bit option on 64 bit environment +! to avoid possible error or warning message. +! { dg-additional-options "-m64" { target lp64 } } + +! Verify there is no ICE on 64 bit environment. + +program main + implicit none + integer, parameter :: n=4 + character(len=4), dimension(n,n) :: c + integer, dimension(n,n) :: a + integer, dimension(2) :: res1, res2 + real, dimension(n,n) :: r + integer :: i,j + character(len=4,kind=4), dimension(n,n) :: c4 + + call random_number (r) + a = int(r*100) + + do j=1,n + do i=1,n + write (*,*) a(i,j) + end do + end do + +end program main