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(175.177.45.176 with ) by smtp5002.mail.kks.ynwp.yahoo.co.jp with SMTP; 15 Jul 2022 23:17:25 -0000 X-YMail-JAS: 7S.n7mQVM1n1gK6K9KoocZEjJa_K6esif9ZpbyWlDmW8juTXX9k4JgY3wZjY_JM5XJM4SigD82YXFcwaNDd5bXYVaIavv9QrfO9ynusuoFEpYs1_i4ufa1UG1ysmg3H0nKAd1fwlUA-- X-Apparently-From: X-YMail-OSG: bA51jPwVM1lFyzB0LUg5CxRW2HxYQQmlRjHuKPNg3msuU55 _HHb61hFex5JB2uX5kqElmqi2rMPV6UenZxZpdDKzI1sVqUY9IiQ9GdUPmIC .a8sr3FCEMml5K4yCvH5c0.TsOQbhLgcdh8xs0VCto_vxHph1BWv.AtInZI5 8sv03vRWnzpbNBM2OHZHDBTBhZPwZeKUhcdeW5kS9lwM.ch99G7.0vu614ha YV9lP6dhxsNjmKM2BXGBXmHw_ybShuKk0regxvJ5Qr9lE28HZV1LLrpOO3tr dU_DxNzN.BXWp6DEhfmw7sfDpcz6C2bAalrdVj9e_Od8JfmOM9cE3OiaelYw VpkyWXz4XMTXcAwGraMEqk120Pbtv8GUo137Fc.fHAuys2rN5zXfB8M9rXRG NWp_SQQNVljyQtnuttjTrU.AQets2v0G._GGUfMrdGUvLigwPn3d.RG05zI3 1r1dnGRFh7s01Qahsb1bN2_te925gFNadk_hxQ5zMUzQeTvyYW2eZBZ1NuMz gcIPZBQMHoQwT_yr87AX_E0XQEkHsLdf_lQIOLuZvo2ofc.slJFpK_ICfXX6 UcIVQn8zbvEoouD4_9PuwZdANy2cjIxh24JHk800zebMZ878a0KTPrGSWKdN lwtjpp4BB0r9GxUKqMSln8pkDz23dHhUQj2wxQAPKYFMYiw58aO4yYpbvo8O h83L8vlfP1oj8gs5LPaG3AWcjs1YJrlmpgJkbb9NbG3Ti6ljvalK_Hzx16dN sx4BZjgun5vuaWmly7vgpYGujpJf5gnrQx5lQk5hBa0xrxKeQ6qVuDR7REZV DsBv_nl2v1VSZJZ6Bi_lt_WtND6CkFgxzIMkMKUwJYCVicp8cHKMIo02RU0x fcpkdf_8naqvdeYsQeZv1oTNR17AjxGnpNsWcKyXPjXs644yhA_6WxVkzCH_ t3IiEbS6dCKgFuV95Dg-- Message-ID: <0e1e513e-414f-20a6-3332-48ab90bbd371@yahoo.co.jp> Date: Fri, 15 Jul 2022 19:51:40 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.0.2 Content-Language: en-US To: GCC Patches Subject: [PATCH 2/2] xtensa: Optimize "bitwise AND with imm1" followed by "branch if (not) equal to imm2" X-Spam-Status: No, score=-12.0 required=5.0 tests=BAYES_00, DATE_IN_PAST_12_24, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Takayuki 'January June' Suwa via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: Takayuki 'January June' Suwa Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1738462573916929620?= X-GMAIL-MSGID: =?utf-8?q?1738462573916929620?= This patch enhances the effectiveness of the previously posted one: "xtensa: Optimize bitwise AND operation with some specific forms of constants". /* example */ extern void foo(int); void test(int a) { if ((a & (-1U << 8)) == (128 << 8)) /* 0 or one of "b4const" */ foo(a); } ;; before .global test test: movi a3, -0x100 movi.n a4, 1 and a3, a2, a3 slli a4, a4, 15 bne a3, a4, .L3 j.l foo, a9 .L1: ret.n ;; after .global test test: srli a3, a2, 8 bnei a3, 128, .L1 j.l foo, a9 .L1: ret.n gcc/ChangeLog: * config/xtensa/xtensa.md (*masktrue_const_pow2_minus_one, *masktrue_const_negative_pow2, *masktrue_const_shifted_mask): If the immediate for bitwise AND is represented as '-(1 << N)', decrease the lower bound of N from 12 to 1. And the other immediate for conditional branch is now no longer limited to zero, but also one of some positive integers. Finally, remove the checks of some conditions, because the comparison expressions that don't satisfy such checks are determined as compile-time constants and thus will be optimized away before RTL expansion. --- gcc/config/xtensa/xtensa.md | 73 ++++++++++++++++++++++--------------- 1 file changed, 44 insertions(+), 29 deletions(-) diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 6a58d3e2776..c02f1a56641 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -1716,63 +1716,78 @@ (define_insn_and_split "*masktrue_const_pow2_minus_one" [(set (pc) - (if_then_else (match_operator 3 "boolean_operator" + (if_then_else (match_operator 4 "boolean_operator" [(and:SI (match_operand:SI 0 "register_operand" "r") (match_operand:SI 1 "const_int_operand" "i")) - (const_int 0)]) - (label_ref (match_operand 2 "" "")) + (match_operand:SI 2 "const_int_operand" "i")]) + (label_ref (match_operand 3 "" "")) (pc)))] - "IN_RANGE (exact_log2 (INTVAL (operands[1]) + 1), 17, 31)" + "IN_RANGE (exact_log2 (INTVAL (operands[1]) + 1), 17, 31) + /* && (~INTVAL (operands[1]) & INTVAL (operands[2])) == 0 // can be omitted */ + && xtensa_b4const_or_zero (INTVAL (operands[2]) << (32 - floor_log2 (INTVAL (operands[1]) + 1)))" "#" "&& can_create_pseudo_p ()" - [(set (match_dup 4) + [(set (match_dup 5) (ashift:SI (match_dup 0) (match_dup 1))) (set (pc) - (if_then_else (match_op_dup 3 - [(match_dup 4) - (const_int 0)]) - (label_ref (match_dup 2)) + (if_then_else (match_op_dup 4 + [(match_dup 5) + (match_dup 2)]) + (label_ref (match_dup 3)) (pc)))] { - operands[1] = GEN_INT (32 - floor_log2 (INTVAL (operands[1]) + 1)); - operands[4] = gen_reg_rtx (SImode); + int shift = 32 - floor_log2 (INTVAL (operands[1]) + 1); + operands[1] = GEN_INT (shift); + operands[2] = GEN_INT (INTVAL (operands[2]) << shift); + operands[5] = gen_reg_rtx (SImode); } [(set_attr "type" "jump") (set_attr "mode" "none") (set (attr "length") - (if_then_else (match_test "TARGET_DENSITY - && INTVAL (operands[1]) == 0x7FFFFFFF") - (const_int 5) - (const_int 6)))]) + (if_then_else (match_test "(TARGET_DENSITY && INTVAL (operands[1]) == 0x7FFFFFFF) + && INTVAL (operands[2]) == 0") + (const_int 4) + (if_then_else (match_test "TARGET_DENSITY + && (INTVAL (operands[1]) == 0x7FFFFFFF + || INTVAL (operands[2]) == 0)") + (const_int 5) + (const_int 6))))]) (define_insn_and_split "*masktrue_const_negative_pow2" [(set (pc) - (if_then_else (match_operator 3 "boolean_operator" + (if_then_else (match_operator 4 "boolean_operator" [(and:SI (match_operand:SI 0 "register_operand" "r") (match_operand:SI 1 "const_int_operand" "i")) - (const_int 0)]) - (label_ref (match_operand 2 "" "")) + (match_operand:SI 2 "const_int_operand" "i")]) + (label_ref (match_operand 3 "" "")) (pc)))] - "IN_RANGE (exact_log2 (-INTVAL (operands[1])), 12, 30)" + "IN_RANGE (exact_log2 (-INTVAL (operands[1])), 1, 30) + /* && (~INTVAL (operands[1]) & INTVAL (operands[2])) == 0 // can be omitted */ + && xtensa_b4const_or_zero (INTVAL (operands[2]) >> floor_log2 (-INTVAL (operands[1])))" "#" "&& can_create_pseudo_p ()" - [(set (match_dup 4) + [(set (match_dup 5) (lshiftrt:SI (match_dup 0) (match_dup 1))) (set (pc) - (if_then_else (match_op_dup 3 - [(match_dup 4) - (const_int 0)]) - (label_ref (match_dup 2)) + (if_then_else (match_op_dup 4 + [(match_dup 5) + (match_dup 2)]) + (label_ref (match_dup 3)) (pc)))] { - operands[1] = GEN_INT (floor_log2 (-INTVAL (operands[1]))); - operands[4] = gen_reg_rtx (SImode); + int shift = floor_log2 (-INTVAL (operands[1])); + operands[1] = GEN_INT (shift); + operands[2] = GEN_INT (INTVAL (operands[2]) >> shift); + operands[5] = gen_reg_rtx (SImode); } [(set_attr "type" "jump") (set_attr "mode" "none") - (set_attr "length" "6")]) + (set (attr "length") + (if_then_else (match_test "TARGET_DENSITY && INTVAL (operands[2]) == 0") + (const_int 5) + (const_int 6)))]) (define_insn_and_split "*masktrue_const_shifted_mask" [(set (pc) @@ -1782,8 +1797,8 @@ (match_operand:SI 2 "const_int_operand" "i")]) (label_ref (match_operand 3 "" "")) (pc)))] - "(INTVAL (operands[2]) & ((1 << ctz_hwi (INTVAL (operands[1]))) - 1)) == 0 - && xtensa_b4const_or_zero ((uint32_t)INTVAL (operands[2]) >> ctz_hwi (INTVAL (operands[1])))" + "/* (INTVAL (operands[2]) & ((1 << ctz_hwi (INTVAL (operands[1]))) - 1)) == 0 // can be omitted + && */ xtensa_b4const_or_zero ((uint32_t)INTVAL (operands[2]) >> ctz_hwi (INTVAL (operands[1])))" "#" "&& can_create_pseudo_p ()" [(set (match_dup 6)