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[committed] RISC-V: Fix xtheadcondmov-indirect.c

Message ID 0d3fdb2f-9c88-675d-b1dc-efdb1532b354@ventanamicro.com
State Unresolved
Headers
Series [committed] RISC-V: Fix xtheadcondmov-indirect.c |

Checks

Context Check Description
snail/gcc-patch-check warning Git am fail log

Commit Message

Jeff Law Aug. 27, 2023, 6:40 p.m. UTC 
  The pressure sensitive scheduling change perturbs the output ever so 
slightly for this test.  Seemed easiest to just turn that off rather 
than generalize the expected output enough to work across all the 
relevant optimization options.

Pushed to the trunk.

Jeff
commit b3b13fb1cbad6e5836dee947e85d2954bcacabed
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Sun Aug 27 12:38:30 2023 -0600

    RISC-V: Fix xtheadcondmov-indirect.c
    
    The pressure sensitive scheduling change perturbs the output ever so slightly
    for this test.  Seemed easiest to just turn that off rather than generalize the
    expected output enough to work across all the relevant optimization options.
    
    gcc/testsuite/
            * gcc.target/riscv/xtheadcondmov-indirect.c: Turn off pressure
            sensitive scheduling.
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Patch

diff --git a/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect.c b/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect.c
index 8292999d0c7..c3253ba5239 100644
--- a/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect.c
+++ b/gcc/testsuite/gcc.target/riscv/xtheadcondmov-indirect.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_xtheadcondmov" { target { rv32 } } } */
-/* { dg-options "-march=rv64gc_xtheadcondmov" { target { rv64 } } } */
+/* { dg-options "-march=rv32gc_xtheadcondmov -fno-sched-pressure" { target { rv32 } } } */
+/* { dg-options "-march=rv64gc_xtheadcondmov -fno-sched-pressure" { target { rv64 } } } */
 /* { dg-skip-if "" { *-*-* } {"-O0" "-Os" "-Og" "-Oz" "-flto" } } */
 /* { dg-final { check-function-bodies "**" "" } } */