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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id i5-20020a170906850500b0099bc0f17468si4200400ejx.866.2023.08.02.10.21.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Aug 2023 10:21:32 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=TMGMUbZR; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 76AA7385840A for ; Wed, 2 Aug 2023 17:21:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 76AA7385840A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1690996891; bh=aJDPU7pUFiKBKbOC9u1cA+DEy38H73gusB3otCOcvl4=; h=Date:Subject:To:Cc:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=TMGMUbZR4LMlgdXFCSMemS/eJcqgh6gseFuda0nh+DvaHkHwVF5ZwYDWmKHXlZ2VK T/Zh+MftM0gxVoIM7D5zmCRbc4tp06M9X+mALyIrSHHjXZGyUaP2ji6YWvruDka1VN 2e8CS9ZxGi4T3SMkilgkveuTB8qAdRXHbpEequYw= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-io1-xd2b.google.com (mail-io1-xd2b.google.com [IPv6:2607:f8b0:4864:20::d2b]) by sourceware.org (Postfix) with ESMTPS id 7C3AC385841B for ; Wed, 2 Aug 2023 17:20:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 7C3AC385841B Received: by mail-io1-xd2b.google.com with SMTP id ca18e2360f4ac-7835c92c373so30452539f.0 for ; Wed, 02 Aug 2023 10:20:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1690996844; x=1691601644; h=cc:to:subject:from:content-language:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=aJDPU7pUFiKBKbOC9u1cA+DEy38H73gusB3otCOcvl4=; b=C/mBjyGqocnrqBGPB9XYaXYm7XGJzIe3AsXEwcc6ArgGrzSe0rX5SGeCgdPEqSQRgw I74cD07HxxLAgtQLaZCYSfBJSFaT1beQCCtk6U590avLSC6CqozQCCdCbdHK3Nat+eHh QOkn5RwvAXXHJOLte2MNaEXUNg6gNcTXRCxv3AgDLt6dtekMppMuxDxms1u04a1NWXI6 H3AeEJwQ0b0hRK0S7qNJ5LGMqPx5amiWqYp5rVMMyq/B8L25eeEhDWvZQT8J03IWLy3s L1ni8U93jL/Wmf1kr/z4tB3Fhb/9qASTnWRPNFoq+6ML6NimJqZm5ze3/rZqhH4fykqx 4+9A== X-Gm-Message-State: ABy/qLbb1LYGh9ENoPvCCgaVKSsC85rgGKCVb6HG4bN0LVmd5xmQwhDw af62gwtPd6kR37f3JnvN4EqfiOjU5GNuxA== X-Received: by 2002:a05:6e02:1569:b0:349:716:1fe8 with SMTP id k9-20020a056e02156900b0034907161fe8mr18188617ilu.16.1690996844075; Wed, 02 Aug 2023 10:20:44 -0700 (PDT) Received: from [172.31.1.103] ([172.56.169.141]) by smtp.gmail.com with ESMTPSA id z16-20020a92cd10000000b003423875af1bsm4652969iln.1.2023.08.02.10.20.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Aug 2023 10:20:43 -0700 (PDT) Message-ID: <003943c5-c68c-0d15-8f2f-b890cd7b17e1@gmail.com> Date: Wed, 2 Aug 2023 11:20:40 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Content-Language: en-US Subject: [committed][RISC-V] Fix 20010221-1.c with zicond To: "gcc-patches@gcc.gnu.org" Cc: Xiao Zeng X-Spam-Status: No, score=-8.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jeff Law via Gcc-patches From: Jeff Law Reply-To: Jeff Law Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773138757822384665 X-GMAIL-MSGID: 1773138757822384665 So we're being a bit too aggressive with the .opt zicond patterns. > (define_insn "*czero.eqz..opt1" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "1") > (match_operand:GPR 3 "register_operand" "r")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])" > "czero.eqz\t%0,%3,%1" > ) > The RTL semantics here are op0 = (op1 == 0) ? op1 : op2. That maps directly to czero.eqz. ie, we select op1 when we know it's zero, op2 otherwise. So this pattern is fine. > (define_insn "*czero.eqz..opt2" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "r") > (match_operand:GPR 3 "register_operand" "1")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])" > "czero.nez\t%0,%2,%1" > ) The RTL semantics of this pattern are are: op0 = (op1 == 0) ? op2 : op1; That's not something that can be expressed by the zicond extension as it selects op1 if and only if op1 is not equal to zero. > (define_insn "*czero.nez..opt3" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "r") > (match_operand:GPR 3 "register_operand" "1")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])" > "czero.eqz\t%0,%2,%1" > ) The RTL semantics of this pattern are op0 = (op1 != 0) ? op2 : op1. That maps to czero.nez. But the output template uses czero.eqz. Opps. > (define_insn "*czero.nez..opt4" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "1") > (match_operand:GPR 3 "register_operand" "r")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])" > "czero.nez\t%0,%3,%1" > ) The RTL semantics of this pattern are op0 = (op1 != 0) ? op1 : op2 which obviously doesn't match to any zicond instruction as op1 is selected when it is not zero. So two of the patterns are just totally bogus as they are not implementable with zicond. They are removed. The asm template for the .opt3 pattern is fixed to use czero.nez and its name is changed to .opt2. This fixes the known issues with the zicond.md bits. Onward to the rest of the expansion work :-) Committed to the trunk, jeff commit 1d5bc3285e8a115538442dc2aaa34d2b509e1f6e Author: Jeff Law Date: Wed Aug 2 13:16:23 2023 -0400 [committed][RISC-V] Fix 20010221-1.c with zicond So we're being a bit too aggressive with the .opt zicond patterns. > (define_insn "*czero.eqz..opt1" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "1") > (match_operand:GPR 3 "register_operand" "r")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])" > "czero.eqz\t%0,%3,%1" > ) The RTL semantics here are op0 = (op1 == 0) ? op1 : op2. That maps directly to czero.eqz. ie, we select op1 when we know it's zero, op2 otherwise. So this pattern is fine. > (define_insn "*czero.eqz..opt2" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "r") > (match_operand:GPR 3 "register_operand" "1")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])" > "czero.nez\t%0,%2,%1" > ) The RTL semantics of this pattern are are: op0 = (op1 == 0) ? op2 : op1; That's not something that can be expressed by the zicond extension as it selects op1 if and only if op1 is not equal to zero. > (define_insn "*czero.nez..opt3" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "r") > (match_operand:GPR 3 "register_operand" "1")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[3])" > "czero.eqz\t%0,%2,%1" > ) The RTL semantics of this pattern are op0 = (op1 != 0) ? op2 : op1. That maps to czero.nez. But the output template uses czero.eqz. Opps. > (define_insn "*czero.nez..opt4" > [(set (match_operand:GPR 0 "register_operand" "=r") > (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r") > (const_int 0)) > (match_operand:GPR 2 "register_operand" "1") > (match_operand:GPR 3 "register_operand" "r")))] > "(TARGET_ZICOND || 1) && rtx_equal_p (operands[1], operands[2])" > "czero.nez\t%0,%3,%1" > ) The RTL semantics of this pattern are op0 = (op1 != 0) ? op1 : op2 which obviously doesn't match to any zicond instruction as op1 is selected when it is not zero. So two of the patterns are just totally bogus as they are not implementable with zicond. They are removed. The asm template for the .opt3 pattern is fixed to use czero.nez and its name is changed to .opt2. gcc/ * config/riscv/zicond.md: Remove incorrect zicond patterns and renumber/rename them. (zero.nez..opt2): Fix output string. diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md index 8f24b3a1690..25f21d33487 100644 --- a/gcc/config/riscv/zicond.md +++ b/gcc/config/riscv/zicond.md @@ -53,32 +53,12 @@ (define_insn "*czero.eqz..opt1" "czero.eqz\t%0,%3,%1" ) -(define_insn "*czero.eqz..opt2" - [(set (match_operand:GPR 0 "register_operand" "=r") - (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r") - (const_int 0)) - (match_operand:GPR 2 "register_operand" "r") - (match_operand:GPR 3 "register_operand" "1")))] - "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])" - "czero.nez\t%0,%2,%1" -) - -(define_insn "*czero.nez..opt3" +(define_insn "*czero.nez..opt2" [(set (match_operand:GPR 0 "register_operand" "=r") (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r") (const_int 0)) (match_operand:GPR 2 "register_operand" "r") (match_operand:GPR 3 "register_operand" "1")))] "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])" - "czero.eqz\t%0,%2,%1" -) - -(define_insn "*czero.nez..opt4" - [(set (match_operand:GPR 0 "register_operand" "=r") - (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r") - (const_int 0)) - (match_operand:GPR 2 "register_operand" "1") - (match_operand:GPR 3 "register_operand" "r")))] - "TARGET_ZICOND && rtx_equal_p (operands[1], operands[2])" - "czero.nez\t%0,%3,%1" + "czero.nez\t%0,%2,%1" )