Show patches with: Submitter = Prathamesh Kulkarni       |    Archived = No       |   16 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[aarch64] PR112950: gcc.target/aarch64/sve/acle/general/dupq_5.c fails on aarch64_be-linux-gnu [aarch64] PR112950: gcc.target/aarch64/sve/acle/general/dupq_5.c fails on aarch64_be-linux-gnu - - - 1-- 2024-01-27 Prathamesh Kulkarni Accepted
[aarch64] PR111702 - ICE in insert_regs after interleave+zip1 vector initialization patch [aarch64] PR111702 - ICE in insert_regs after interleave+zip1 vector initialization patch - - - 1-- 2023-11-23 Prathamesh Kulkarni Accepted
PR111754 PR111754 - - - -1- 2023-10-20 Prathamesh Kulkarni Unresolved
PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding - - - -1- 2023-10-04 Prathamesh Kulkarni Unresolved
[AArch64,testsuite] Adjust vect_copy_lane_1.c for new code-gen [AArch64,testsuite] Adjust vect_copy_lane_1.c for new code-gen - - - 1-- 2023-09-13 Prathamesh Kulkarni Accepted
[gcc-13] Backport PR10280 fix [gcc-13] Backport PR10280 fix - - - 1-- 2023-07-26 Prathamesh Kulkarni Accepted
[RFC,v2] Extend fold_vec_perm to handle VLA vectors [RFC,v2] Extend fold_vec_perm to handle VLA vectors - - - 1-- 2023-07-17 Prathamesh Kulkarni Accepted
[SVE] Fold svdupq to VEC_PERM_EXPR if elements are not constant [SVE] Fold svdupq to VEC_PERM_EXPR if elements are not constant - - - 1-- 2023-06-27 Prathamesh Kulkarni Accepted
[SVE,match.pd] Fix ICE observed in PR110280 [SVE,match.pd] Fix ICE observed in PR110280 - - - 1-- 2023-06-20 Prathamesh Kulkarni Accepted
[aarch64] Use force_reg instead of copy_to_mode_reg [aarch64] Use force_reg instead of copy_to_mode_reg - - - -1- 2023-04-21 Prathamesh Kulkarni Repeat Merge
[match.pd,SVE] Add pattern to transform svrev(svrev(v)) --> v [match.pd,SVE] Add pattern to transform svrev(svrev(v)) --> v - - - 1-- 2023-04-05 Prathamesh Kulkarni Accepted
[aarch64] Code-gen for vector initialization involving constants [aarch64] Code-gen for vector initialization involving constants - - - 1-- 2023-02-03 Prathamesh Kulkarni Accepted
[aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns. [aarch64] Use exact_log2 (INTVAL (operands[2])) >= 0 to gate for vec_merge patterns. - - - 1-- 2023-01-18 Prathamesh Kulkarni Accepted
[aarch64] Use wzr/xzr for assigning vector element to 0 [aarch64] Use wzr/xzr for assigning vector element to 0 - - - 1-- 2023-01-17 Prathamesh Kulkarni Accepted
[aarch64] PR107920 - Fix incorrect handling of virtual operands in svld1rq_impl::fold [aarch64] PR107920 - Fix incorrect handling of virtual operands in svld1rq_impl::fold - - - 1-- 2022-12-02 Prathamesh Kulkarni Accepted
[aarch64] Use dup and zip1 for interleaving elements in initializing vector [aarch64] Use dup and zip1 for interleaving elements in initializing vector - - - 1-- 2022-11-29 Prathamesh Kulkarni Accepted