Show patches with: Series = [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs       |    Archived = No       |   8 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[8/8] AArch64: Have reload not choose to do add on the scalar side if both values exist on the SIMD… [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[7/8] AArch64: Consolidate zero and sign extension patterns and add missing ones. [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[6/8] AArch64: Add peephole and scheduling logic for pairwise operations that appear late in RTL. [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[5/8] AArch64 aarch64: Make existing V2HF be usable. [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[4/8] AArch64 aarch64: Implement widening reduction patterns [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[3/8] middle-end: Support extractions of subvectors from arbitrary element position inside a vector [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[2/8] middle-end: Recognize scalar widening reductions [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved
[1/8] middle-end: Recognize scalar reductions from bitfields and array_refs [1/8] middle-end: Recognize scalar reductions from bitfields and array_refs - - - -1- 2022-10-31 Tamar Christina Unresolved