Show patches with: Submitter = liuhongt       |    Archived = No       |   163 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existe… [vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existe… - - - -1- 2023-06-20 liuhongt Unresolved
[2/2] Refined 256/512-bit vpacksswb/vpackssdw patterns. [1/2] Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_truncate. - - - 1-- 2023-06-16 liuhongt Accepted
[1/2] Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_truncate. [1/2] Reimplement packuswb/packusdw with UNSPEC_US_TRUNCATE instead of original us_truncate. - - - 1-- 2023-06-16 liuhongt Accepted
[x86] Use x instead of v for alternative 2 (v, BH) in mov<mode>_internal. [x86] Use x instead of v for alternative 2 (v, BH) in mov<mode>_internal. - - - 1-- 2023-06-14 liuhongt Accepted
[1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE. [1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE. - - - -1- 2023-06-06 liuhongt Unresolved
[v2] Explicitly view_convert_expr mask to signed type when folding pblendvb builtins. [v2] Explicitly view_convert_expr mask to signed type when folding pblendvb builtins. - - - 1-- 2023-06-06 liuhongt Accepted
Don't fold _mm{, 256}_blendv_epi8 into (mask < 0 ? src1 : src2) when -funsigned-char. Don't fold _mm{, 256}_blendv_epi8 into (mask < 0 ? src1 : src2) when -funsigned-char. - - - 1-- 2023-06-06 liuhongt Accepted
Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE. Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE. - - - -1- 2023-06-06 liuhongt Unresolved
[x86] Add missing vec_pack/unpacks patterns for _Float16 <-> int/float conversion. [x86] Add missing vec_pack/unpacks patterns for _Float16 <-> int/float conversion. - - - 1-- 2023-06-05 liuhongt Accepted
[vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existe… [vect] Use intermiediate integer type for float_expr/fix_trunc_expr when direct optab is not existe… - - - 1-- 2023-06-02 liuhongt Accepted
i386: Add missing vector truncate patterns [PR92658]. i386: Add missing vector truncate patterns [PR92658]. - - - 1-- 2023-06-02 liuhongt Accepted
Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range. Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range. - - - -1- 2023-06-01 liuhongt Unresolved
Disable avoid_false_dep_for_bmi for atom and icelake(and later) core processors. Disable avoid_false_dep_for_bmi for atom and icelake(and later) core processors. - - - 1-- 2023-05-26 liuhongt Accepted
[x86] Split notl + pbraodcast + pand to pbroadcast + pandn more modes. [x86] Split notl + pbraodcast + pand to pbroadcast + pandn more modes. - - - 1-- 2023-05-26 liuhongt Accepted
Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABS_EXPR. Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABS_EXPR. - - - 1-- 2023-05-22 liuhongt Accepted
Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode. Only use NO_REGS in cost calculation when !hard_regno_mode_ok for GENERAL_REGS and mode. - - - 1-- 2023-05-17 liuhongt Accepted
[V2] Provide -fcf-protection=branch,return. [V2] Provide -fcf-protection=branch,return. - - - 1-- 2023-05-13 liuhongt Accepted
Provide -fcf-protection=branch,return. Provide -fcf-protection=branch,return. - - - 1-- 2023-05-12 liuhongt Accepted
x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR. x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR. - - - -1- 2023-05-10 liuhongt Unresolved
Detect bswap + rotate for byte permutation in pass_bswap. Detect bswap + rotate for byte permutation in pass_bswap. - - - 1-- 2023-05-09 liuhongt Accepted
[V2,vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision. [V2,vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision. - - - 1-- 2023-05-08 liuhongt Accepted
[powerpc] Add a peephole2 to eliminate redundant move from VSX_REGS to GENERAL_REGS when it's from … [powerpc] Add a peephole2 to eliminate redundant move from VSX_REGS to GENERAL_REGS when it's from … - - - 1-- 2023-05-04 liuhongt Accepted
[v2] Canonicalize vec_merge when mask is constant. [v2] Canonicalize vec_merge when mask is constant. - - - 1-- 2023-05-04 liuhongt Accepted
[vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision. [vect] Enhance NARROW FLOAT_EXPR vectorization by truncating integer to lower precision. - - - 1-- 2023-04-26 liuhongt Accepted
Add testcases for ffs/ctz vectorization. Add testcases for ffs/ctz vectorization. - - - 1-- 2023-04-23 liuhongt Accepted
[2/2,i386] def_or_undef __STDCPP_FLOAT16_T__ and __STDCPP_BFLOAT16_T__ for target attribute/pragmas. [1/2,i386] Support type _Float16/__bf16 independent of SSE2. - - - 1-- 2023-04-21 liuhongt Accepted
[1/2,i386] Support type _Float16/__bf16 independent of SSE2. [1/2,i386] Support type _Float16/__bf16 independent of SSE2. - - - 1-- 2023-04-21 liuhongt Accepted
Canonicalize vec_merge when mask is constant. Canonicalize vec_merge when mask is constant. - - - 1-- 2023-04-20 liuhongt Accepted
[2/2] Adjust testcases after better RA decision. [1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet. - - - 1-- 2023-04-20 liuhongt Accepted
[1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet. [1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet. - - - 1-- 2023-04-20 liuhongt Accepted
[i386] Support type _Float16/__bf16 independent of SSE2. [i386] Support type _Float16/__bf16 independent of SSE2. - - - 1-- 2023-04-19 liuhongt Accepted
Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg cla… Check hard_regno_mode_ok before setting lowest memory move cost for the mode with different reg cla… - - - 1-- 2023-04-04 liuhongt Accepted
Document signbitm2. Document signbitm2. - - - 1-- 2023-03-31 liuhongt Accepted
Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8. Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8. - - - 1-- 2023-03-31 liuhongt Accepted
[V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern na… [V2] Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns* to align with standard pattern na… - - - 1-- 2023-03-30 liuhongt Accepted
Support vector conversion for AVX512 vcvtudq2pd/vcvttps2udq/vcvttpd2udq. Support vector conversion for AVX512 vcvtudq2pd/vcvttps2udq/vcvttpd2udq. - - - 1-- 2023-03-30 liuhongt Accepted
Generate vpblendd instead of vpblendw for V4SI under AVX2. Generate vpblendd instead of vpblendw for V4SI under AVX2. - - - 1-- 2023-03-29 liuhongt Accepted
Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it's not used anymore. Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it's not used anymore. - - - 1-- 2023-03-22 liuhongt Accepted
[vect] Don't peel nonlinear iv(mult or shift) for epilog when vf is not constant. [vect] Don't peel nonlinear iv(mult or shift) for epilog when vf is not constant. - - - 1-- 2023-02-02 liuhongt Accepted
Change AVX512FP16 to AVX512-FP16 which is official name. Change AVX512FP16 to AVX512-FP16 which is official name. - - - -1- 2023-01-29 liuhongt Unresolved
Change AVX512FP16 to AVX512-FP16 in the document. Change AVX512FP16 to AVX512-FP16 in the document. - - - 1-- 2023-01-29 liuhongt Accepted
Don't add crtfastmath.o for -shared. Don't add crtfastmath.o for -shared. - - - 1-- 2023-01-13 liuhongt Accepted
[V2,2/2,x86] x86: Add a new option -mdaz-ftz to enable FTZ and DAZ flags in MXCSR. [V2,1/2] x86: Don't add crtfastmath.o for -shared - - - 1-- 2022-12-15 liuhongt Accepted
[V2,1/2] x86: Don't add crtfastmath.o for -shared [V2,1/2] x86: Don't add crtfastmath.o for -shared - - - 1-- 2022-12-15 liuhongt Accepted
[x86] x86: Don't add crtfastmath.o for -shared and add a new option -mdaz-ftz to enable FTZ and DAZ… [x86] x86: Don't add crtfastmath.o for -shared and add a new option -mdaz-ftz to enable FTZ and DAZ… - - - 1-- 2022-12-14 liuhongt Accepted
[x86] Fix ICE due to condition mismatch between expander and define_insn. [x86] Fix ICE due to condition mismatch between expander and define_insn. - - - 1-- 2022-12-06 liuhongt Accepted
[x86] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1. [x86] Improve ix86_expand_fast_convert_bf_to_sf with new extendbfsf2_1. - - - 1-- 2022-12-02 liuhongt Accepted
[x86] Fix ICE due to incorrect insn type. [x86] Fix ICE due to incorrect insn type. - - - 1-- 2022-12-01 liuhongt Accepted
[1/2,V2] Implement hwasan target_hook. [1/2,V2] Implement hwasan target_hook. - - - 1-- 2022-11-30 liuhongt Accepted
[x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode. [x86] Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of QImode. - - - 1-- 2022-11-28 liuhongt Accepted
[V3,x86] Fix incorrect _mm_cvtsbh_ss. [V3,x86] Fix incorrect _mm_cvtsbh_ss. - - - 1-- 2022-11-25 liuhongt Accepted
[v2,x86] Fix incorrect _mm_cvtsbh_ss. [v2,x86] Fix incorrect _mm_cvtsbh_ss. - - - 1-- 2022-11-24 liuhongt Accepted
[x86] Fix incorrect implementation for mm_cvtsbh_ss. [x86] Fix incorrect implementation for mm_cvtsbh_ss. - - - 1-- 2022-11-23 liuhongt Accepted
[x86] Some tidy up for RA related hooks. [x86] Some tidy up for RA related hooks. - - - 1-- 2022-11-21 liuhongt Accepted
[x86] define builtins for "shared" avxneconvert-avx512bf16vl builtins. [x86] define builtins for "shared" avxneconvert-avx512bf16vl builtins. - - - 1-- 2022-11-18 liuhongt Accepted
[2/2] Enable hwasan for x86-64. Support HWASAN with Intel LAM - - - 1-- 2022-11-11 liuhongt Accepted
[1/2] Implement hwasan target_hook. Support HWASAN with Intel LAM - - - 1-- 2022-11-11 liuhongt Accepted
Fix incorrect insn type to avoid ICE in memory attr auto-detection. Fix incorrect insn type to avoid ICE in memory attr auto-detection. - - - 1-- 2022-11-08 liuhongt Accepted
Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count. Enable more optimization for 32-bit/64-bit shrd/shld with imm shift count. - - - 1-- 2022-10-31 liuhongt Accepted
[V2,x86] Fix incorrect digit constraint [V2,x86] Fix incorrect digit constraint - - - 1-- 2022-10-31 liuhongt Accepted
[x86] Fix incorrect digit constraint [x86] Fix incorrect digit constraint - - - 1-- 2022-10-27 liuhongt Accepted
[x86] Enable V4BFmode and V2BFmode. [x86] Enable V4BFmode and V2BFmode. - - - 1-- 2022-10-26 liuhongt Accepted
Canonicalize vec_perm index to make the first index come from the first vector. Canonicalize vec_perm index to make the first index come from the first vector. - - - 1-- 2022-10-18 liuhongt Accepted
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