Show patches with: Submitter = Jiang, Haochen       |   87 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
i386: Modify testcases failed under -DDEBUG i386: Modify testcases failed under -DDEBUG - - - 1-- 2024-01-22 Jiang, Haochen Accepted
i386: Remove redundant move in vnni pattern i386: Remove redundant move in vnni pattern - - - -1- 2024-01-12 Jiang, Haochen Unresolved
i386: Add AVX10.1 related macros i386: Add AVX10.1 related macros - - - -1- 2024-01-10 Jiang, Haochen Unresolved
Add -mevex512 into invoke.texi Add -mevex512 into invoke.texi - - - -1- 2024-01-10 Jiang, Haochen Unresolved
Add -mevex512 into invoke.texi Add -mevex512 into invoke.texi - - - -1- 2024-01-09 Jiang, Haochen Unresolved
i386: Fix recent testcase fail i386: Fix recent testcase fail - - - -1- 2024-01-08 Jiang, Haochen Unresolved
[gcc-wwwdocs,v2] gcc-13/14: Mention recent update for x86_64 backend [gcc-wwwdocs,v2] gcc-13/14: Mention recent update for x86_64 backend - - - -1- 2023-12-21 Jiang, Haochen Unresolved
i386: Allow 64 bit mask register for -mno-evex512 i386: Allow 64 bit mask register for -mno-evex512 - - - -1- 2023-12-15 Jiang, Haochen Unresolved
i386: Remove RAO-INT from Grand Ridge i386: Remove RAO-INT from Grand Ridge - - - -1- 2023-12-14 Jiang, Haochen Unresolved
i386: Fix PR110790 testcase i386: Fix PR110790 testcase - - - -1- 2023-12-13 Jiang, Haochen Unresolved
[gcc-wwwdocs] gcc-13/14: Mention recent update for x86_64 backend [gcc-wwwdocs] gcc-13/14: Mention recent update for x86_64 backend - - - -1- 2023-12-08 Jiang, Haochen Unresolved
i386: Mark Xeon Phi ISAs as deprecated i386: Mark Xeon Phi ISAs as deprecated - - - --1 2023-12-01 Jiang, Haochen Not Applicable
i386: Fix AVX512 and AVX10 option issues i386: Fix AVX512 and AVX10 option issues - - - -1- 2023-11-23 Jiang, Haochen Unresolved
Initial support for AVX10.1 Initial support for AVX10.1 - - - -1- 2023-11-10 Jiang, Haochen Unresolved
i386: Fix isa attribute for TI/TF andnot mode i386: Fix isa attribute for TI/TF andnot mode - - - -1- 2023-11-07 Jiang, Haochen Unresolved
[4/4] Push no-evex512 target for 128/256 bit intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
[3/4,3/3] Change internal intrin call for AVX512 intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
[2/4,2/3] Change internal intrin call for AVX512 intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
[1/4,1/3] Change internal intrin call for AVX512 intrins Fix no-evex512 function attribute - - - -1- 2023-10-31 Jiang, Haochen Unresolved
Fix incorrect option mask and avx512cd target push Fix incorrect option mask and avx512cd target push - - - -1- 2023-10-30 Jiang, Haochen Unresolved
[gccwwwdocs] gcc-13/14: Mention Intel new ISA and march support [gccwwwdocs] gcc-13/14: Mention Intel new ISA and march support - - - -1- 2023-10-23 Jiang, Haochen Unresolved
i386: Prevent splitting to xmm16+ when !TARGET_AVX512VL i386: Prevent splitting to xmm16+ when !TARGET_AVX512VL - - - 1-- 2023-10-20 Jiang, Haochen Accepted
[v2] x86: Correct ISA enabled for clients since Arrow Lake [v2] x86: Correct ISA enabled for clients since Arrow Lake - - - -1- 2023-10-19 Jiang, Haochen Unresolved
x86: Correct ISA enabled for clients since Arrow Lake x86: Correct ISA enabled for clients since Arrow Lake - - - -1- 2023-10-18 Jiang, Haochen Unresolved
[3/3] Initial Panther Lake Support Add Intel new cpu archs - - - -1- 2023-10-16 Jiang, Haochen Unresolved
[2/3] x86: Add m_CORE_HYBRID for hybrid clients tuning Add Intel new cpu archs - - - -1- 2023-10-16 Jiang, Haochen Unresolved
[1/3] Initial Clear Water Forest Support Add Intel new cpu archs - - - -1- 2023-10-16 Jiang, Haochen Unresolved
[v2,01/18] Initial support for -mevex512 [v2,01/18] Initial support for -mevex512 - - - --1 2023-10-07 Jiang, Haochen Not Applicable
i386: Add AVX2 pragma wrapper for AVX512DQVL intrins i386: Add AVX2 pragma wrapper for AVX512DQVL intrins - - - -1- 2023-08-18 Jiang, Haochen Unresolved
[2/2,2/2] Support AVX10.1 for AVX512DQ intrins Support AVX10.1 for AVX512DQ intrins - - - -1- 2023-08-17 Jiang, Haochen Unresolved
[1/2,1/2] Support AVX10.1 for AVX512DQ intrins Support AVX10.1 for AVX512DQ intrins - - - -1- 2023-08-17 Jiang, Haochen Unresolved
[6/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins [1/3] Initial support for AVX10.1 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[5/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins [1/3] Initial support for AVX10.1 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[4/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins [1/3] Initial support for AVX10.1 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins Untitled series #54389 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[2/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins Untitled series #54388 - - - 1-- 2023-08-08 Jiang, Haochen Accepted
[1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins [1/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[3/3] Emit a warning when AVX10 options conflict in vector width [1/3] Initial support for AVX10.1 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[2/3] Emit a warning when disabling AVX512 with AVX10 enabled or disabling AVX10 with AVX512 enabled [1/3] Initial support for AVX10.1 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
[1/3] Initial support for AVX10.1 [1/3] Initial support for AVX10.1 - - - -1- 2023-08-08 Jiang, Haochen Unresolved
Fix a typo Fix a typo - - - -1- 2023-07-21 Jiang, Haochen Unresolved
Correct Granite Rapids{, D} documentation Correct Granite Rapids{, D} documentation - - - -1- 2023-07-20 Jiang, Haochen Unresolved
[gcc-wwwdocs] gcc-13/14: Mention Intel new ISA and march support [gcc-wwwdocs] gcc-13/14: Mention Intel new ISA and march support - - - -1- 2023-07-17 Jiang, Haochen Unresolved
i386: Auto vectorize usdot_prod, udot_prod with AVXVNNIINT16 instruction. i386: Auto vectorize usdot_prod, udot_prod with AVXVNNIINT16 instruction. - - - -1- 2023-07-14 Jiang, Haochen Unresolved
[4/4] Support Intel SM4 Support Intel Arrow Lake/Lunar Lake ISAs - - - 1-- 2023-07-13 Jiang, Haochen Accepted
[3/4] Support Intel SHA512 Support Intel Arrow Lake/Lunar Lake ISAs - - - 1-- 2023-07-13 Jiang, Haochen Accepted
[2/4] Support Intel SM3 Support Intel Arrow Lake/Lunar Lake ISAs - - - 1-- 2023-07-13 Jiang, Haochen Accepted
[1/4] Support Intel AVX-VNNI-INT16 Support Intel Arrow Lake/Lunar Lake ISAs - - - 1-- 2023-07-13 Jiang, Haochen Accepted
i386: Guard 128 bit VAES builtins with AVX512VL i386: Guard 128 bit VAES builtins with AVX512VL - - - 1-- 2023-07-11 Jiang, Haochen Accepted
i386: Share AES xmm intrin with VAES i386: Share AES xmm intrin with VAES - - - -1- 2023-04-18 Jiang, Haochen Unresolved
i386: Share AES xmm intrin with VAES i386: Share AES xmm intrin with VAES - - - -1- 2023-04-18 Jiang, Haochen Unresolved
i386: Add PCLMUL dependency for VPCLMULQDQ i386: Add PCLMUL dependency for VPCLMULQDQ - - - 1-- 2023-04-18 Jiang, Haochen Accepted
i386: Fix vpblendm{b,w} intrins and insns i386: Fix vpblendm{b,w} intrins and insns - - - 1-- 2023-04-18 Jiang, Haochen Accepted
[2/2] i386: Add AVX512BW dependency to AVX512VBMI2 i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask - - - 1-- 2023-04-18 Jiang, Haochen Accepted
[1/2] i386: Add AVX512BW dependency to AVX512BITALG i386: Add missing AVX512BW dependency for ISAs using 32/64 bit mask - - - 1-- 2023-04-18 Jiang, Haochen Accepted
i386: Use macro to wrap up share builtin exceptions in builtin isa check i386: Use macro to wrap up share builtin exceptions in builtin isa check - - - 1-- 2023-04-18 Jiang, Haochen Accepted
gcc-13: Mention Intel AMX-COMPLEX ISA support and revise march support gcc-13: Mention Intel AMX-COMPLEX ISA support and revise march support - - - -1- 2023-04-10 Jiang, Haochen Unresolved
[2/2] i386: Add AMX-COMPLEX to Granite Rapids Support Intel AMX-COMPLEX - - - 1-- 2023-04-03 Jiang, Haochen Accepted
[1/2] Support Intel AMX-COMPLEX Support Intel AMX-COMPLEX - - - 1-- 2023-04-03 Jiang, Haochen Accepted
Fix intrin name in Intel CMPccXADD Fix intrin name in Intel CMPccXADD - - - 1-- 2022-12-14 Jiang, Haochen Accepted
i386: Add AMX-TILE dependency for AMX related ISAs i386: Add AMX-TILE dependency for AMX related ISAs - - - 1-- 2022-11-11 Jiang, Haochen Accepted
[wwwdocs] gcc-13: Mention Intel new ISA and march support. [wwwdocs] gcc-13: Mention Intel new ISA and march support. - - - -1- 2022-11-10 Jiang, Haochen Unresolved
i386: Add ISA check for newly introduced prefetch builtins. i386: Add ISA check for newly introduced prefetch builtins. - - - 1-- 2022-11-09 Jiang, Haochen Accepted
[2/2] Add m_CORE_ATOM for atom cores Intel Grand Ridge Support - - - -1- 2022-11-07 Jiang, Haochen Unresolved
[1/2] Initial Grand Ridge support Intel Grand Ridge Support - - - -1- 2022-11-07 Jiang, Haochen Unresolved
Initial Granite Rapids support Initial Granite Rapids support - - - 1-- 2022-11-04 Jiang, Haochen Accepted
Support Intel prefetchit0/t1 Support Intel prefetchit0/t1 - - - -1- 2022-11-04 Jiang, Haochen Unresolved
Support Intel CMPccXADD Support Intel CMPccXADD - - - --1 2022-11-03 Jiang, Haochen Not Applicable
Support Intel CMPccXADD Support Intel CMPccXADD - - - -1- 2022-10-24 Jiang, Haochen Unresolved
[v2] Add a parameter for the builtin function of prefetch to align with LLVM [v2] Add a parameter for the builtin function of prefetch to align with LLVM - - - 1-- 2022-10-18 Jiang, Haochen Accepted
i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction. i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction. - - - -1- 2022-10-18 Jiang, Haochen Unresolved
[v2] Support Intel AVX-VNNI-INT8 [v2] Support Intel AVX-VNNI-INT8 - - - -1- 2022-10-18 Jiang, Haochen Unresolved
[2/2] Support Intel prefetchit0/t1 Add a Fourth parameter for prefetch and Support Intel PREFETCHI - - - -1- 2022-10-14 Jiang, Haochen Unresolved
[1/2] Add a parameter for the builtin function of prefetch to align with LLVM Add a Fourth parameter for prefetch and Support Intel PREFETCHI - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[2/3] Support Intel prefetchit0/t1 [1/3] Add a parameter for the builtin function of prefetch to align with LLVM - - - -1- 2022-10-14 Jiang, Haochen Unresolved
[1/3] Add a parameter for the builtin function of prefetch to align with LLVM [1/3] Add a parameter for the builtin function of prefetch to align with LLVM - - - 1-- 2022-10-14 Jiang, Haochen Accepted
Support Intel AMX-FP16 ISA Support Intel AMX-FP16 ISA - - - -1- 2022-10-14 Jiang, Haochen Unresolved
[6/6] Initial Sierra Forest Support Add Intel Sierra Forest Instructions - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[5/6] Support Intel CMPccXADD Add Intel Sierra Forest Instructions - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[4/6] Support Intel AVX-NE-CONVERT Add Intel Sierra Forest Instructions - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[3/6] i386: Add intrinsic for vector __bf16 Add Intel Sierra Forest Instructions - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[2/6] Support Intel AVX-VNNI-INT8 Add Intel Sierra Forest Instructions - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[1/6] Support Intel AVX-IFMA Add Intel Sierra Forest Instructions - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[2/2] Initial Meteorlake Support Add new Intel Architecture - - - 1-- 2022-10-14 Jiang, Haochen Accepted
[1/2] Initial Raptorlake Support Add new Intel Architecture - - - 1-- 2022-10-14 Jiang, Haochen Accepted
Add __m128bf16/__m256bf16/__m512bf16 type for bf16 abi test Add __m128bf16/__m256bf16/__m512bf16 type for bf16 abi test - - - --- 2022-08-22 Jiang, Haochen New
Add ABI test for __bf16 type Add ABI test for __bf16 type - - - --- 2022-08-18 Jiang, Haochen New