Show patches with: Series = RISC-V: Implement ISA Manual Table A.6 Mappings       |   12 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[gcc13,backport,12/12] riscv: fix error: control reaches end of non-void function RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,11/12] RISC-V: Table A.6 conformance tests RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,10/12] RISC-V: Weaken atomic loads RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,09/12] RISC-V: Weaken mem_thread_fence RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,08/12] RISC-V: Weaken LR/SC pairs RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,07/12] RISC-V: Eliminate AMO op fences RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,06/12] RISC-V: Strengthen atomic stores RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,05/12] RISC-V: Add AMO release bits RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,04/12] RISC-V: Enforce atomic compare_exchange SEQ_CST RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,03/12] RISC-V: Enforce subword atomic LR/SC SEQ_CST RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,02/12] RISC-V: Enforce Libatomic LR/SC SEQ_CST RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved
[gcc13,backport,01/12] RISC-V: Eliminate SYNC memory models RISC-V: Implement ISA Manual Table A.6 Mappings - - - -1- 2023-07-25 Patrick O'Neill Unresolved