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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[1/4,V4,RISC-V] support cm.push cm.pop cm.popret in zcmp
support zcmp extention
- - -
-
1
-
2023-06-07
Fei Gao
Unresolved
[V2] RISC-V: Support RVV VLA SLP auto-vectorization
[V2] RISC-V: Support RVV VLA SLP auto-vectorization
- - -
-
1
-
2023-06-07
juzhe.zhong@rivai.ai
Unresolved
[v3] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.
[v3] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.
- - -
-
1
-
2023-06-07
Li, Pan2 via Gcc-patches
Unresolved
RISC-V: Fix ICE when include riscv_vector.h with rv64gcv
RISC-V: Fix ICE when include riscv_vector.h with rv64gcv
- - -
-
1
-
2023-06-07
Li, Pan2 via Gcc-patches
Unresolved
[pushed] c++: enable NRVO from inner block [PR51571]
[pushed] c++: enable NRVO from inner block [PR51571]
- - -
-
1
-
2023-06-07
Jason Merrill
Unresolved
middle-end, i386: Pattern recognize add/subtract with carry [PR79173]
middle-end, i386: Pattern recognize add/subtract with carry [PR79173]
- - -
-
1
-
2023-06-06
Jakub Jelinek
Unresolved
modula2: Fix bootstrap
modula2: Fix bootstrap
- - -
-
1
-
2023-06-06
Jakub Jelinek
Unresolved
[committed] libstdc++: Make std::numeric_limits<__float128> more portable [PR104772]
[committed] libstdc++: Make std::numeric_limits<__float128> more portable [PR104772]
- - -
-
1
-
2023-06-06
Jonathan Wakely
Unresolved
[v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.
[v2] RISC-V: Refactor requirement of ZVFH and ZVFHMIN.
- - -
-
1
-
2023-06-06
Li, Pan2 via Gcc-patches
Unresolved
[1/2] Missed opportunity to use [SU]ABD
[1/2] Missed opportunity to use [SU]ABD
- - -
-
1
-
2023-06-06
Oluwatamilore Adebayo
Unresolved
[GCC,12,committed] d: Merge upstream dmd 316b89f1e3, phobos 8e8aaae50.
[GCC,12,committed] d: Merge upstream dmd 316b89f1e3, phobos 8e8aaae50.
- - -
-
1
-
2023-06-06
Iain Buclaw
Unresolved
[v1] RISC-V: Refactor ZVFHMIN to separated iterator and pattern
[v1] RISC-V: Refactor ZVFHMIN to separated iterator and pattern
- - -
-
1
-
2023-06-06
Li, Pan2 via Gcc-patches
Unresolved
[V4] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
[V4] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
[V3] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
[V3] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Support RVV VLA SLP auto-vectorization
RISC-V: Support RVV VLA SLP auto-vectorization
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Enable SELECT_VL for RVV
RISC-V: Enable SELECT_VL for RVV
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
[V2] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
[V2] RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering optmization
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
[1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.
[1/2] Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.
- - -
-
1
-
2023-06-06
liuhongt
Unresolved
riscv: Fix insn cost calculation
riscv: Fix insn cost calculation
- - -
-
1
-
2023-06-06
Dimitar Dimitrov
Unresolved
Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.
Fold _mm{, 256, 512}_abs_{epi8, epi16, epi32, epi64} into gimple ABSU_EXPR + VCE.
- - -
-
1
-
2023-06-06
liuhongt
Unresolved
RISC-V: Support RVV VLA SLP auto-vectorization
RISC-V: Support RVV VLA SLP auto-vectorization
- - -
-
1
-
2023-06-06
juzhe.zhong@rivai.ai
Unresolved
[committed] bootstrap rtl-checking: Fix XVEC vs XVECEXP in postreload.cc
[committed] bootstrap rtl-checking: Fix XVEC vs XVECEXP in postreload.cc
- - -
-
1
-
2023-06-06
Hans-Peter Nilsson
Unresolved
Ping: Fwd: [V9][PATCH 1/2] Handle component_ref to a structre/union field including flexible array …
Ping: Fwd: [V9][PATCH 1/2] Handle component_ref to a structre/union field including flexible array …
- - -
-
1
-
2023-06-05
Qing Zhao
Corrupt patch
[v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API
[v1] RISC-V: Support RVV FP16 ZVFH Reduction floating-point intrinsic API
- - -
-
1
-
2023-06-05
Li, Pan2 via Gcc-patches
Unresolved
driver: Forward '-lgfortran', '-lm' to offloading compilation
driver: Forward '-lgfortran', '-lm' to offloading compilation
- - -
-
1
-
2023-06-05
Thomas Schwinge
Unresolved
[V3] VECT: Add SELECT_VL support
[V3] VECT: Add SELECT_VL support
- - -
-
1
-
2023-06-05
juzhe.zhong@rivai.ai
Unresolved
[v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
[v2] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
- - -
-
1
-
2023-06-05
Li, Pan2 via Gcc-patches
Unresolved
RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector-iterators.md.
RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector-iterators.md.
- - -
-
1
-
2023-06-05
Li Xu
Unresolved
[v2] xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode
[v2] xtensa: Optimize boolean evaluation or branching when EQ/NE to zero in S[IF]mode
- - -
-
1
-
2023-06-05
Takayuki 'January June' Suwa
Unresolved
[v1] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
[v1] RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
- - -
-
1
-
2023-06-05
Li, Pan2 via Gcc-patches
Unresolved
[2/2] Handle const_int in expand_single_bit_test
[1/2] Improve do_store_flag for single bit when there is no non-zero bits
- - -
-
1
-
2023-06-05
Andrew Pinski
Unresolved
[1/2] Improve do_store_flag for single bit when there is no non-zero bits
[1/2] Improve do_store_flag for single bit when there is no non-zero bits
- - -
-
1
-
2023-06-05
Andrew Pinski
Unresolved
[V2] VECT: Add SELECT_VL support
[V2] VECT: Add SELECT_VL support
- - -
-
1
-
2023-06-05
juzhe.zhong@rivai.ai
Unresolved
[NFC] RISC-V: Move optimization patterns into autovec-opt.md
[NFC] RISC-V: Move optimization patterns into autovec-opt.md
- - -
-
1
-
2023-06-04
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Split arguments of expand_vec_perm
RISC-V: Split arguments of expand_vec_perm
- - -
-
1
-
2023-06-04
juzhe.zhong@rivai.ai
Unresolved
[NFC] RISC-V: Reorganize riscv-v.cc
[NFC] RISC-V: Reorganize riscv-v.cc
- - -
-
1
-
2023-06-04
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Support RVV FP16 ZVFHMIN intrinsic API
RISC-V: Support RVV FP16 ZVFHMIN intrinsic API
- - -
-
1
-
2023-06-04
Li, Pan2 via Gcc-patches
Unresolved
xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN
xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN
- - -
-
1
-
2023-06-03
Takayuki 'January June' Suwa
Unresolved
RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill
RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill
- - -
-
1
-
2023-06-03
Li, Pan2 via Gcc-patches
Unresolved
[committed] btf: fix bootstrap -Wformat errors [PR110073]
[committed] btf: fix bootstrap -Wformat errors [PR110073]
- - -
-
1
-
2023-06-02
David Faust
Unresolved
[committed] btf: Fix -Wformat errors
[committed] btf: Fix -Wformat errors
- - -
-
1
-
2023-06-02
Alex Coplan
Unresolved
libstdc++: Do not assume existence of char8_t codecvt facet
libstdc++: Do not assume existence of char8_t codecvt facet
- - -
-
1
-
2023-06-02
Joseph Faulls
Corrupt patch
[avr,committed] Improve operations on non-LD_REGS when the operation follows a move from LD_REGS.
[avr,committed] Improve operations on non-LD_REGS when the operation follows a move from LD_REGS.
- - -
-
1
-
2023-06-02
Georg-Johann Lay
Corrupt patch
[2/2,V3,RISC-V] support cm.push cm.pop cm.popret in zcmp
[1/2,RISC-V] fix cfi issue in save-restore.
- - -
-
1
-
2023-06-02
Fei Gao
Unresolved
[PR110086] avr: Fix ICE on optimize attribute
[PR110086] avr: Fix ICE on optimize attribute
- - -
-
1
-
2023-06-02
Li, Pan2 via Gcc-patches
Corrupt patch
Consider '--with-build-sysroot=[...]' for target libraries' build-tree testing (instead of build-ti…
Consider '--with-build-sysroot=[...]' for target libraries' build-tree testing (instead of build-ti…
- - -
-
1
-
2023-06-02
Thomas Schwinge
Unresolved
[V2] RISC-V: Fix warning in predicated.md
[V2] RISC-V: Fix warning in predicated.md
- - -
-
1
-
2023-06-02
juzhe.zhong@rivai.ai
Unresolved
RISCV: Add -m(no)-omit-leaf-frame-pointer support.
RISCV: Add -m(no)-omit-leaf-frame-pointer support.
- - -
-
1
-
2023-06-02
Li, Pan2 via Gcc-patches
Unresolved
RISC-V: Optimize reverse series index vector
RISC-V: Optimize reverse series index vector
- - -
-
1
-
2023-06-02
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Fix warning in predicated.md
RISC-V: Fix warning in predicated.md
- - -
-
1
-
2023-06-02
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Add __RISCV_ prefix to VXRM and FRM enum
RISC-V: Add __RISCV_ prefix to VXRM and FRM enum
- - -
-
1
-
2023-06-01
juzhe.zhong@rivai.ai
Unresolved
[RFC] range-op restructuring
[RFC] range-op restructuring
- - -
-
1
-
2023-06-01
Andrew MacLeod
Unresolved
[committed] libstdc++: Do not use std::expected::value() in monadic ops (LWG 3938)
[committed] libstdc++: Do not use std::expected::value() in monadic ops (LWG 3938)
- - -
-
1
-
2023-06-01
Jonathan Wakely
Unresolved
[committed] libstdc++: Fix code size regressions in std::vector [PR110060]
[committed] libstdc++: Fix code size regressions in std::vector [PR110060]
- - -
-
1
-
2023-06-01
Jonathan Wakely
Unresolved
[committed] libstdc++: Document removal of implicit allocator rebinding extensions
[committed] libstdc++: Document removal of implicit allocator rebinding extensions
- - -
-
1
-
2023-06-01
Jonathan Wakely
Unresolved
Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range.
Don't try bswap + rotate when TYPE_PRECISION(n->type) > n->range.
- - -
-
1
-
2023-06-01
liuhongt
Unresolved
[V3] VECT: Change flow of decrement IV
[V3] VECT: Change flow of decrement IV
- - -
-
1
-
2023-06-01
juzhe.zhong@rivai.ai
Unresolved
[V2] RISC-V: Support RVV permutation auto-vectorization
[V2] RISC-V: Support RVV permutation auto-vectorization
- - -
-
1
-
2023-06-01
juzhe.zhong@rivai.ai
Unresolved
[committed] libstdc++: Add separate autoconf macro for std::float_t and std::double_t [PR109818]
[committed] libstdc++: Add separate autoconf macro for std::float_t and std::double_t [PR109818]
- - -
-
1
-
2023-05-31
Jonathan Wakely
Unresolved
[committed] libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in <cmath>
[committed] libstdc++: Stop using _GLIBCXX_USE_C99_MATH_TR1 in <cmath>
- - -
-
1
-
2023-05-31
Jonathan Wakely
Unresolved
[committed] libstdc++: Fix build for targets without _Float128 [PR109921]
[committed] libstdc++: Fix build for targets without _Float128 [PR109921]
- - -
-
1
-
2023-05-31
Jonathan Wakely
Unresolved
[committed] libstdc++: Fix configure test for 32-bit targets
[committed] libstdc++: Fix configure test for 32-bit targets
- - -
-
1
-
2023-05-31
Jonathan Wakely
Unresolved
OpenMP/Fortran: Permit pure directives inside PURE
OpenMP/Fortran: Permit pure directives inside PURE
- - -
-
1
-
2023-05-31
Tobias Burnus
Unresolved
[3/3] testsuite: print any leaking torture options for debugging
Unbork testsuite for multlib setups
- - -
-
1
-
2023-05-31
Vineet Gupta
Unresolved
[2/3] RISC-V: Add missing torture-init and torture-finish for rvv.exp
Unbork testsuite for multlib setups
- - -
-
1
-
2023-05-31
Vineet Gupta
Unresolved
[V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
[V2] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
- - -
-
1
-
2023-05-31
shiyulong@iscas.ac.cn
Unresolved
[V2] VECT: Change flow of decrement IV
[V2] VECT: Change flow of decrement IV
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Unresolved
[V2] RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering optimizaiton for RVV auto-vectoriza…
[V2] RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering optimizaiton for RVV auto-vectoriza…
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization
RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering optimizaiton for RVV auto-vectorization
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Remove FRM for vfncvt.rod instruction
RISC-V: Remove FRM for vfncvt.rod instruction
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to float widening conversion)
RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to float widening conversion)
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)
RISC-V: Remove FRM for vfwcvt (RVV float to float widening conversion)
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Repeat Merge
RISC-V: Support RVV permutation auto-vectorization
RISC-V: Support RVV permutation auto-vectorization
- - -
-
1
-
2023-05-31
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Add ZVFH extension to the -march= option
RISC-V: Add ZVFH extension to the -march= option
- - -
-
1
-
2023-05-31
Li, Pan2 via Gcc-patches
Unresolved
[V1] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
[V1] Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
- - -
-
1
-
2023-05-31
shiyulong@iscas.ac.cn
Unresolved
Fix ICE in rewrite_expr_tree_parallel
Fix ICE in rewrite_expr_tree_parallel
- - -
-
1
-
2023-05-31
Li, Pan2 via Gcc-patches
Unresolved
RISC-V: Fix unreachable test code for init repeat sequence.
RISC-V: Fix unreachable test code for init repeat sequence.
- - -
-
1
-
2023-05-31
Li, Pan2 via Gcc-patches
Unresolved
RISC-V: Synthesize power-of-two constants.
RISC-V: Synthesize power-of-two constants.
- - -
-
1
-
2023-05-30
Robin Dapp
Unresolved
[V9,0/2] Accept and Handle the case when a structure including a FAM nested in another structure
- - -
-
1
-
2023-05-30
Qing Zhao
Repeat Merge
[arm,testsuite] : Fix ACLE data-intrinsics testcases
[arm,testsuite] : Fix ACLE data-intrinsics testcases
- - -
-
1
-
2023-05-30
Christophe Lyon
Unresolved
VECT: Change flow of decrement IV
VECT: Change flow of decrement IV
- - -
-
1
-
2023-05-30
juzhe.zhong@rivai.ai
Unresolved
[3/3,v2] xtensa: Optimize 'cstoresi4' insn pattern
Untitled series #40978
- - -
-
1
-
2023-05-30
Takayuki 'January June' Suwa
Unresolved
[2/3,v2] xtensa: Add 'adddi3' and 'subdi3' insn patterns
Untitled series #40978
- - -
-
1
-
2023-05-30
Takayuki 'January June' Suwa
Unresolved
[3/3] xtensa: Optimize 'cstoresi4' insn pattern
[1/3] xtensa: Improve "*shlrd_reg" insn pattern and its variant
- - -
-
1
-
2023-05-30
Takayuki 'January June' Suwa
Unresolved
[2/3] xtensa: Add 'adddi3' and 'subdi3' insn patterns
[1/3] xtensa: Improve "*shlrd_reg" insn pattern and its variant
- - -
-
1
-
2023-05-30
Takayuki 'January June' Suwa
Unresolved
[COMMITTED] ada: Fix wrong access for qualified aggregate with storage model
[COMMITTED] ada: Fix wrong access for qualified aggregate with storage model
- - -
-
1
-
2023-05-30
Marc Poulhiès
Unresolved
[COMMITTED] ada: Fix internal error on qualified aggregate with storage model
[COMMITTED] ada: Fix internal error on qualified aggregate with storage model
- - -
-
1
-
2023-05-30
Marc Poulhiès
Unresolved
[COMMITTED] ada: Adjust again the implementation of storage models
[COMMITTED] ada: Adjust again the implementation of storage models
- - -
-
1
-
2023-05-30
Marc Poulhiès
Unresolved
[COMMITTED] ada: Small cleanups and fixes in expansion of aggregates
[COMMITTED] ada: Small cleanups and fixes in expansion of aggregates
- - -
-
1
-
2023-05-30
Marc Poulhiès
Unresolved
[COMMITTED] ada: Fix regression of secondary stack management in return statements
[COMMITTED] ada: Fix regression of secondary stack management in return statements
- - -
-
1
-
2023-05-30
Marc Poulhiès
Unresolved
RISC-V: Basic VLS code gen for RISC-V
RISC-V: Basic VLS code gen for RISC-V
- - -
-
1
-
2023-05-30
Kito Cheng
Unresolved
[libstdc++,testsuite] xfail double-prec from_chars for x86_64 ldbl
[libstdc++,testsuite] xfail double-prec from_chars for x86_64 ldbl
- - -
-
1
-
2023-05-30
Alexandre Oliva
Unresolved
[V2] RISC-V: Fix warning in riscv.md
[V2] RISC-V: Fix warning in riscv.md
- - -
-
1
-
2023-05-30
juzhe.zhong@rivai.ai
Unresolved
RISC-V: Fix warning in riscv.md
RISC-V: Fix warning in riscv.md
- - -
-
1
-
2023-05-30
juzhe.zhong@rivai.ai
Unresolved
[2/2] ipa-cp: Feed results of IPA-CP into value numbering
[1/2] ipa-cp: Avoid long linear searches through DECL_ARGUMENTS
- - -
-
1
-
2023-05-29
Martin Jambor
Unresolved
[1/2] ipa-cp: Avoid long linear searches through DECL_ARGUMENTS
[1/2] ipa-cp: Avoid long linear searches through DECL_ARGUMENTS
- - -
-
1
-
2023-05-29
Martin Jambor
Unresolved
[COMMITTED] i386: Also require TARGET_AVX512BW to generate truncv16hiv16qi2 [PR110021]
[COMMITTED] i386: Also require TARGET_AVX512BW to generate truncv16hiv16qi2 [PR110021]
- - -
-
1
-
2023-05-29
Uros Bizjak
Unresolved
[v1] RISC-V: Refactor comments and naming of riscv-v.cc.
[v1] RISC-V: Refactor comments and naming of riscv-v.cc.
- - -
-
1
-
2023-05-29
Li, Pan2 via Gcc-patches
Unresolved
[C,1/4] introduce ubsan checking for assigment of VM types 1/4
[C,1/4] introduce ubsan checking for assigment of VM types 1/4
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1
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2023-05-29
Martin Uecker
Unresolved
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