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[8.43.85.97]) by mx.google.com with ESMTPS id t11-20020a05640203cb00b0052a250c563bsi10332131edw.145.2023.09.06.19.18.24 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Sep 2023 19:18:24 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=qsXLh15S; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gnu.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 18A583856972 for <ouuuleilei@gmail.com>; Thu, 7 Sep 2023 02:18:00 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 18A583856972 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1694053080; bh=r5HNnD70xUxSa+CEKoqGsb5hY7C+JWXY8X7Ua8tC2D4=; h=To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive: List-Post:List-Help:List-Subscribe:From:Reply-To:From; b=qsXLh15ScAAxK1+0k+SwRrKB1+ceA1Pd2lPk4bWMexDv23aE5o+AXRp4BVMcJBkMq v/yaYHGkXUxiZrp1yphYdbsfVKHdMKdiLUY98qdKcjoJzE2fpwj3GRbqa1KATudb++ zPC7U0OKXKETmAZIxX+7+2qNzuQq55ZKtUTNjs9E= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id C17F43858D35 for <gcc-patches@gcc.gnu.org>; Thu, 7 Sep 2023 02:17:13 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org C17F43858D35 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 51767300089; Thu, 7 Sep 2023 02:17:10 +0000 (UTC) To: Tsukasa OI <research_trasio@irq.a4lg.com>, Kito Cheng <kito.cheng@gmail.com>, Palmer Dabbelt <palmer@dabbelt.com>, Andrew Waterman <andrew@sifive.com>, Jim Wilson <jim.wilson.gcc@gmail.com>, Jeff Law <jeffreyalaw@gmail.com> Cc: gcc-patches@gcc.gnu.org Subject: [RFC PATCH 0/2] RISC-V: Change RISC-V bit manipulation / scalar crypto builtin types Date: Thu, 7 Sep 2023 02:17:00 +0000 Message-ID: <cover.1694053004.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, KAM_MANYTO, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: Tsukasa OI via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1776343427923515703 X-GMAIL-MSGID: 1776343427923515703 |
Series |
RISC-V: Change RISC-V bit manipulation / scalar crypto builtin types
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Message
Tsukasa OI
Sept. 7, 2023, 2:17 a.m. UTC
Hello, Many RISC-V builtins operate in signed integer types but in many cases, they are better to be unsigned. There are a few reasons to do that: 1. Being more natural For bit manipulation operations, the direct input and the result should have an unsigned type. e.g. __builtin_bswap16 Both input and output should be (and are) unsigned. e.g. __builtin_popcount The input should be (and is) unsigned. The output is a bit count and is in int (signed integer). 2. In parity with LLVM 17 LLVM made similar changes to this patch set in commit 599421ae36c3 ("[RISCV] Use unsigned instead of signed types for Zk* and Zb* builtins.") by Craig Topper. Note that shift amount / round number argument types are changed to unsigned in this LLVM commit, I did the same. 3. Minimum compatibility breakage This change rarely causes warnings even if both -Wall and -Wextra are specified. In fact, only applying PATCH 1/2 does not cause any additional test failures. PATCH 2/2 only contains testsuite changes (uses correct types as the builtin uses). But not completely compatible. For instance, we will notice when operating with for instance C++'s "auto" / "decltype" or overload resolution. So, I would like to hear your thoughts first. Note that, the only reason I separated this RFC patch set to two patches is to demonstrate that no additional warnings occur even if only PATCH 1/2 is applied. If approved or leaves an RFC PATCH, both will be merged. p.s. LLVM has another type of different builtin types (with the same name), scalar cryptography builtins that operate in 32-bit integers, not XLEN- specific (applies to SHA-256, SM3 and SM4). For those cases, GCC prefers XLEN-specific integer type but LLVM 17 always prefers uint32_t. This is a result of LLVM commit 599421ae36c3 ("[RISCV] Re-define sha256, Zksed, and Zksh intrinsics to use i32 types."). Because just changing the width causes errors on GCC, even if I change them to uint32_t, that would be in a different patch set. Sincerely, Tsukasa Tsukasa OI (2): RISC-V: Make bit manipulation value / round number and shift amount types for builtins unsigned RISC-V: Update testsuite for type-changed builtins gcc/config/riscv/riscv-builtins.cc | 7 +- gcc/config/riscv/riscv-cmo.def | 16 +-- gcc/config/riscv/riscv-ftypes.def | 24 ++-- gcc/config/riscv/riscv-scalar-crypto.def | 104 +++++++++--------- gcc/testsuite/gcc.target/riscv/zbc32.c | 6 +- gcc/testsuite/gcc.target/riscv/zbc64.c | 6 +- gcc/testsuite/gcc.target/riscv/zbkb32.c | 10 +- gcc/testsuite/gcc.target/riscv/zbkb64.c | 8 +- gcc/testsuite/gcc.target/riscv/zbkc32.c | 4 +- gcc/testsuite/gcc.target/riscv/zbkc64.c | 4 +- gcc/testsuite/gcc.target/riscv/zbkx32.c | 4 +- gcc/testsuite/gcc.target/riscv/zbkx64.c | 4 +- gcc/testsuite/gcc.target/riscv/zknd32.c | 4 +- gcc/testsuite/gcc.target/riscv/zknd64.c | 10 +- gcc/testsuite/gcc.target/riscv/zkne32.c | 4 +- gcc/testsuite/gcc.target/riscv/zkne64.c | 8 +- gcc/testsuite/gcc.target/riscv/zknh-sha256.c | 8 +- .../gcc.target/riscv/zknh-sha512-32.c | 12 +- .../gcc.target/riscv/zknh-sha512-64.c | 8 +- gcc/testsuite/gcc.target/riscv/zksed32.c | 4 +- gcc/testsuite/gcc.target/riscv/zksed64.c | 4 +- gcc/testsuite/gcc.target/riscv/zksh32.c | 4 +- gcc/testsuite/gcc.target/riscv/zksh64.c | 4 +- 23 files changed, 133 insertions(+), 134 deletions(-) base-commit: af88776caa20342482b11ccb580742a46c621250