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[8.43.85.97]) by mx.google.com with ESMTPS id hz5-20020a1709072ce500b007824b741e7asi13017838ejc.236.2022.10.11.04.03.52 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Oct 2022 04:03:52 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 813523860755 for <ouuuleilei@gmail.com>; Tue, 11 Oct 2022 11:02:59 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from esa1.mentor.iphmx.com (esa1.mentor.iphmx.com [68.232.129.153]) by sourceware.org (Postfix) with ESMTPS id 1F6313858C20 for <gcc-patches@gcc.gnu.org>; Tue, 11 Oct 2022 11:02:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 1F6313858C20 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=codesourcery.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=mentor.com X-IronPort-AV: E=Sophos;i="5.95,176,1661846400"; d="scan'208";a="87280545" Received: from orw-gwy-01-in.mentorg.com ([192.94.38.165]) by esa1.mentor.iphmx.com with ESMTP; 11 Oct 2022 03:02:31 -0800 IronPort-SDR: +F1pE7JiYK6grrU5yJG/eb8YteHKFFWms5J84OK9VhIDNeAdBIVjYZrAP1PHqKSxOxVelKafIf dPzISdEDyKnzPxshlfNpg551VVsZIRcbCtQ/QOOO/gwlrPLFf3dOiII7VPmR5/CfRdQtgQ+ien Mmi+2GpreUMxUnK0UHzSPvk6Eg4kpI9O0giigOb0xKMknvaLc3LRO6cmLMUy9woZ4WKhD0m2qL TQO1zSiIoRKQthbclocxXhNaoWoJ/l69HBw3M+Nb2/FC5vyqrVqRC8Bq32E19AfYa87VSVVR4V ruQ= From: Andrew Stubbs <ams@codesourcery.com> To: <gcc-patches@gcc.gnu.org> Subject: [committed 0/6] amdgcn: Add V32, V16, V8, V4, and V2 vectors Date: Tue, 11 Oct 2022 12:02:02 +0100 Message-ID: <cover.1665485382.git.ams@codesourcery.com> X-Mailer: git-send-email 2.37.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [137.202.0.90] X-ClientProxiedBy: svr-ies-mbx-14.mgc.mentorg.com (139.181.222.14) To svr-ies-mbx-11.mgc.mentorg.com (139.181.222.11) X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1746388892305906186?= X-GMAIL-MSGID: =?utf-8?q?1746388892305906186?= |
Series |
amdgcn: Add V32, V16, V8, V4, and V2 vectors
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Message
Andrew Stubbs
Oct. 11, 2022, 11:02 a.m. UTC
This patch series adds additional vector sizes for the amdgcn backend. The hardware supports any arbitrary vector length up to 64-lanes via masking, but GCC cannot (yet) make full use of them due to middle-end limitations. Adding smaller "virtual" vector sizes increases the complexity of the backend a little, but opens up optimization opportunities for the current middle-end implementation somewhat. In particular, it enables many more cases of SLP optimization. The patchset gives aproximately 100 addtional test PASS and a few extra FAIL. However, the failures are not new issues, but rather existing problems that did not show up because the code did not previously vectorize. Expanding the testcase to allow 64-lane vectors shows the same problems there. I shall backport these patches to the OG12 branch shortly. Andrew Andrew Stubbs (6): amdgcn: add multiple vector sizes amdgcn: Resolve insn conditions at compile time amdgcn: Add vec_extract for partial vectors amdgcn: vec_init for multiple vector sizes amdgcn: Add vector integer negate insn amdgcn: vector testsuite tweaks gcc/config/gcn/gcn-modes.def | 82 ++ gcc/config/gcn/gcn-protos.h | 24 +- gcc/config/gcn/gcn-valu.md | 399 +++++-- gcc/config/gcn/gcn.cc | 1063 +++++++++++------ gcc/config/gcn/gcn.h | 24 + gcc/testsuite/gcc.dg/pr104464.c | 2 + gcc/testsuite/gcc.dg/signbit-2.c | 5 +- gcc/testsuite/gcc.dg/signbit-5.c | 1 + gcc/testsuite/gcc.dg/vect/bb-slp-68.c | 5 +- gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c | 3 +- .../gcc.dg/vect/bb-slp-subgroups-3.c | 5 +- .../gcc.dg/vect/no-vfa-vect-depend-2.c | 3 +- gcc/testsuite/gcc.dg/vect/pr33953.c | 3 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 3 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 3 +- gcc/testsuite/gcc.dg/vect/pr80631-2.c | 3 +- gcc/testsuite/gcc.dg/vect/slp-reduc-4.c | 3 +- .../gcc.dg/vect/trapv-vect-reduc-4.c | 3 +- gcc/testsuite/lib/target-supports.exp | 3 +- 19 files changed, 1183 insertions(+), 454 deletions(-)
Comments
On Tue, Oct 11, 2022 at 1:03 PM Andrew Stubbs <ams@codesourcery.com> wrote: > > This patch series adds additional vector sizes for the amdgcn backend. > > The hardware supports any arbitrary vector length up to 64-lanes via > masking, but GCC cannot (yet) make full use of them due to middle-end > limitations. Adding smaller "virtual" vector sizes increases the > complexity of the backend a little, but opens up optimization > opportunities for the current middle-end implementation somewhat. In > particular, it enables many more cases of SLP optimization. > > The patchset gives aproximately 100 addtional test PASS and a few extra > FAIL. However, the failures are not new issues, but rather existing > problems that did not show up because the code did not previously > vectorize. Expanding the testcase to allow 64-lane vectors shows the > same problems there. > > I shall backport these patches to the OG12 branch shortly. I suppose until you change the related_vector_mode hook the PR107096 issue will not hit you but at least it's then latent ... > > Andrew > > Andrew Stubbs (6): > amdgcn: add multiple vector sizes > amdgcn: Resolve insn conditions at compile time > amdgcn: Add vec_extract for partial vectors > amdgcn: vec_init for multiple vector sizes > amdgcn: Add vector integer negate insn > amdgcn: vector testsuite tweaks > > gcc/config/gcn/gcn-modes.def | 82 ++ > gcc/config/gcn/gcn-protos.h | 24 +- > gcc/config/gcn/gcn-valu.md | 399 +++++-- > gcc/config/gcn/gcn.cc | 1063 +++++++++++------ > gcc/config/gcn/gcn.h | 24 + > gcc/testsuite/gcc.dg/pr104464.c | 2 + > gcc/testsuite/gcc.dg/signbit-2.c | 5 +- > gcc/testsuite/gcc.dg/signbit-5.c | 1 + > gcc/testsuite/gcc.dg/vect/bb-slp-68.c | 5 +- > gcc/testsuite/gcc.dg/vect/bb-slp-cond-1.c | 3 +- > .../gcc.dg/vect/bb-slp-subgroups-3.c | 5 +- > .../gcc.dg/vect/no-vfa-vect-depend-2.c | 3 +- > gcc/testsuite/gcc.dg/vect/pr33953.c | 3 +- > gcc/testsuite/gcc.dg/vect/pr65947-12.c | 3 +- > gcc/testsuite/gcc.dg/vect/pr65947-13.c | 3 +- > gcc/testsuite/gcc.dg/vect/pr80631-2.c | 3 +- > gcc/testsuite/gcc.dg/vect/slp-reduc-4.c | 3 +- > .../gcc.dg/vect/trapv-vect-reduc-4.c | 3 +- > gcc/testsuite/lib/target-supports.exp | 3 +- > 19 files changed, 1183 insertions(+), 454 deletions(-) > > -- > 2.37.0 >
On 11/10/2022 12:29, Richard Biener wrote: > On Tue, Oct 11, 2022 at 1:03 PM Andrew Stubbs <ams@codesourcery.com> wrote: >> >> This patch series adds additional vector sizes for the amdgcn backend. >> >> The hardware supports any arbitrary vector length up to 64-lanes via >> masking, but GCC cannot (yet) make full use of them due to middle-end >> limitations. Adding smaller "virtual" vector sizes increases the >> complexity of the backend a little, but opens up optimization >> opportunities for the current middle-end implementation somewhat. In >> particular, it enables many more cases of SLP optimization. >> >> The patchset gives aproximately 100 addtional test PASS and a few extra >> FAIL. However, the failures are not new issues, but rather existing >> problems that did not show up because the code did not previously >> vectorize. Expanding the testcase to allow 64-lane vectors shows the >> same problems there. >> >> I shall backport these patches to the OG12 branch shortly. > > I suppose until you change the related_vector_mode hook the PR107096 issue > will not hit you but at least it's then latent ... How do you mean, change it? static opt_machine_mode gcn_related_vector_mode (machine_mode vector_mode, scalar_mode element_mode, poly_uint64 nunits) { int n = nunits.to_constant (); if (n == 0) n = GET_MODE_NUNITS (vector_mode); return VnMODE (n, element_mode); } It returns what it's asked for, always matching the number of lanes (not the bitsize), which is most likely the most natural for GCN. Andrew
On Tue, Oct 11, 2022 at 1:53 PM Andrew Stubbs <ams@codesourcery.com> wrote: > > On 11/10/2022 12:29, Richard Biener wrote: > > On Tue, Oct 11, 2022 at 1:03 PM Andrew Stubbs <ams@codesourcery.com> wrote: > >> > >> This patch series adds additional vector sizes for the amdgcn backend. > >> > >> The hardware supports any arbitrary vector length up to 64-lanes via > >> masking, but GCC cannot (yet) make full use of them due to middle-end > >> limitations. Adding smaller "virtual" vector sizes increases the > >> complexity of the backend a little, but opens up optimization > >> opportunities for the current middle-end implementation somewhat. In > >> particular, it enables many more cases of SLP optimization. > >> > >> The patchset gives aproximately 100 addtional test PASS and a few extra > >> FAIL. However, the failures are not new issues, but rather existing > >> problems that did not show up because the code did not previously > >> vectorize. Expanding the testcase to allow 64-lane vectors shows the > >> same problems there. > >> > >> I shall backport these patches to the OG12 branch shortly. > > > > I suppose until you change the related_vector_mode hook the PR107096 issue > > will not hit you but at least it's then latent ... > > How do you mean, change it? > > static opt_machine_mode > gcn_related_vector_mode (machine_mode vector_mode, > scalar_mode element_mode, poly_uint64 nunits) > { > int n = nunits.to_constant (); > > if (n == 0) > n = GET_MODE_NUNITS (vector_mode); > > return VnMODE (n, element_mode); > } > > > It returns what it's asked for, always matching the number of lanes (not > the bitsize), which is most likely the most natural for GCN. Yes, change it in any way no longer honoring that. Or discover the case (not sure if it actually exists) where the vectorizer itself tricks you into this by passing down nunits !=0 when vectorizing a loop (I _think_ that's only done for basic-block vectorization currently). Richard. > > Andrew