Message ID | 20240126073745.13252-1-chenglulu@loongson.cn |
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Date: Fri, 26 Jan 2024 15:37:41 +0800 Message-Id: <20240126073745.13252-1-chenglulu@loongson.cn> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8AxRMxeYbNlPpUbAA--.44775S2 X-CM-SenderInfo: xfkh0wpoxo3qxorr0wxvrqhubq/ X-Coremail-Antispam: 1Uk129KBj93XoW7WF4kCr43CrW8Xr1kZr13GFX_yoW8uF13p3 y7uw15KF45G392g3WkJa4fWw4kJ3W7KFWa9a1aqryF9F43XrWfJF18Kw4SqF17G3WUJ34f Xr1Sv3WUW3W2qacCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r106r15McIj6I8E87Iv 67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6x kF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07jUsqXUUUUU= Received-SPF: pass client-ip=114.242.206.163; envelope-from=chenglulu@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, SPF_FAIL, SPF_HELO_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789137800557156936 X-GMAIL-MSGID: 1789137800557156936 |
Series |
When cmodel=extreme, add macro support and only support macros.
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Message
chenglulu
Jan. 26, 2024, 7:37 a.m. UTC
v3 -> v4: 1. Add macro support for TLS symbols 2. Added support for loading __get_tls_addr symbol address using call36. 3. Merge template got_load_tls_{ld/gd/le/ie}. 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. v2 -> v3: 1. Modify the detection rules of a test case. v1 -> v2: 1. Use the temporarily allocated registers as intermediate registers to implement the extreme macro. 2. Fixed bugs in v1 test cases. Lulu Cheng (4): LoongArch: Merge template got_load_tls_{ld/gd/le/ie}. LoongArch: Add the macro implementation of mcmodel=extreme. LoongArch: Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. LoongArch: Added support for loading __get_tls_addr symbol address using call36. gcc/config/loongarch/loongarch-protos.h | 1 + gcc/config/loongarch/loongarch.cc | 182 +++++++++--------- gcc/config/loongarch/loongarch.md | 101 ++++++---- gcc/config/loongarch/predicates.md | 12 ++ .../gcc.target/loongarch/attr-model-5.c | 8 + .../explicit-relocs-extreme-auto-tls-ld-gd.c | 5 + .../explicit-relocs-medium-auto-tls-ld-gd.c | 5 + ...icit-relocs-medium-call36-auto-tls-ld-gd.c | 5 + .../loongarch/func-call-extreme-5.c | 7 + .../loongarch/func-call-extreme-6.c | 7 + .../gcc.target/loongarch/tls-extreme-macro.c | 35 ++++ 11 files changed, 239 insertions(+), 129 deletions(-) create mode 100644 gcc/testsuite/gcc.target/loongarch/attr-model-5.c create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c create mode 100644 gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
Comments
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: > v3 -> v4: > 1. Add macro support for TLS symbols > 2. Added support for loading __get_tls_addr symbol address using call36. > 3. Merge template got_load_tls_{ld/gd/le/ie}. > 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. I've rebased and attached the patch to fix the bad split in -mexplicit- relocs={always,auto} -mcmodel=extreme on top of this series. I've not tested it seriously though (only tested the added and modified test cases).
在 2024/1/26 下午4:49, Xi Ruoyao 写道: > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: >> v3 -> v4: >> 1. Add macro support for TLS symbols >> 2. Added support for loading __get_tls_addr symbol address using call36. >> 3. Merge template got_load_tls_{ld/gd/le/ie}. >> 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. > I've rebased and attached the patch to fix the bad split in -mexplicit- > relocs={always,auto} -mcmodel=extreme on top of this series. I've not > tested it seriously though (only tested the added and modified test > cases). > OK, I'll test the spec for correctness.
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道: > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: > > > v3 -> v4: > > > 1. Add macro support for TLS symbols > > > 2. Added support for loading __get_tls_addr symbol address using call36. > > > 3. Merge template got_load_tls_{ld/gd/le/ie}. > > > 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. > > I've rebased and attached the patch to fix the bad split in -mexplicit- > > relocs={always,auto} -mcmodel=extreme on top of this series. I've not > > tested it seriously though (only tested the added and modified test > > cases). > > > OK, I'll test the spec for correctness. I suppose this still won't work yet because Binutils is not fully fixed. GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, foo", but ld is still not checking if an R_LARCH_RELAX is after R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS transition can still happen.
在 2024/1/26 下午6:57, Xi Ruoyao 写道: > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: >> 在 2024/1/26 下午4:49, Xi Ruoyao 写道: >>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: >>>> v3 -> v4: >>>> 1. Add macro support for TLS symbols >>>> 2. Added support for loading __get_tls_addr symbol address using call36. >>>> 3. Merge template got_load_tls_{ld/gd/le/ie}. >>>> 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. >>> I've rebased and attached the patch to fix the bad split in -mexplicit- >>> relocs={always,auto} -mcmodel=extreme on top of this series. I've not >>> tested it seriously though (only tested the added and modified test >>> cases). >>> >> OK, I'll test the spec for correctness. > I suppose this still won't work yet because Binutils is not fully fixed. > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, > foo", but ld is still not checking if an R_LARCH_RELAX is after > R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS > transition can still happen. I temporarily changed my binutils to turn off this function.;-) >
在 2024/1/26 下午6:57, Xi Ruoyao 写道: > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: >> 在 2024/1/26 下午4:49, Xi Ruoyao 写道: >>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: >>>> v3 -> v4: >>>> 1. Add macro support for TLS symbols >>>> 2. Added support for loading __get_tls_addr symbol address using call36. >>>> 3. Merge template got_load_tls_{ld/gd/le/ie}. >>>> 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. >>> I've rebased and attached the patch to fix the bad split in -mexplicit- >>> relocs={always,auto} -mcmodel=extreme on top of this series. I've not >>> tested it seriously though (only tested the added and modified test >>> cases). >>> >> OK, I'll test the spec for correctness. > I suppose this still won't work yet because Binutils is not fully fixed. > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, > foo", but ld is still not checking if an R_LARCH_RELAX is after > R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS > transition can still happen. > The following situations are not handled in the patch: diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 3fab4b64453..6336a9f696f 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, { if (TARGET_CMODEL_EXTREME) { - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) + { + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); + } + else + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx)); } else @@ -7482,7 +7488,15 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, else { if (TARGET_CMODEL_EXTREME) - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); + { + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) + { + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); + } + else + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); + } else loongarch_emit_move (temp1, fnaddr);
On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote: > > 在 2024/1/26 下午6:57, Xi Ruoyao 写道: > > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: > > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道: > > > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: > > > > > v3 -> v4: > > > > > 1. Add macro support for TLS symbols > > > > > 2. Added support for loading __get_tls_addr symbol address using call36. > > > > > 3. Merge template got_load_tls_{ld/gd/le/ie}. > > > > > 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. > > > > I've rebased and attached the patch to fix the bad split in -mexplicit- > > > > relocs={always,auto} -mcmodel=extreme on top of this series. I've not > > > > tested it seriously though (only tested the added and modified test > > > > cases). > > > > > > > OK, I'll test the spec for correctness. > > I suppose this still won't work yet because Binutils is not fully fixed. > > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, > > foo", but ld is still not checking if an R_LARCH_RELAX is after > > R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS > > transition can still happen. > > > > The following situations are not handled in the patch: > > diff --git a/gcc/config/loongarch/loongarch.cc > b/gcc/config/loongarch/loongarch.cc > > index 3fab4b64453..6336a9f696f 100644 > --- a/gcc/config/loongarch/loongarch.cc > +++ b/gcc/config/loongarch/loongarch.cc > @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree > thunk_fndecl ATTRIBUTE_UNUSED, > { > if (TARGET_CMODEL_EXTREME) > { > - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) > + { > + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); > + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); > + } > + else > + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx)); > } > else > @@ -7482,7 +7488,15 @@ loongarch_output_mi_thunk (FILE *file, tree > thunk_fndecl ATTRIBUTE_UNUSED, > else > { > if (TARGET_CMODEL_EXTREME) > - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > + { > + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) > + { > + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); > + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); > + } > + else > + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > + } > else > loongarch_emit_move (temp1, fnaddr); In deed. Considering the similarity of these two hunks I'll separate the logic into a static function though. And I'll also add some test case for them...
On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote: > On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote: > > > > 在 2024/1/26 下午6:57, Xi Ruoyao 写道: > > > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: > > > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道: > > > > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: > > > > > > v3 -> v4: > > > > > > 1. Add macro support for TLS symbols > > > > > > 2. Added support for loading __get_tls_addr symbol address using call36. > > > > > > 3. Merge template got_load_tls_{ld/gd/le/ie}. > > > > > > 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. > > > > > I've rebased and attached the patch to fix the bad split in -mexplicit- > > > > > relocs={always,auto} -mcmodel=extreme on top of this series. I've not > > > > > tested it seriously though (only tested the added and modified test > > > > > cases). > > > > > > > > > OK, I'll test the spec for correctness. > > > I suppose this still won't work yet because Binutils is not fully fixed. > > > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, > > > foo", but ld is still not checking if an R_LARCH_RELAX is after > > > R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS > > > transition can still happen. > > > > > > > The following situations are not handled in the patch: > > > > diff --git a/gcc/config/loongarch/loongarch.cc > > b/gcc/config/loongarch/loongarch.cc > > > > index 3fab4b64453..6336a9f696f 100644 > > --- a/gcc/config/loongarch/loongarch.cc > > +++ b/gcc/config/loongarch/loongarch.cc > > @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree > > thunk_fndecl ATTRIBUTE_UNUSED, > > { > > if (TARGET_CMODEL_EXTREME) > > { > > - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > > + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) > > + { > > + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); > > + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); > > + } > > + else > > + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); It looks like this part is unreachable: with -mcmodel=extreme use_sibcall_p will never be true. So cleaned up this part and fixed an ERROR in the added test: diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc index 3a97ba61362..7b8c85a1606 100644 --- a/gcc/config/loongarch/loongarch.cc +++ b/gcc/config/loongarch/loongarch.cc @@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, allowed, otherwise load the address into a register first. */ if (use_sibcall_p) { - if (TARGET_CMODEL_EXTREME) - { - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); - insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx)); - } - else - insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); + /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all + and const_call_insn_operand should have returned false. */ + gcc_assert (!TARGET_CMODEL_EXTREME); + + insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); SIBLING_CALL_P (insn) = 1; } else { - if (TARGET_CMODEL_EXTREME) + if (!TARGET_CMODEL_EXTREME) + loongarch_emit_move (temp1, fnaddr); + else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE) emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); else - loongarch_emit_move (temp1, fnaddr); + { + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); + } emit_jump_insn (gen_indirect_jump (temp1)); } diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c index 27baf4886d6..35bd4570a9e 100644 --- a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c +++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" } */ -/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */ +/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } } */ #include "./explicit-relocs-auto-tls-ld-gd.c" And added 3 tests for output_mi_thunk. The updated patch attached, now running regression test.
在 2024/1/27 下午7:11, Xi Ruoyao 写道: > On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote: >> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote: >>> 在 2024/1/26 下午6:57, Xi Ruoyao 写道: >>>> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: >>>>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道: >>>>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: >>>>>>> v3 -> v4: >>>>>>> 1. Add macro support for TLS symbols >>>>>>> 2. Added support for loading __get_tls_addr symbol address using call36. >>>>>>> 3. Merge template got_load_tls_{ld/gd/le/ie}. >>>>>>> 4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto. >>>>>> I've rebased and attached the patch to fix the bad split in -mexplicit- >>>>>> relocs={always,auto} -mcmodel=extreme on top of this series. I've not >>>>>> tested it seriously though (only tested the added and modified test >>>>>> cases). >>>>>> >>>>> OK, I'll test the spec for correctness. >>>> I suppose this still won't work yet because Binutils is not fully fixed. >>>> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, >>>> foo", but ld is still not checking if an R_LARCH_RELAX is after >>>> R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" TLS >>>> transition can still happen. >>>> >>> The following situations are not handled in the patch: >>> >>> diff --git a/gcc/config/loongarch/loongarch.cc >>> b/gcc/config/loongarch/loongarch.cc >>> >>> index 3fab4b64453..6336a9f696f 100644 >>> --- a/gcc/config/loongarch/loongarch.cc >>> +++ b/gcc/config/loongarch/loongarch.cc >>> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree >>> thunk_fndecl ATTRIBUTE_UNUSED, >>> { >>> if (TARGET_CMODEL_EXTREME) >>> { >>> - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); >>> + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) >>> + { >>> + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); >>> + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); >>> + } >>> + else >>> + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > It looks like this part is unreachable: with -mcmodel=extreme > use_sibcall_p will never be true. > > So cleaned up this part and fixed an ERROR in the added test: > > diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc > index 3a97ba61362..7b8c85a1606 100644 > --- a/gcc/config/loongarch/loongarch.cc > +++ b/gcc/config/loongarch/loongarch.cc > @@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, > allowed, otherwise load the address into a register first. */ > if (use_sibcall_p) > { > - if (TARGET_CMODEL_EXTREME) > - { > - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > - insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx)); > - } > - else > - insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); > + /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all > + and const_call_insn_operand should have returned false. */ > + gcc_assert (!TARGET_CMODEL_EXTREME); > + > + insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); > SIBLING_CALL_P (insn) = 1; > } > else > { > - if (TARGET_CMODEL_EXTREME) > + if (!TARGET_CMODEL_EXTREME) > + loongarch_emit_move (temp1, fnaddr); > + else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE) > emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); > else > - loongarch_emit_move (temp1, fnaddr); > + { > + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); > + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); > + } > > emit_jump_insn (gen_indirect_jump (temp1)); > } > diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c > index 27baf4886d6..35bd4570a9e 100644 > --- a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c > +++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c > @@ -1,5 +1,5 @@ > /* { dg-do compile } */ > /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" } */ > -/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */ > +/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } } */ > > #include "./explicit-relocs-auto-tls-ld-gd.c" > > And added 3 tests for output_mi_thunk. The updated patch attached, now > running regression test. > @@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum loongarch_symbol_type type, rtx v0) { if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP)) { - rtx tmp1 = gen_reg_rtx (Pmode); - rtx high = gen_reg_rtx (Pmode); + gcc_assert (la_opt_explicit_relocs != + EXPLICIT_RELOCS_NONE); This operator is written at the end of the line, and I think there is no problem with anything else. But I need to see the results on Monday for the test.
在 2024/1/27 下午10:03, chenglulu 写道: > > 在 2024/1/27 下午7:11, Xi Ruoyao 写道: >> On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote: >>> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote: >>>> 在 2024/1/26 下午6:57, Xi Ruoyao 写道: >>>>> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote: >>>>>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道: >>>>>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote: >>>>>>>> v3 -> v4: >>>>>>>> 1. Add macro support for TLS symbols >>>>>>>> 2. Added support for loading __get_tls_addr symbol address >>>>>>>> using call36. >>>>>>>> 3. Merge template got_load_tls_{ld/gd/le/ie}. >>>>>>>> 4. Enable explicit reloc for extreme TLS GD/LD with >>>>>>>> -mexplicit-relocs=auto. >>>>>>> I've rebased and attached the patch to fix the bad split in >>>>>>> -mexplicit- >>>>>>> relocs={always,auto} -mcmodel=extreme on top of this series. >>>>>>> I've not >>>>>>> tested it seriously though (only tested the added and modified test >>>>>>> cases). >>>>>>> >>>>>> OK, I'll test the spec for correctness. >>>>> I suppose this still won't work yet because Binutils is not fully >>>>> fixed. >>>>> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0, >>>>> foo", but ld is still not checking if an R_LARCH_RELAX is after >>>>> R_LARCH_TLS_IE_PC_{HI20,LO12} properly. Thus an invalid "partial" >>>>> TLS >>>>> transition can still happen. >>>>> >>>> The following situations are not handled in the patch: >>>> >>>> diff --git a/gcc/config/loongarch/loongarch.cc >>>> b/gcc/config/loongarch/loongarch.cc >>>> >>>> index 3fab4b64453..6336a9f696f 100644 >>>> --- a/gcc/config/loongarch/loongarch.cc >>>> +++ b/gcc/config/loongarch/loongarch.cc >>>> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree >>>> thunk_fndecl ATTRIBUTE_UNUSED, >>>> { >>>> if (TARGET_CMODEL_EXTREME) >>>> { >>>> - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); >>>> + if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE) >>>> + { >>>> + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, >>>> fnaddr)); >>>> + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, >>>> temp2)); >>>> + } >>>> + else >>>> + emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, >>>> temp2)); >> It looks like this part is unreachable: with -mcmodel=extreme >> use_sibcall_p will never be true. >> >> So cleaned up this part and fixed an ERROR in the added test: >> >> diff --git a/gcc/config/loongarch/loongarch.cc >> b/gcc/config/loongarch/loongarch.cc >> index 3a97ba61362..7b8c85a1606 100644 >> --- a/gcc/config/loongarch/loongarch.cc >> +++ b/gcc/config/loongarch/loongarch.cc >> @@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree >> thunk_fndecl ATTRIBUTE_UNUSED, >> allowed, otherwise load the address into a register first. */ >> if (use_sibcall_p) >> { >> - if (TARGET_CMODEL_EXTREME) >> - { >> - emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); >> - insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx)); >> - } >> - else >> - insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx)); >> + /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all >> + and const_call_insn_operand should have returned false. */ >> + gcc_assert (!TARGET_CMODEL_EXTREME); >> + >> + insn = emit_call_insn (gen_sibcall_internal (fnaddr, >> const0_rtx)); >> SIBLING_CALL_P (insn) = 1; >> } >> else >> { >> - if (TARGET_CMODEL_EXTREME) >> + if (!TARGET_CMODEL_EXTREME) >> + loongarch_emit_move (temp1, fnaddr); >> + else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE) >> emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2)); >> else >> - loongarch_emit_move (temp1, fnaddr); >> + { >> + emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr)); >> + emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2)); >> + } >> emit_jump_insn (gen_indirect_jump (temp1)); >> } >> diff --git >> a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c >> b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c >> >> index 27baf4886d6..35bd4570a9e 100644 >> --- >> a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c >> +++ >> b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c >> @@ -1,5 +1,5 @@ >> /* { dg-do compile } */ >> /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme >> -fno-plt" } */ >> -/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target >> tls_native } } } */ >> +/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target >> tls_native } } } */ >> #include "./explicit-relocs-auto-tls-ld-gd.c" >> >> And added 3 tests for output_mi_thunk. The updated patch attached, now >> running regression test. >> > > @@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum > loongarch_symbol_type type, rtx v0) > { > if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP)) > { > - rtx tmp1 = gen_reg_rtx (Pmode); > - rtx high = gen_reg_rtx (Pmode); > + gcc_assert (la_opt_explicit_relocs != > + EXPLICIT_RELOCS_NONE); > > This operator is written at the end of the line, and I think there is > no problem with anything else. > > But I need to see the results on Monday for the test. > > The spec can pass the test, and I have no other problems. Thanks!