[v4,0/4] When cmodel=extreme, add macro support and only support macros.

Message ID 20240126073745.13252-1-chenglulu@loongson.cn
Headers
Series When cmodel=extreme, add macro support and only support macros. |

Message

chenglulu Jan. 26, 2024, 7:37 a.m. UTC
  v3 -> v4:
  1. Add macro support for TLS symbols
  2. Added support for loading __get_tls_addr symbol address using call36.
  3. Merge template got_load_tls_{ld/gd/le/ie}.
  4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.


v2 -> v3:
  1. Modify the detection rules of a test case.

v1 -> v2:
  1. Use the temporarily allocated registers as intermediate registers to implement the extreme macro.
  2. Fixed bugs in v1 test cases.


Lulu Cheng (4):
  LoongArch: Merge template got_load_tls_{ld/gd/le/ie}.
  LoongArch: Add the macro implementation of mcmodel=extreme.
  LoongArch: Enable explicit reloc for extreme TLS GD/LD with
    -mexplicit-relocs=auto.
  LoongArch: Added support for loading __get_tls_addr symbol address
    using call36.

 gcc/config/loongarch/loongarch-protos.h       |   1 +
 gcc/config/loongarch/loongarch.cc             | 182 +++++++++---------
 gcc/config/loongarch/loongarch.md             | 101 ++++++----
 gcc/config/loongarch/predicates.md            |  12 ++
 .../gcc.target/loongarch/attr-model-5.c       |   8 +
 .../explicit-relocs-extreme-auto-tls-ld-gd.c  |   5 +
 .../explicit-relocs-medium-auto-tls-ld-gd.c   |   5 +
 ...icit-relocs-medium-call36-auto-tls-ld-gd.c |   5 +
 .../loongarch/func-call-extreme-5.c           |   7 +
 .../loongarch/func-call-extreme-6.c           |   7 +
 .../gcc.target/loongarch/tls-extreme-macro.c  |  35 ++++
 11 files changed, 239 insertions(+), 129 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/attr-model-5.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-auto-tls-ld-gd.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/explicit-relocs-medium-call36-auto-tls-ld-gd.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-5.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/func-call-extreme-6.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/tls-extreme-macro.c
  

Comments

Xi Ruoyao Jan. 26, 2024, 8:49 a.m. UTC | #1
On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> v3 -> v4:
>   1. Add macro support for TLS symbols
>   2. Added support for loading __get_tls_addr symbol address using call36.
>   3. Merge template got_load_tls_{ld/gd/le/ie}.
>   4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.

I've rebased and attached the patch to fix the bad split in -mexplicit-
relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
tested it seriously though (only tested the added and modified test
cases).
  
chenglulu Jan. 26, 2024, 8:59 a.m. UTC | #2
在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
>> v3 -> v4:
>>    1. Add macro support for TLS symbols
>>    2. Added support for loading __get_tls_addr symbol address using call36.
>>    3. Merge template got_load_tls_{ld/gd/le/ie}.
>>    4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
> I've rebased and attached the patch to fix the bad split in -mexplicit-
> relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
> tested it seriously though (only tested the added and modified test
> cases).
>
OK, I'll test the spec for correctness.
  
Xi Ruoyao Jan. 26, 2024, 10:57 a.m. UTC | #3
On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
> 
> 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> > > v3 -> v4:
> > >    1. Add macro support for TLS symbols
> > >    2. Added support for loading __get_tls_addr symbol address using call36.
> > >    3. Merge template got_load_tls_{ld/gd/le/ie}.
> > >    4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
> > I've rebased and attached the patch to fix the bad split in -mexplicit-
> > relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
> > tested it seriously though (only tested the added and modified test
> > cases).
> > 
> OK, I'll test the spec for correctness.

I suppose this still won't work yet because Binutils is not fully fixed.
GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
foo", but ld is still not checking if an R_LARCH_RELAX is after
R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS
transition can still happen.
  
chenglulu Jan. 26, 2024, 11:15 a.m. UTC | #4
在 2024/1/26 下午6:57, Xi Ruoyao 写道:
> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
>>>> v3 -> v4:
>>>>     1. Add macro support for TLS symbols
>>>>     2. Added support for loading __get_tls_addr symbol address using call36.
>>>>     3. Merge template got_load_tls_{ld/gd/le/ie}.
>>>>     4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
>>> I've rebased and attached the patch to fix the bad split in -mexplicit-
>>> relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
>>> tested it seriously though (only tested the added and modified test
>>> cases).
>>>
>> OK, I'll test the spec for correctness.
> I suppose this still won't work yet because Binutils is not fully fixed.
> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
> foo", but ld is still not checking if an R_LARCH_RELAX is after
> R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS
> transition can still happen.
I temporarily changed my binutils to turn off this function.;-)

>
  
chenglulu Jan. 27, 2024, 3:15 a.m. UTC | #5
在 2024/1/26 下午6:57, Xi Ruoyao 写道:
> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
>>>> v3 -> v4:
>>>>     1. Add macro support for TLS symbols
>>>>     2. Added support for loading __get_tls_addr symbol address using call36.
>>>>     3. Merge template got_load_tls_{ld/gd/le/ie}.
>>>>     4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
>>> I've rebased and attached the patch to fix the bad split in -mexplicit-
>>> relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
>>> tested it seriously though (only tested the added and modified test
>>> cases).
>>>
>> OK, I'll test the spec for correctness.
> I suppose this still won't work yet because Binutils is not fully fixed.
> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
> foo", but ld is still not checking if an R_LARCH_RELAX is after
> R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS
> transition can still happen.
>

The following situations are not handled in the patch:

diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc

index 3fab4b64453..6336a9f696f 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree 
thunk_fndecl ATTRIBUTE_UNUSED,
      {
        if (TARGET_CMODEL_EXTREME)
         {
-         emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+           {
+             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+           }
+         else
+           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
           insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
         }
        else
@@ -7482,7 +7488,15 @@ loongarch_output_mi_thunk (FILE *file, tree 
thunk_fndecl ATTRIBUTE_UNUSED,
    else
      {
        if (TARGET_CMODEL_EXTREME)
-       emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+       {
+         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
+           {
+             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+           }
+         else
+           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
+       }
        else
         loongarch_emit_move (temp1, fnaddr);
  
Xi Ruoyao Jan. 27, 2024, 10:02 a.m. UTC | #6
On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
> 
> 在 2024/1/26 下午6:57, Xi Ruoyao 写道:
> > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
> > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> > > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> > > > > v3 -> v4:
> > > > >     1. Add macro support for TLS symbols
> > > > >     2. Added support for loading __get_tls_addr symbol address using call36.
> > > > >     3. Merge template got_load_tls_{ld/gd/le/ie}.
> > > > >     4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
> > > > I've rebased and attached the patch to fix the bad split in -mexplicit-
> > > > relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
> > > > tested it seriously though (only tested the added and modified test
> > > > cases).
> > > > 
> > > OK, I'll test the spec for correctness.
> > I suppose this still won't work yet because Binutils is not fully fixed.
> > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
> > foo", but ld is still not checking if an R_LARCH_RELAX is after
> > R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS
> > transition can still happen.
> > 
> 
> The following situations are not handled in the patch:
> 
> diff --git a/gcc/config/loongarch/loongarch.cc 
> b/gcc/config/loongarch/loongarch.cc
> 
> index 3fab4b64453..6336a9f696f 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree 
> thunk_fndecl ATTRIBUTE_UNUSED,
>       {
>         if (TARGET_CMODEL_EXTREME)
>          {
> -         emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> +         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
> +           {
> +             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> +             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> +           }
> +         else
> +           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
>            insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
>          }
>         else
> @@ -7482,7 +7488,15 @@ loongarch_output_mi_thunk (FILE *file, tree 
> thunk_fndecl ATTRIBUTE_UNUSED,
>     else
>       {
>         if (TARGET_CMODEL_EXTREME)
> -       emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> +       {
> +         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
> +           {
> +             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> +             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> +           }
> +         else
> +           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> +       }
>         else
>          loongarch_emit_move (temp1, fnaddr);

In deed.  Considering the similarity of these two hunks I'll separate
the logic into a static function though.  And I'll also add some test
case for them...
  
Xi Ruoyao Jan. 27, 2024, 11:11 a.m. UTC | #7
On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote:
> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
> > 
> > 在 2024/1/26 下午6:57, Xi Ruoyao 写道:
> > > On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
> > > > 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
> > > > > On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
> > > > > > v3 -> v4:
> > > > > >     1. Add macro support for TLS symbols
> > > > > >     2. Added support for loading __get_tls_addr symbol address using call36.
> > > > > >     3. Merge template got_load_tls_{ld/gd/le/ie}.
> > > > > >     4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
> > > > > I've rebased and attached the patch to fix the bad split in -mexplicit-
> > > > > relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
> > > > > tested it seriously though (only tested the added and modified test
> > > > > cases).
> > > > > 
> > > > OK, I'll test the spec for correctness.
> > > I suppose this still won't work yet because Binutils is not fully fixed.
> > > GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
> > > foo", but ld is still not checking if an R_LARCH_RELAX is after
> > > R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS
> > > transition can still happen.
> > > 
> > 
> > The following situations are not handled in the patch:
> > 
> > diff --git a/gcc/config/loongarch/loongarch.cc 
> > b/gcc/config/loongarch/loongarch.cc
> > 
> > index 3fab4b64453..6336a9f696f 100644
> > --- a/gcc/config/loongarch/loongarch.cc
> > +++ b/gcc/config/loongarch/loongarch.cc
> > @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree 
> > thunk_fndecl ATTRIBUTE_UNUSED,
> >       {
> >         if (TARGET_CMODEL_EXTREME)
> >          {
> > -         emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> > +         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
> > +           {
> > +             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> > +             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> > +           }
> > +         else
> > +           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));

It looks like this part is unreachable: with -mcmodel=extreme
use_sibcall_p will never be true.

So cleaned up this part and fixed an ERROR in the added test:

diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index 3a97ba61362..7b8c85a1606 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
      allowed, otherwise load the address into a register first.  */
   if (use_sibcall_p)
     {
-      if (TARGET_CMODEL_EXTREME)
-	{
-	  emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
-	  insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
-	}
-      else
-	insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
+      /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all
+	 and const_call_insn_operand should have returned false.  */
+      gcc_assert (!TARGET_CMODEL_EXTREME);
+
+      insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
       SIBLING_CALL_P (insn) = 1;
     }
   else
     {
-      if (TARGET_CMODEL_EXTREME)
+      if (!TARGET_CMODEL_EXTREME)
+	loongarch_emit_move (temp1, fnaddr);
+      else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
 	emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
       else
-	loongarch_emit_move (temp1, fnaddr);
+	{
+	  emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
+	  emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
+	}
 
       emit_jump_insn (gen_indirect_jump (temp1));
     }
diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
index 27baf4886d6..35bd4570a9e 100644
--- a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
+++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
 /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" } */
-/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */
+/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } } */
 
 #include "./explicit-relocs-auto-tls-ld-gd.c"

And added 3 tests for output_mi_thunk.  The updated patch attached, now
running regression test.
  
chenglulu Jan. 27, 2024, 2:03 p.m. UTC | #8
在 2024/1/27 下午7:11, Xi Ruoyao 写道:
> On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote:
>> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
>>> 在 2024/1/26 下午6:57, Xi Ruoyao 写道:
>>>> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
>>>>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
>>>>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
>>>>>>> v3 -> v4:
>>>>>>>      1. Add macro support for TLS symbols
>>>>>>>      2. Added support for loading __get_tls_addr symbol address using call36.
>>>>>>>      3. Merge template got_load_tls_{ld/gd/le/ie}.
>>>>>>>      4. Enable explicit reloc for extreme TLS GD/LD with -mexplicit-relocs=auto.
>>>>>> I've rebased and attached the patch to fix the bad split in -mexplicit-
>>>>>> relocs={always,auto} -mcmodel=extreme on top of this series.  I've not
>>>>>> tested it seriously though (only tested the added and modified test
>>>>>> cases).
>>>>>>
>>>>> OK, I'll test the spec for correctness.
>>>> I suppose this still won't work yet because Binutils is not fully fixed.
>>>> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
>>>> foo", but ld is still not checking if an R_LARCH_RELAX is after
>>>> R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" TLS
>>>> transition can still happen.
>>>>
>>> The following situations are not handled in the patch:
>>>
>>> diff --git a/gcc/config/loongarch/loongarch.cc
>>> b/gcc/config/loongarch/loongarch.cc
>>>
>>> index 3fab4b64453..6336a9f696f 100644
>>> --- a/gcc/config/loongarch/loongarch.cc
>>> +++ b/gcc/config/loongarch/loongarch.cc
>>> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
>>> thunk_fndecl ATTRIBUTE_UNUSED,
>>>        {
>>>          if (TARGET_CMODEL_EXTREME)
>>>           {
>>> -         emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
>>> +         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
>>> +           {
>>> +             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
>>> +             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
>>> +           }
>>> +         else
>>> +           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> It looks like this part is unreachable: with -mcmodel=extreme
> use_sibcall_p will never be true.
>
> So cleaned up this part and fixed an ERROR in the added test:
>
> diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
> index 3a97ba61362..7b8c85a1606 100644
> --- a/gcc/config/loongarch/loongarch.cc
> +++ b/gcc/config/loongarch/loongarch.cc
> @@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
>        allowed, otherwise load the address into a register first.  */
>     if (use_sibcall_p)
>       {
> -      if (TARGET_CMODEL_EXTREME)
> -	{
> -	  emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
> -	  insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
> -	}
> -      else
> -	insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
> +      /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all
> +	 and const_call_insn_operand should have returned false.  */
> +      gcc_assert (!TARGET_CMODEL_EXTREME);
> +
> +      insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
>         SIBLING_CALL_P (insn) = 1;
>       }
>     else
>       {
> -      if (TARGET_CMODEL_EXTREME)
> +      if (!TARGET_CMODEL_EXTREME)
> +	loongarch_emit_move (temp1, fnaddr);
> +      else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
>   	emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
>         else
> -	loongarch_emit_move (temp1, fnaddr);
> +	{
> +	  emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
> +	  emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
> +	}
>   
>         emit_jump_insn (gen_indirect_jump (temp1));
>       }
> diff --git a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
> index 27baf4886d6..35bd4570a9e 100644
> --- a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
> +++ b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
> @@ -1,5 +1,5 @@
>   /* { dg-do compile } */
>   /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme -fno-plt" } */
> -/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target tls_native } } } */
> +/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target tls_native } } } */
>   
>   #include "./explicit-relocs-auto-tls-ld-gd.c"
>
> And added 3 tests for output_mi_thunk.  The updated patch attached, now
> running regression test.
>

@@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum 
loongarch_symbol_type type, rtx v0)
             {
               if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP))
                 {
-                 rtx tmp1 = gen_reg_rtx (Pmode);
-                 rtx high = gen_reg_rtx (Pmode);
+                 gcc_assert (la_opt_explicit_relocs !=
+ EXPLICIT_RELOCS_NONE);

This operator is written at the end of the line, and I think there is no 
problem with anything else.

But I need to see the results on Monday for the test.
  
chenglulu Jan. 29, 2024, 4 a.m. UTC | #9
在 2024/1/27 下午10:03, chenglulu 写道:
>
> 在 2024/1/27 下午7:11, Xi Ruoyao 写道:
>> On Sat, 2024-01-27 at 18:02 +0800, Xi Ruoyao wrote:
>>> On Sat, 2024-01-27 at 11:15 +0800, chenglulu wrote:
>>>> 在 2024/1/26 下午6:57, Xi Ruoyao 写道:
>>>>> On Fri, 2024-01-26 at 16:59 +0800, chenglulu wrote:
>>>>>> 在 2024/1/26 下午4:49, Xi Ruoyao 写道:
>>>>>>> On Fri, 2024-01-26 at 15:37 +0800, Lulu Cheng wrote:
>>>>>>>> v3 -> v4:
>>>>>>>>      1. Add macro support for TLS symbols
>>>>>>>>      2. Added support for loading __get_tls_addr symbol address 
>>>>>>>> using call36.
>>>>>>>>      3. Merge template got_load_tls_{ld/gd/le/ie}.
>>>>>>>>      4. Enable explicit reloc for extreme TLS GD/LD with 
>>>>>>>> -mexplicit-relocs=auto.
>>>>>>> I've rebased and attached the patch to fix the bad split in 
>>>>>>> -mexplicit-
>>>>>>> relocs={always,auto} -mcmodel=extreme on top of this series.  
>>>>>>> I've not
>>>>>>> tested it seriously though (only tested the added and modified test
>>>>>>> cases).
>>>>>>>
>>>>>> OK, I'll test the spec for correctness.
>>>>> I suppose this still won't work yet because Binutils is not fully 
>>>>> fixed.
>>>>> GAS has been changed not to emit R_LARCH_RELAX for "la.tls.ie a0, t0,
>>>>> foo", but ld is still not checking if an R_LARCH_RELAX is after
>>>>> R_LARCH_TLS_IE_PC_{HI20,LO12} properly.  Thus an invalid "partial" 
>>>>> TLS
>>>>> transition can still happen.
>>>>>
>>>> The following situations are not handled in the patch:
>>>>
>>>> diff --git a/gcc/config/loongarch/loongarch.cc
>>>> b/gcc/config/loongarch/loongarch.cc
>>>>
>>>> index 3fab4b64453..6336a9f696f 100644
>>>> --- a/gcc/config/loongarch/loongarch.cc
>>>> +++ b/gcc/config/loongarch/loongarch.cc
>>>> @@ -7472,7 +7472,13 @@ loongarch_output_mi_thunk (FILE *file, tree
>>>> thunk_fndecl ATTRIBUTE_UNUSED,
>>>>        {
>>>>          if (TARGET_CMODEL_EXTREME)
>>>>           {
>>>> -         emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
>>>> +         if (la_opt_explicit_relocs != EXPLICIT_RELOCS_NONE)
>>>> +           {
>>>> +             emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, 
>>>> fnaddr));
>>>> +             emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, 
>>>> temp2));
>>>> +           }
>>>> +         else
>>>> +           emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, 
>>>> temp2));
>> It looks like this part is unreachable: with -mcmodel=extreme
>> use_sibcall_p will never be true.
>>
>> So cleaned up this part and fixed an ERROR in the added test:
>>
>> diff --git a/gcc/config/loongarch/loongarch.cc 
>> b/gcc/config/loongarch/loongarch.cc
>> index 3a97ba61362..7b8c85a1606 100644
>> --- a/gcc/config/loongarch/loongarch.cc
>> +++ b/gcc/config/loongarch/loongarch.cc
>> @@ -7481,21 +7481,24 @@ loongarch_output_mi_thunk (FILE *file, tree 
>> thunk_fndecl ATTRIBUTE_UNUSED,
>>        allowed, otherwise load the address into a register first.  */
>>     if (use_sibcall_p)
>>       {
>> -      if (TARGET_CMODEL_EXTREME)
>> -    {
>> -      emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
>> -      insn = emit_call_insn (gen_sibcall_internal (temp1, const0_rtx));
>> -    }
>> -      else
>> -    insn = emit_call_insn (gen_sibcall_internal (fnaddr, const0_rtx));
>> +      /* If TARGET_CMODEL_EXTREME, we cannot do a direct jump at all
>> +     and const_call_insn_operand should have returned false. */
>> +      gcc_assert (!TARGET_CMODEL_EXTREME);
>> +
>> +      insn = emit_call_insn (gen_sibcall_internal (fnaddr, 
>> const0_rtx));
>>         SIBLING_CALL_P (insn) = 1;
>>       }
>>     else
>>       {
>> -      if (TARGET_CMODEL_EXTREME)
>> +      if (!TARGET_CMODEL_EXTREME)
>> +    loongarch_emit_move (temp1, fnaddr);
>> +      else if (la_opt_explicit_relocs == EXPLICIT_RELOCS_NONE)
>>       emit_insn (gen_movdi_symbolic_off64 (temp1, fnaddr, temp2));
>>         else
>> -    loongarch_emit_move (temp1, fnaddr);
>> +    {
>> +      emit_insn (gen_la_pcrel64_two_parts (temp1, temp2, fnaddr));
>> +      emit_move_insn (temp1, gen_rtx_PLUS (Pmode, temp1, temp2));
>> +    }
>>           emit_jump_insn (gen_indirect_jump (temp1));
>>       }
>> diff --git 
>> a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c 
>> b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c 
>>
>> index 27baf4886d6..35bd4570a9e 100644
>> --- 
>> a/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
>> +++ 
>> b/gcc/testsuite/gcc.target/loongarch/explicit-relocs-extreme-auto-tls-ld-gd.c
>> @@ -1,5 +1,5 @@
>>   /* { dg-do compile } */
>>   /* { dg-options "-O2 -fPIC -mexplicit-relocs=auto -mcmodel=extreme 
>> -fno-plt" } */
>> -/* { dg-final { scan-assembler-not "la.tls.[lg]d" { target 
>> tls_native } } } */
>> +/* { dg-final { scan-assembler-not "la.tls.\[lg\]d" { target 
>> tls_native } } } */
>>     #include "./explicit-relocs-auto-tls-ld-gd.c"
>>
>> And added 3 tests for output_mi_thunk.  The updated patch attached, now
>> running regression test.
>>
>
> @@ -2870,20 +2872,30 @@ loongarch_call_tls_get_addr (rtx sym, enum 
> loongarch_symbol_type type, rtx v0)
>             {
>               if (loongarch_explicit_relocs_p (SYMBOL_GOT_DISP))
>                 {
> -                 rtx tmp1 = gen_reg_rtx (Pmode);
> -                 rtx high = gen_reg_rtx (Pmode);
> +                 gcc_assert (la_opt_explicit_relocs !=
> + EXPLICIT_RELOCS_NONE);
>
> This operator is written at the end of the line, and I think there is 
> no problem with anything else.
>
> But I need to see the results on Monday for the test.
>
>
The spec can pass the test, and I have no other problems.

Thanks!