[v3,0/2] RISC-V: Support CORE-V XCVSIMD extension

Message ID 20240116171351.913881-1-mary.bennett@embecosm.com
Headers
Series RISC-V: Support CORE-V XCVSIMD extension |

Message

Mary Bennett Jan. 16, 2024, 5:13 p.m. UTC
  v2 -> v3:
 * Removed duplicate ftype.

This patch series presents the comprehensive implementation of the SIMD
extension for CORE-V.

Tested with riscv-gnu-toolchain on binutils, ld, gas and gcc testsuites to
ensure its correctness and compatibility with the existing codebase.
However, your input, reviews, and suggestions are invaluable in making this
extension even more robust.

The CORE-V builtins are described in the specification [1] and work can be
found in the OpenHW group's Github repository [2].

[1] github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md

[2] github.com/openhwgroup/corev-gcc

Contributors:
  Mary Bennett <mary.bennett@embecosm.com>
  Nandni Jamnadas <nandni.jamnadas@embecosm.com>
  Pietra Ferreira <pietra.ferreira@embecosm.com>
  Charlie Keaney
  Jessica Mills
  Craig Blackmore <craig.blackmore@embecosm.com>
  Simon Cook <simon.cook@embecosm.com>
  Jeremy Bennett <jeremy.bennett@embecosm.com>
  Helene Chelin <helene.chelin@embecosm.com>

RISC-V: Add support for XCVsimd extension in CV32E40P
RISC-V: Fix XCValu test

 gcc/common/config/riscv/riscv-common.cc       |    2 +
 gcc/config/riscv/constraints.md               |   30 +
 gcc/config/riscv/corev.def                    |  156 ++
 gcc/config/riscv/corev.md                     | 1908 +++++++++++++++++
 gcc/config/riscv/predicates.md                |   20 +
 gcc/config/riscv/riscv-builtins.cc            |    1 +
 gcc/config/riscv/riscv-ftypes.def             |    8 +
 gcc/config/riscv/riscv.cc                     |    8 +
 gcc/config/riscv/riscv.opt                    |    2 +
 gcc/doc/extend.texi                           |  886 ++++++++
 gcc/doc/sourcebuild.texi                      |    3 +
 .../gcc.target/riscv/cv-alu-fail-compile.c    |   40 +-
 .../riscv/cv-simd-abs-b-compile-1.c           |   11 +
 .../riscv/cv-simd-abs-h-compile-1.c           |   11 +
 .../riscv/cv-simd-add-b-compile-1.c           |   11 +
 .../riscv/cv-simd-add-div2-compile-1.c        |   11 +
 .../riscv/cv-simd-add-div4-compile-1.c        |   11 +
 .../riscv/cv-simd-add-div8-compile-1.c        |   11 +
 .../riscv/cv-simd-add-h-compile-1.c           |   11 +
 .../riscv/cv-simd-add-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-add-sc-h-compile-1.c        |   30 +
 .../riscv/cv-simd-and-b-compile-1.c           |   11 +
 .../riscv/cv-simd-and-h-compile-1.c           |   11 +
 .../riscv/cv-simd-and-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-and-sc-h-compile-1.c        |   30 +
 .../riscv/cv-simd-avg-b-compile-1.c           |   11 +
 .../riscv/cv-simd-avg-h-compile-1.c           |   11 +
 .../riscv/cv-simd-avg-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-avg-sc-h-compile-1.c        |   30 +
 .../riscv/cv-simd-avgu-b-compile-1.c          |   11 +
 .../riscv/cv-simd-avgu-h-compile-1.c          |   11 +
 .../riscv/cv-simd-avgu-sc-b-compile-1.c       |   24 +
 .../riscv/cv-simd-avgu-sc-h-compile-1.c       |   24 +
 .../riscv/cv-simd-cmpeq-b-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpeq-h-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpeq-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpeq-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpge-b-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpge-h-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpge-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpge-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpgeu-b-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpgeu-h-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpgeu-sc-b-compile-1.c     |   24 +
 .../riscv/cv-simd-cmpgeu-sc-h-compile-1.c     |   24 +
 .../riscv/cv-simd-cmpgt-b-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpgt-h-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpgt-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpgt-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpgtu-b-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpgtu-h-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpgtu-sc-b-compile-1.c     |   24 +
 .../riscv/cv-simd-cmpgtu-sc-h-compile-1.c     |   24 +
 .../riscv/cv-simd-cmple-b-compile-1.c         |   11 +
 .../riscv/cv-simd-cmple-h-compile-1.c         |   11 +
 .../riscv/cv-simd-cmple-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-cmple-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpleu-b-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpleu-h-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpleu-sc-b-compile-1.c     |   24 +
 .../riscv/cv-simd-cmpleu-sc-h-compile-1.c     |   24 +
 .../riscv/cv-simd-cmplt-b-compile-1.c         |   11 +
 .../riscv/cv-simd-cmplt-h-compile-1.c         |   11 +
 .../riscv/cv-simd-cmplt-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-cmplt-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpltu-b-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpltu-h-compile-1.c        |   11 +
 .../riscv/cv-simd-cmpltu-sc-b-compile-1.c     |   24 +
 .../riscv/cv-simd-cmpltu-sc-h-compile-1.c     |   24 +
 .../riscv/cv-simd-cmpne-b-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpne-h-compile-1.c         |   11 +
 .../riscv/cv-simd-cmpne-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-cmpne-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-cplxconj-compile-1.c        |   11 +
 .../riscv/cv-simd-cplxmul-i-compile-1.c       |   11 +
 .../riscv/cv-simd-cplxmul-i-div2-compile-1.c  |   11 +
 .../riscv/cv-simd-cplxmul-i-div4-compile-1.c  |   11 +
 .../riscv/cv-simd-cplxmul-i-div8-compile-1.c  |   11 +
 .../riscv/cv-simd-cplxmul-r-compile-1.c       |   11 +
 .../riscv/cv-simd-cplxmul-r-div2-compile-1.c  |   11 +
 .../riscv/cv-simd-cplxmul-r-div4-compile-1.c  |   11 +
 .../riscv/cv-simd-cplxmul-r-div8-compile-1.c  |   11 +
 .../riscv/cv-simd-dotsp-b-compile-1.c         |   11 +
 .../riscv/cv-simd-dotsp-h-compile-1.c         |   11 +
 .../riscv/cv-simd-dotsp-sc-b-compile-1.c      |   30 +
 .../riscv/cv-simd-dotsp-sc-h-compile-1.c      |   30 +
 .../riscv/cv-simd-dotup-b-compile-1.c         |   11 +
 .../riscv/cv-simd-dotup-h-compile-1.c         |   11 +
 .../riscv/cv-simd-dotup-sc-b-compile-1.c      |   24 +
 .../riscv/cv-simd-dotup-sc-h-compile-1.c      |   24 +
 .../riscv/cv-simd-dotusp-b-compile-1.c        |   11 +
 .../riscv/cv-simd-dotusp-h-compile-1.c        |   11 +
 .../riscv/cv-simd-dotusp-sc-b-compile-1.c     |   30 +
 .../riscv/cv-simd-dotusp-sc-h-compile-1.c     |   30 +
 .../riscv/cv-simd-extract-b-compile-1.c       |   23 +
 .../riscv/cv-simd-extract-h-compile-1.c       |   23 +
 .../riscv/cv-simd-extractu-b-compile-1.c      |   23 +
 .../riscv/cv-simd-extractu-h-compile-1.c      |   23 +
 .../riscv/cv-simd-insert-b-compile-1.c        |   23 +
 .../riscv/cv-simd-insert-h-compile-1.c        |   23 +
 .../riscv/cv-simd-march-compile-1.c           | 1765 +++++++++++++++
 .../riscv/cv-simd-max-b-compile-1.c           |   11 +
 .../riscv/cv-simd-max-h-compile-1.c           |   11 +
 .../riscv/cv-simd-max-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-max-sc-h-compile-1.c        |   30 +
 .../riscv/cv-simd-maxu-b-compile-1.c          |   11 +
 .../riscv/cv-simd-maxu-h-compile-1.c          |   11 +
 .../riscv/cv-simd-maxu-sc-b-compile-1.c       |   24 +
 .../riscv/cv-simd-maxu-sc-h-compile-1.c       |   24 +
 .../riscv/cv-simd-min-b-compile-1.c           |   11 +
 .../riscv/cv-simd-min-h-compile-1.c           |   11 +
 .../riscv/cv-simd-min-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-min-sc-h-compile-1.c        |   30 +
 .../riscv/cv-simd-minu-b-compile-1.c          |   11 +
 .../riscv/cv-simd-minu-h-compile-1.c          |   11 +
 .../riscv/cv-simd-minu-sc-b-compile-1.c       |   24 +
 .../riscv/cv-simd-minu-sc-h-compile-1.c       |   24 +
 .../riscv/cv-simd-neg-b-compile-1.c           |   11 +
 .../riscv/cv-simd-neg-h-compile-1.c           |   11 +
 .../gcc.target/riscv/cv-simd-or-b-compile-1.c |   11 +
 .../gcc.target/riscv/cv-simd-or-h-compile-1.c |   11 +
 .../riscv/cv-simd-or-sc-b-compile-1.c         |   30 +
 .../riscv/cv-simd-or-sc-h-compile-1.c         |   30 +
 .../gcc.target/riscv/cv-simd-pack-compile-1.c |   11 +
 .../riscv/cv-simd-pack-h-compile-1.c          |   11 +
 .../riscv/cv-simd-packhi-b-compile-1.c        |   11 +
 .../riscv/cv-simd-packlo-b-compile-1.c        |   11 +
 .../riscv/cv-simd-sdotsp-b-compile-1.c        |   11 +
 .../riscv/cv-simd-sdotsp-h-compile-1.c        |   11 +
 .../riscv/cv-simd-sdotsp-sc-b-compile-1.c     |   30 +
 .../riscv/cv-simd-sdotsp-sc-h-compile-1.c     |   30 +
 .../riscv/cv-simd-sdotup-b-compile-1.c        |   11 +
 .../riscv/cv-simd-sdotup-h-compile-1.c        |   11 +
 .../riscv/cv-simd-sdotup-sc-b-compile-1.c     |   24 +
 .../riscv/cv-simd-sdotup-sc-h-compile-1.c     |   24 +
 .../riscv/cv-simd-sdotusp-b-compile-1.c       |   11 +
 .../riscv/cv-simd-sdotusp-h-compile-1.c       |   11 +
 .../riscv/cv-simd-sdotusp-sc-b-compile-1.c    |   30 +
 .../riscv/cv-simd-sdotusp-sc-h-compile-1.c    |   30 +
 .../riscv/cv-simd-shuffle-sci-h-compile-1.c   |   11 +
 .../riscv/cv-simd-shuffle2-b-compile-1.c      |   11 +
 .../riscv/cv-simd-shuffle2-h-compile-1.c      |   11 +
 .../riscv/cv-simd-shufflei0-sci-b-compile-1.c |   19 +
 .../riscv/cv-simd-shufflei1-sci-b-compile-1.c |   19 +
 .../riscv/cv-simd-shufflei2-sci-b-compile-1.c |   19 +
 .../riscv/cv-simd-shufflei3-sci-b-compile-1.c |   19 +
 .../riscv/cv-simd-sll-b-compile-1.c           |   11 +
 .../riscv/cv-simd-sll-h-compile-1.c           |   11 +
 .../riscv/cv-simd-sll-sc-b-compile-1.c        |   24 +
 .../riscv/cv-simd-sll-sc-h-compile-1.c        |   24 +
 .../riscv/cv-simd-sra-b-compile-1.c           |   11 +
 .../riscv/cv-simd-sra-h-compile-1.c           |   11 +
 .../riscv/cv-simd-sra-sc-b-compile-1.c        |   24 +
 .../riscv/cv-simd-sra-sc-h-compile-1.c        |   24 +
 .../riscv/cv-simd-srl-b-compile-1.c           |   11 +
 .../riscv/cv-simd-srl-h-compile-1.c           |   11 +
 .../riscv/cv-simd-srl-sc-b-compile-1.c        |   24 +
 .../riscv/cv-simd-srl-sc-h-compile-1.c        |   24 +
 .../riscv/cv-simd-sub-b-compile-1.c           |   11 +
 .../riscv/cv-simd-sub-div2-compile-1.c        |   11 +
 .../riscv/cv-simd-sub-div4-compile-1.c        |   11 +
 .../riscv/cv-simd-sub-div8-compile-1.c        |   11 +
 .../riscv/cv-simd-sub-h-compile-1.c           |   11 +
 .../riscv/cv-simd-sub-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-sub-sc-h-compile-1.c        |   30 +
 .../riscv/cv-simd-subrotmj-compile-1.c        |   11 +
 .../riscv/cv-simd-subrotmj-div2-compile-1.c   |   11 +
 .../riscv/cv-simd-subrotmj-div4-compile-1.c   |   11 +
 .../riscv/cv-simd-subrotmj-div8-compile-1.c   |   11 +
 .../riscv/cv-simd-xor-b-compile-1.c           |   11 +
 .../riscv/cv-simd-xor-h-compile-1.c           |   11 +
 .../riscv/cv-simd-xor-sc-b-compile-1.c        |   30 +
 .../riscv/cv-simd-xor-sc-h-compile-1.c        |   30 +
 gcc/testsuite/lib/target-supports.exp         |   13 +
 174 files changed, 7682 insertions(+), 20 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-abs-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-abs-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-div2-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-div4-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-div8-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-add-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-and-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-and-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-and-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avg-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avg-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avgu-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avgu-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmple-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmple-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxconj-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-simd-dotup-b-compile-1.c
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Comments

Kito Cheng Jan. 25, 2024, 1:53 p.m. UTC | #1
It's stage 4, so I think it would be great to not disturb code base
too much, and adding intrinsic without adding VLS modes should be
better way to go, and  here is not really something serious coding
style issue, just few minor indentation issue, so I gonna run
regression to make not break anything else and then commit to trunk :)
  
Kito Cheng Jan. 25, 2024, 2:52 p.m. UTC | #2
pushed :)

On Thu, Jan 25, 2024 at 9:53 PM Kito Cheng <kito.cheng@gmail.com> wrote:
>
> It's stage 4, so I think it would be great to not disturb code base
> too much, and adding intrinsic without adding VLS modes should be
> better way to go, and  here is not really something serious coding
> style issue, just few minor indentation issue, so I gonna run
> regression to make not break anything else and then commit to trunk :)