mbox series

[v5,0/1] RISC-V: Support CORE-V XCVBI extension

Message ID 20240108131456.803003-1-mary.bennett@embecosm.com
Headers
Series RISC-V: Support CORE-V XCVBI extension |

Message

Mary Bennett Jan. 8, 2024, 1:14 p.m. UTC 
  Thank you for reviewing my patches and merging XCVelw.

This patch series presents the comprehensive implementation of the BI
extension for CORE-V.

Tested with riscv-gnu-toolchain on binutils, ld, gas and gcc testsuites to
ensure its correctness and compatibility with the existing codebase.
However, your input, reviews, and suggestions are invaluable in making this
extension even more robust.

The CORE-V builtins are described in the specification [1] and work can be
found in the OpenHW group's Github repository [2].

[1] github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md

[2] github.com/openhwgroup/corev-gcc

Contributors:
  Mary Bennett <mary.bennett@embecosm.com>
  Nandni Jamnadas <nandni.jamnadas@embecosm.com>
  Pietra Ferreira <pietra.ferreira@embecosm.com>
  Charlie Keaney
  Jessica Mills
  Craig Blackmore <craig.blackmore@embecosm.com>
  Simon Cook <simon.cook@embecosm.com>
  Jeremy Bennett <jeremy.bennett@embecosm.com>
  Helene Chelin <helene.chelin@embecosm.com>

RISC-V: Add support for XCVbi extension in CV32E40P

 gcc/common/config/riscv/riscv-common.cc       |  4 ++
 gcc/config/riscv/constraints.md               | 21 +++++---
 gcc/config/riscv/corev.def                    |  3 ++
 gcc/config/riscv/corev.md                     | 51 ++++++++++++++++++-
 gcc/config/riscv/predicates.md                |  4 ++
 gcc/config/riscv/riscv.md                     |  2 +-
 gcc/config/riscv/riscv.opt                    |  2 +
 gcc/doc/sourcebuild.texi                      |  3 ++
 .../gcc.target/riscv/cv-bi-beqimm-compile-1.c | 17 +++++++
 .../gcc.target/riscv/cv-bi-beqimm-compile-2.c | 48 +++++++++++++++++++
 .../gcc.target/riscv/cv-bi-bneimm-compile-1.c | 17 +++++++
 .../gcc.target/riscv/cv-bi-bneimm-compile-2.c | 48 +++++++++++++++++++
 gcc/testsuite/lib/target-supports.exp         | 13 +++++
 12 files changed, 198 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-bi-beqimm-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-bi-beqimm-compile-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-bi-bneimm-compile-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/cv-bi-bneimm-compile-2.c