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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id d14-20020ac85ace000000b00425f05f63e9si1906415qtd.68.2023.12.20.04.22.01 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Dec 2023 04:22:01 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=alibaba.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 28E2A3861012 for ; Wed, 20 Dec 2023 12:22:01 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from out30-97.freemail.mail.aliyun.com (out30-97.freemail.mail.aliyun.com [115.124.30.97]) by sourceware.org (Postfix) with ESMTPS id 10C763858C2C for ; Wed, 20 Dec 2023 12:21:35 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 10C763858C2C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.alibaba.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.alibaba.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 10C763858C2C Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=115.124.30.97 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703074898; cv=none; b=qiEEI5L9XU+PBZ0fqhYdC/wrzgWrVHpp4kVNs86Tqf7UiAkLm7ZciJS/EGPP7PIiJ7siPC1LBOfLiwrPI8buONZVFCFZDoh5uALablKZ4tnoo4w+EUsRUq7X+ra1SDlN+lHr89TQDdmusVseUxtt7j/1QJVnc0Mktdqop/iL27M= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1703074898; c=relaxed/simple; bh=FmcS22HJSVGJzh/PZNhgnecjEhuewHRnPv+KAsVkBBk=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=feJuBcO7VShl3cluaquN3XEZSzK7oM8iHy3SO/m39RlqjtVlbMPSC7408SPPEle+fCQMlpHTXuUwI14rtIPH0kFg82BVNHT886vkxAWwncBz8HpIw2GC9yPoDu9lt5kEZ03UlSRGkwOp0yoBjp6oTD3brtpyCsx4SqdiPbhKjq0= ARC-Authentication-Results: i=1; server2.sourceware.org X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R141e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=ay29a033018046051; MF=cooper.joshua@linux.alibaba.com; NM=1; PH=DS; RN=11; SR=0; TI=SMTPD_---0VyuPMyS_1703074886; Received: from localhost.localdomain(mailfrom:cooper.joshua@linux.alibaba.com fp:SMTPD_---0VyuPMyS_1703074886) by smtp.aliyun-inc.com; Wed, 20 Dec 2023 20:21:31 +0800 From: "Jun Sha (Joshua)" To: gcc-patches@gcc.gnu.org Cc: jim.wilson.gcc@gmail.com, palmer@dabbelt.com, andrew@sifive.com, philipp.tomsich@vrull.eu, jeffreyalaw@gmail.com, christoph.muellner@vrull.eu, juzhe.zhong@rivai.ai, "Jun Sha (Joshua)" , Jin Ma , Xianmiao Qu Subject: [PATCH v3 0/6] RISC-V: Support XTheadVector extension Date: Wed, 20 Dec 2023 20:20:55 +0800 Message-Id: <20231220122055.343-1-cooper.joshua@linux.alibaba.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: <20231118042258.3545-1-cooper.joshua@linux.alibaba.com> References: <20231118042258.3545-1-cooper.joshua@linux.alibaba.com> MIME-Version: 1.0 X-Spam-Status: No, score=-14.4 required=5.0 tests=BAYES_00, ENV_AND_HDR_SPF_MATCH, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, UNPARSEABLE_RELAY, USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785803488546091385 X-GMAIL-MSGID: 1785803488546091385 This patch series presents gcc implementation of the XTheadVector extension [1]. [1] https://github.com/T-head-Semi/thead-extension-spec/ For some vector patterns that cannot be avoided, we use "!TARGET_XTHEADVECTOR" to disable them in order not to generate instructions that xtheadvector does not support, causing 36 changes in vector.md. For the th. prefix issue, we use current_output_insn and the ASM_OUTPUT_OPCODE hook instead of directly modifying patterns in vector.md. We have run the GCC test suite and can confirm that there are no regressions. All the test results can be found in the following links, Run without xtheadvector: https://gcc.gnu.org/pipermail/gcc-testresults/2023-December/803686.html Run with xtheadvector: https://gcc.gnu.org/pipermail/gcc-testresults/2023-December/803687.html Furthermore, we have run the tests in https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/main/examples, and all the tests passed. Co-authored-by: Jin Ma Co-authored-by: Xianmiao Qu Co-authored-by: Christoph Müllner RISC-V: Refactor riscv-vector-builtins-bases.cc RISC-V: Split csr_operand in predicates.md for vector patterns RISC-V: Introduce XTheadVector as a subset of V1.0.0 RISC-V: Adds the prefix "th." for the instructions of XTheadVector RISC-V: Handle differences between XTheadvector and Vector RISC-V: Add support for xtheadvector-specific intrinsics --- gcc/common/config/riscv/riscv-common.cc | 23 + gcc/config.gcc | 4 +- gcc/config/riscv/autovec.md | 2 +- gcc/config/riscv/predicates.md | 8 +- gcc/config/riscv/riscv-c.cc | 8 +- gcc/config/riscv/riscv-protos.h | 1 + gcc/config/riscv/riscv-string.cc | 3 + gcc/config/riscv/riscv-v.cc | 13 +- .../riscv/riscv-vector-builtins-bases.cc | 18 +- .../riscv/riscv-vector-builtins-bases.h | 19 + .../riscv/riscv-vector-builtins-shapes.cc | 149 + .../riscv/riscv-vector-builtins-shapes.h | 3 + .../riscv/riscv-vector-builtins-types.def | 120 + gcc/config/riscv/riscv-vector-builtins.cc | 315 +- gcc/config/riscv/riscv-vector-builtins.h | 5 +- gcc/config/riscv/riscv-vector-switch.def | 150 +- gcc/config/riscv/riscv.cc | 46 +- gcc/config/riscv/riscv.h | 4 + gcc/config/riscv/riscv.opt | 2 + gcc/config/riscv/riscv_th_vector.h | 49 + gcc/config/riscv/t-riscv | 16 + .../riscv/thead-vector-builtins-functions.def | 659 ++++ gcc/config/riscv/thead-vector-builtins.cc | 887 ++++++ gcc/config/riscv/thead-vector-builtins.h | 123 + gcc/config/riscv/thead-vector.md | 2827 +++++++++++++++++ gcc/config/riscv/vector-iterators.md | 186 +- gcc/config/riscv/vector.md | 44 +- .../riscv/predef-__riscv_th_v_intrinsic.c | 11 + .../gcc.target/riscv/rvv/base/abi-1.c | 2 +- .../gcc.target/riscv/rvv/base/pragma-1.c | 2 +- .../gcc.target/riscv/rvv/xtheadvector.c | 13 + .../riscv/rvv/xtheadvector/prefix.c | 12 + .../riscv/rvv/xtheadvector/vlb-vsb.c | 68 + .../riscv/rvv/xtheadvector/vlbu-vsb.c | 68 + .../riscv/rvv/xtheadvector/vlh-vsh.c | 68 + .../riscv/rvv/xtheadvector/vlhu-vsh.c | 68 + .../riscv/rvv/xtheadvector/vlw-vsw.c | 68 + .../riscv/rvv/xtheadvector/vlwu-vsw.c | 68 + gcc/testsuite/lib/target-supports.exp | 12 + 39 files changed, 5931 insertions(+), 213 deletions(-) create mode 100644 gcc/config/riscv/riscv_th_vector.h create mode 100644 gcc/config/riscv/thead-vector-builtins-functions.def create mode 100644 gcc/config/riscv/thead-vector-builtins.cc create mode 100644 gcc/config/riscv/thead-vector-builtins.h create mode 100644 gcc/config/riscv/thead-vector.md create mode 100644 gcc/testsuite/gcc.target/riscv/predef-__riscv_th_v_intrinsic.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/prefix.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlb-vsb.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlbu-vsb.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlh-vsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlhu-vsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlw-vsw.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/vlwu-vsw.c