[v2,0/5] Add support for approximate instructions and optimize divf/sqrtf/rsqrt operations.
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From: Jiahao Xu <xujiahao@loongson.cn>
To: gcc-patches@gcc.gnu.org
Cc: xry111@xry111.site, i@xen0n.name, chenglulu@loongson.cn,
xuchenghua@loongson.cn, Jiahao Xu <xujiahao@loongson.cn>
Subject: [PATCH v2 0/5] Add support for approximate instructions and optimize
divf/sqrtf/rsqrt operations.
Date: Tue, 5 Dec 2023 15:01:42 +0800
Message-Id: <20231205070147.53352-1-xujiahao@loongson.cn>
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|
| Series |
Add support for approximate instructions and optimize divf/sqrtf/rsqrt operations.
|
|
Message
Jiahao Xu
Dec. 5, 2023, 7:01 a.m. UTC
LoongArch V1.1 adds support for approximate instructions, which are utilized along with additional
Newton-Raphson steps implement single precision floating-point division, square root and reciprocal
square root operations for better throughput.
The patches are modifications made based on the patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-December/639243.html.
Jiahao Xu (5):
LoongArch: Add support for LoongArch V1.1 approximate instructions.
LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt
instructions.
LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.
LoongArch: New options -mrecip and -mrecip= with ffast-math.
LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf
when -mrecip is enabled.
gcc/config/loongarch/genopts/isa-evolution.in | 1 +
gcc/config/loongarch/genopts/loongarch.opt.in | 11 +
gcc/config/loongarch/larchintrin.h | 38 +++
gcc/config/loongarch/lasx.md | 89 ++++++-
gcc/config/loongarch/lasxintrin.h | 34 +++
gcc/config/loongarch/loongarch-builtins.cc | 66 +++++
gcc/config/loongarch/loongarch-cpucfg-map.h | 1 +
gcc/config/loongarch/loongarch-protos.h | 2 +
gcc/config/loongarch/loongarch-str.h | 1 +
gcc/config/loongarch/loongarch.cc | 252 +++++++++++++++++-
gcc/config/loongarch/loongarch.h | 18 ++
gcc/config/loongarch/loongarch.md | 104 ++++++--
gcc/config/loongarch/loongarch.opt | 15 ++
gcc/config/loongarch/lsx.md | 89 ++++++-
gcc/config/loongarch/lsxintrin.h | 34 +++
gcc/config/loongarch/predicates.md | 8 +
gcc/doc/extend.texi | 18 ++
gcc/doc/invoke.texi | 54 ++++
gcc/testsuite/gcc.target/loongarch/divf.c | 10 +
.../loongarch/larch-frecipe-builtin.c | 28 ++
.../gcc.target/loongarch/recip-divf.c | 9 +
.../gcc.target/loongarch/recip-sqrtf.c | 23 ++
gcc/testsuite/gcc.target/loongarch/sqrtf.c | 24 ++
.../loongarch/vector/lasx/lasx-divf.c | 13 +
.../vector/lasx/lasx-frecipe-builtin.c | 30 +++
.../loongarch/vector/lasx/lasx-recip-divf.c | 12 +
.../loongarch/vector/lasx/lasx-recip-sqrtf.c | 28 ++
.../loongarch/vector/lasx/lasx-recip.c | 24 ++
.../loongarch/vector/lasx/lasx-rsqrt.c | 26 ++
.../loongarch/vector/lasx/lasx-sqrtf.c | 29 ++
.../loongarch/vector/lsx/lsx-divf.c | 13 +
.../vector/lsx/lsx-frecipe-builtin.c | 30 +++
.../loongarch/vector/lsx/lsx-recip-divf.c | 12 +
.../loongarch/vector/lsx/lsx-recip-sqrtf.c | 28 ++
.../loongarch/vector/lsx/lsx-recip.c | 24 ++
.../loongarch/vector/lsx/lsx-rsqrt.c | 26 ++
.../loongarch/vector/lsx/lsx-sqrtf.c | 29 ++
37 files changed, 1212 insertions(+), 41 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/divf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/larch-frecipe-builtin.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/recip-divf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/recip-sqrtf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/sqrtf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-divf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-frecipe-builtin.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-recip-divf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-recip-sqrtf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-recip.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-rsqrt.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-sqrtf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-divf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-frecipe-builtin.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-recip-divf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-recip-sqrtf.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-recip.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-rsqrt.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-sqrtf.c