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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id y12-20020a05622a120c00b004197f495da8si966537qtx.774.2023.10.17.04.35.38 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 04:35:38 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; arc=pass (i=1); spf=pass (google.com: domain of gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org" Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9D126385841A for ; Tue, 17 Oct 2023 11:35:37 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by sourceware.org (Postfix) with ESMTPS id AC35B3858C2A for ; Tue, 17 Oct 2023 11:35:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org AC35B3858C2A Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=rivai.ai Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=rivai.ai ARC-Filter: OpenARC Filter v1.0.0 sourceware.org AC35B3858C2A Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=54.206.16.166 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697542513; cv=none; b=ofyY9PjtiqNbtbIOyRLiKmhdYMRMqPCDNKsT2536JLC+IW59P4W9pLsoLQ0PBJoS69prs/7R4WRQDE61VNYSmwfhs+qhXSD9gdMOh1w2AwEaLMWSO+cSe1oF5TOatxG3uMAG6NrzkdMh75mS1xsZk0NwdLticyr6SaUZHr1Fkzg= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697542513; c=relaxed/simple; bh=EnztZ3IlMi2T1oe1bE8TMEQGi0MwoVbaEKuEgcPTuyg=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=oqaVAh+FACku+89U+ZksB3FUjbVJIrNvEatxoG/yUlYM929+LWV9eSeIyMSVJ71SvCLYT6UTkJTmMPyfZ3zzVr//sofjgsZNn+fQvXH2PyybyPJULbGsDDrOQMSzEpvLerBZyJn9vCpcAgLH0GUvqCl0/3bUkEcMsMtCPBS9Pk8= ARC-Authentication-Results: i=1; server2.sourceware.org X-QQ-mid: bizesmtp62t1697542503tdyg1n9i Received: from rios-cad121.hadoop.rioslab.org ( [58.60.1.9]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 17 Oct 2023 19:35:01 +0800 (CST) X-QQ-SSF: 01400000000000C0F000000A0000000 X-QQ-FEAT: Bt6VvACH2lxVdqlkXfcTfihKpG6XFSzaikANGByEcE/+4w2Ji/JxEmMzY5AIl bu1YKywo12ZVFZKiHl4GJQn4wP7MmR4akYqqp0js2QfEA2EA2MKOP/TmMYIBdmrOwEhWkOd RwwL5mQUawnGOHy7nxgCB9OkLCqk2W/B7p80TassZ34a21Y4kQ5IcGNgez08uf/8ZqiOzMP 7KVhseyhxubRlnev4PDYn5GCC9B8Pq34ncNFVuEeCZECuHZvdqf28hpBr19du+JoT1UZ4PS OmAWrvKyL+JysbHyynRRGK5iIZfOiQx3vbw0mhuWuq9UzJdmPMX5dGATvRRsKUdCXf/PRES GQJGCevkyHrI1c06H7806UbvHNVZe2Y4SYEufqsykLdd2QWN4MzAbAsPQSySg== X-QQ-GoodBg: 2 X-BIZMAIL-ID: 17918958192501749964 From: Lehua Ding To: gcc-patches@gcc.gnu.org Cc: juzhe.zhong@rivai.ai, kito.cheng@gmail.com, rdapp.gcc@gmail.com, palmer@rivosinc.com, jeffreyalaw@gmail.com, lehua.ding@rivai.ai Subject: [PATCH V2 00/14] Refactor and cleanup vsetvl pass Date: Tue, 17 Oct 2023 19:34:46 +0800 Message-Id: <20231017113500.1160997-1-lehua.ding@rivai.ai> X-Mailer: git-send-email 2.36.3 MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:rivai.ai:qybglogicsvrgz:qybglogicsvrgz6a-0 X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+ouuuleilei=gmail.com@gcc.gnu.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780002364335869479 X-GMAIL-MSGID: 1780002364335869479 This patch refactors and cleanups the vsetvl pass in order to make the code easier to modify and understand. This patch does several things: 1. Introducing a virtual CFG for vsetvl infos and Phase 1, 2 and 3 only maintain and modify this virtual CFG. Phase 4 performs insertion, modification and deletion of vsetvl insns based on the virtual CFG. The Basic block in the virtual CFG is called vsetvl_block_info and the vsetvl information inside is called vsetvl_info. 2. Combine Phase 1 and 2 into a single Phase 1 and unified the demand system, this Phase only fuse local vsetvl info in forward direction. 3. Refactor Phase 3, change the logic for determining whether to uplift vsetvl info to a pred basic block to a more unified method that there is a vsetvl info in the vsetvl defintion reaching in compatible with it. 4. Place all modification operations to the RTL in Phase 4 and Phase 5. Phase 4 is responsible for inserting, modifying and deleting vsetvl instructions based on fully optimized vsetvl infos. Phase 5 removes the avl operand from the RVV instruction and removes the unused dest operand register from the vsetvl insns. These modifications resulted in some testcases needing to be updated. The reasons for updating are summarized below: 1. more optimized vlmax_back_prop-25.c/vlmax_back_prop-26.c/vlmax_conflict-3.c/ vlmax_conflict-12.c/vsetvl-13.c/vsetvl-23.c/ avl_single-23.c/avl_single-89.c/avl_single-95.c/pr109773-1.c 2. less unnecessary fusion avl_single-46.c/imm_bb_prop-1.c/pr109743-2.c/vsetvl-18.c 3. local fuse direction (backward -> forward) scalar_move-1.c/ 4. add some bugfix testcases. pr111037-3.c/pr111037-4.c avl_single-89.c PR target/111037 PR target/111234 PR target/111725 Lehua Ding (14): RISC-V: P1: Refactor avl_info/vl_vtype_info/vector_insn_info RISC-V: P2: Refactor and cleanup demand system RISC-V: P3: Refactor class vector_infos_manager to pre_vsetvl RISC-V: P4: move method from class pass_vsetvl to pre_vsetvl RISC-V: P5: combine phase 1 and 2 into a single pahse RISC-V: P6: Add compute reaching definition data flow RISC-V: P7: Move earliest fuse and lcm code to pre_vsetvl class RISC-V: P8: Unified insert and delete of vsetvl insn into Phase 4 RISC-V: P9: Cleanup post optimize phase RISC-V: P10: Cleanup helper functions RISC-V: P11: Refactor vector_block_info to vsetvl_block_info class RISC-V: P12: Delete riscv-vsetvl.h RISC-V: P13: Reorganize functions used to modify RTL RISC-V: P14: Adjust and add testcases gcc/config/riscv/riscv-vsetvl.cc | 6530 +++++++---------- gcc/config/riscv/riscv-vsetvl.def | 634 +- gcc/config/riscv/riscv-vsetvl.h | 488 -- gcc/config/riscv/t-riscv | 2 +- .../gcc.target/riscv/rvv/base/pr111037-2.c | 8 - .../gcc.target/riscv/rvv/base/scalar_move-1.c | 2 +- .../riscv/rvv/vsetvl/avl_single-104.c | 35 + .../riscv/rvv/vsetvl/avl_single-105.c | 23 + .../riscv/rvv/vsetvl/avl_single-23.c | 7 +- .../riscv/rvv/vsetvl/avl_single-46.c | 3 +- .../riscv/rvv/vsetvl/avl_single-89.c | 8 +- .../riscv/rvv/vsetvl/avl_single-95.c | 2 +- .../riscv/rvv/vsetvl/imm_bb_prop-1.c | 7 +- .../gcc.target/riscv/rvv/vsetvl/pr109743-2.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/pr109773-1.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/pr111037-3.c | 16 + .../pr111037-1.c => vsetvl/pr111037-4.c} | 5 +- .../riscv/rvv/vsetvl/vlmax_back_prop-25.c | 10 +- .../riscv/rvv/vsetvl/vlmax_back_prop-26.c | 10 +- .../riscv/rvv/vsetvl/vlmax_conflict-12.c | 1 - .../riscv/rvv/vsetvl/vlmax_conflict-3.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-13.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-18.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/vsetvl-23.c | 2 +- 24 files changed, 3084 insertions(+), 4723 deletions(-) delete mode 100644 gcc/config/riscv/riscv-vsetvl.h delete mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/pr111037-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c rename gcc/testsuite/gcc.target/riscv/rvv/{base/pr111037-1.c => vsetvl/pr111037-4.c} (74%) --- 2.36.3