[0/2] Support HWASAN with Intel LAM

Message ID 20221111012631.76776-1-hongtao.liu@intel.com
Headers
Series Support HWASAN with Intel LAM |

Message

liuhongt Nov. 11, 2022, 1:26 a.m. UTC
  2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
target hooks(Many thanks to their work) so other backends can do similar
things if they have similar feature.
  Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
the upper bits of pointers can be used as metadata, LAM support two modes:
  LAM_U48:bits 48-62 can be used as metadata
  LAM_U57:bits 57-62 can be used as metedata.

These 2 patches mainly support those target hooks, but HWASAN is not really
enabled until the final decision for the LAM kernel interface which may take
quite a long time. We have verified our patches with a "fake" interface locally[4], and
decided to push the backend patches to the GCC13 to make other HWASAN developper's work
easy.

[1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
[2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
[3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
[4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master


Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ok for trunk?

liuhongt (2):
  Implement hwasan target_hook.
  Enable hwasan for x86-64.

 gcc/config/i386/i386-expand.cc  |  12 ++++
 gcc/config/i386/i386-options.cc |   3 +
 gcc/config/i386/i386-opts.h     |   6 ++
 gcc/config/i386/i386-protos.h   |   2 +
 gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
 gcc/config/i386/i386.opt        |  16 +++++
 libsanitizer/configure.tgt      |   1 +
 7 files changed, 163 insertions(+)
  

Comments

Hongtao Liu Nov. 28, 2022, 3:35 a.m. UTC | #1
On Fri, Nov 11, 2022 at 9:26 AM liuhongt <hongtao.liu@intel.com> wrote:
>
>   2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> target hooks(Many thanks to their work) so other backends can do similar
> things if they have similar feature.
>   Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> the upper bits of pointers can be used as metadata, LAM support two modes:
>   LAM_U48:bits 48-62 can be used as metadata
>   LAM_U57:bits 57-62 can be used as metedata.
>
> These 2 patches mainly support those target hooks, but HWASAN is not really
> enabled until the final decision for the LAM kernel interface which may take
> quite a long time. We have verified our patches with a "fake" interface locally[4], and
> decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> easy.
>
> [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
>
>
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
I'll install 2 patches if there's no objections in next 7 days.
>
> liuhongt (2):
>   Implement hwasan target_hook.
>   Enable hwasan for x86-64.
>
>  gcc/config/i386/i386-expand.cc  |  12 ++++
>  gcc/config/i386/i386-options.cc |   3 +
>  gcc/config/i386/i386-opts.h     |   6 ++
>  gcc/config/i386/i386-protos.h   |   2 +
>  gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
>  gcc/config/i386/i386.opt        |  16 +++++
>  libsanitizer/configure.tgt      |   1 +
>  7 files changed, 163 insertions(+)
>
> --
> 2.18.1
>
  
Uros Bizjak Nov. 28, 2022, 7:12 a.m. UTC | #2
On Mon, Nov 28, 2022 at 4:35 AM Hongtao Liu <crazylht@gmail.com> wrote:
>
> On Fri, Nov 11, 2022 at 9:26 AM liuhongt <hongtao.liu@intel.com> wrote:
> >
> >   2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> > target hooks(Many thanks to their work) so other backends can do similar
> > things if they have similar feature.
> >   Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> > the upper bits of pointers can be used as metadata, LAM support two modes:
> >   LAM_U48:bits 48-62 can be used as metadata
> >   LAM_U57:bits 57-62 can be used as metedata.
> >
> > These 2 patches mainly support those target hooks, but HWASAN is not really
> > enabled until the final decision for the LAM kernel interface which may take
> > quite a long time. We have verified our patches with a "fake" interface locally[4], and
> > decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> > easy.
> >
> > [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> > [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> > [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> > [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
> >
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> I'll install 2 patches if there's no objections in next 7 days.

FYI, I have no objection.

Uros.
  
Martin Liška Nov. 28, 2022, 2:40 p.m. UTC | #3
On 11/11/22 02:26, liuhongt via Gcc-patches wrote:
>    2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> target hooks(Many thanks to their work) so other backends can do similar
> things if they have similar feature.
>    Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> the upper bits of pointers can be used as metadata, LAM support two modes:
>    LAM_U48:bits 48-62 can be used as metadata
>    LAM_U57:bits 57-62 can be used as metedata.
> 
> These 2 patches mainly support those target hooks, but HWASAN is not really
> enabled until the final decision for the LAM kernel interface which may take
> quite a long time. We have verified our patches with a "fake" interface locally[4], and
> decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> easy.

Hello.

A few random comments I noticed:

1) please document the new target -mlam in extend.texi
2) the description speaks about bits [48-62] or [57-62], can explain why the patch contains:

+  /* Mask off bit63 when LAM_U57.  */
+  if (ix86_lam_type == lam_u57)
?

3) Shouldn't the -lman option emit GNU_PROPERTY_X86_FEATURE_1_LAM_U57 or GNU_PROPERTY_X86_FEATURE_1_LAM_U48
.gnu.property note?

4) Can you please explain Florian's comment here:
https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13#note_1181396487

Thanks,
Martin

> 
> [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
> 
> 
> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> Ok for trunk?
> 
> liuhongt (2):
>    Implement hwasan target_hook.
>    Enable hwasan for x86-64.
> 
>   gcc/config/i386/i386-expand.cc  |  12 ++++
>   gcc/config/i386/i386-options.cc |   3 +
>   gcc/config/i386/i386-opts.h     |   6 ++
>   gcc/config/i386/i386-protos.h   |   2 +
>   gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
>   gcc/config/i386/i386.opt        |  16 +++++
>   libsanitizer/configure.tgt      |   1 +
>   7 files changed, 163 insertions(+)
>
  
H.J. Lu Nov. 29, 2022, 2:10 a.m. UTC | #4
On Mon, Nov 28, 2022 at 6:40 AM Martin Liška <mliska@suse.cz> wrote:
>
> On 11/11/22 02:26, liuhongt via Gcc-patches wrote:
> >    2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> > target hooks(Many thanks to their work) so other backends can do similar
> > things if they have similar feature.
> >    Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> > the upper bits of pointers can be used as metadata, LAM support two modes:
> >    LAM_U48:bits 48-62 can be used as metadata
> >    LAM_U57:bits 57-62 can be used as metedata.
> >
> > These 2 patches mainly support those target hooks, but HWASAN is not really
> > enabled until the final decision for the LAM kernel interface which may take
> > quite a long time. We have verified our patches with a "fake" interface locally[4], and
> > decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> > easy.
>
> Hello.
>
> A few random comments I noticed:
>
> 1) please document the new target -mlam in extend.texi
> 2) the description speaks about bits [48-62] or [57-62], can explain why the patch contains:
>
> +  /* Mask off bit63 when LAM_U57.  */
> +  if (ix86_lam_type == lam_u57)
> ?
>
> 3) Shouldn't the -lman option emit GNU_PROPERTY_X86_FEATURE_1_LAM_U57 or GNU_PROPERTY_X86_FEATURE_1_LAM_U48
> .gnu.property note?

Since there are no clear usages for these LAM bits, we can
leave them out for now.

> 4) Can you please explain Florian's comment here:
> https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13#note_1181396487
>
> Thanks,
> Martin
>
> >
> > [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> > [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> > [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> > [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
> >
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > liuhongt (2):
> >    Implement hwasan target_hook.
> >    Enable hwasan for x86-64.
> >
> >   gcc/config/i386/i386-expand.cc  |  12 ++++
> >   gcc/config/i386/i386-options.cc |   3 +
> >   gcc/config/i386/i386-opts.h     |   6 ++
> >   gcc/config/i386/i386-protos.h   |   2 +
> >   gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
> >   gcc/config/i386/i386.opt        |  16 +++++
> >   libsanitizer/configure.tgt      |   1 +
> >   7 files changed, 163 insertions(+)
> >
>
  
Hongtao Liu Nov. 29, 2022, 2:37 a.m. UTC | #5
On Mon, Nov 28, 2022 at 10:40 PM Martin Liška <mliska@suse.cz> wrote:
>
> On 11/11/22 02:26, liuhongt via Gcc-patches wrote:
> >    2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> > target hooks(Many thanks to their work) so other backends can do similar
> > things if they have similar feature.
> >    Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> > the upper bits of pointers can be used as metadata, LAM support two modes:
> >    LAM_U48:bits 48-62 can be used as metadata
> >    LAM_U57:bits 57-62 can be used as metedata.
> >
> > These 2 patches mainly support those target hooks, but HWASAN is not really
> > enabled until the final decision for the LAM kernel interface which may take
> > quite a long time. We have verified our patches with a "fake" interface locally[4], and
> > decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> > easy.
>
> Hello.
>
> A few random comments I noticed:
>
> 1) please document the new target -mlam in extend.texi
I will.
> 2) the description speaks about bits [48-62] or [57-62], can explain why the patch contains:
>
Kernel will use bit 63 for special purposes, and here we want to
extract the tag by shifting right the pointer 57 bits, and need to
manually mask off bit63.
> +  /* Mask off bit63 when LAM_U57.  */
> +  if (ix86_lam_type == lam_u57)
> ?
>
> 3) Shouldn't the -lman option emit GNU_PROPERTY_X86_FEATURE_1_LAM_U57 or GNU_PROPERTY_X86_FEATURE_1_LAM_U48
> .gnu.property note?
>
> 4) Can you please explain Florian's comment here:
> https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13#note_1181396487
>
> Thanks,
> Martin
>
> >
> > [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> > [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> > [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> > [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
> >
> >
> > Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> > Ok for trunk?
> >
> > liuhongt (2):
> >    Implement hwasan target_hook.
> >    Enable hwasan for x86-64.
> >
> >   gcc/config/i386/i386-expand.cc  |  12 ++++
> >   gcc/config/i386/i386-options.cc |   3 +
> >   gcc/config/i386/i386-opts.h     |   6 ++
> >   gcc/config/i386/i386-protos.h   |   2 +
> >   gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
> >   gcc/config/i386/i386.opt        |  16 +++++
> >   libsanitizer/configure.tgt      |   1 +
> >   7 files changed, 163 insertions(+)
> >
>
  
Martin Liška Nov. 30, 2022, 2:07 p.m. UTC | #6
On 11/29/22 03:37, Hongtao Liu wrote:
> On Mon, Nov 28, 2022 at 10:40 PM Martin Liška <mliska@suse.cz> wrote:
>>
>> On 11/11/22 02:26, liuhongt via Gcc-patches wrote:
>>>    2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
>>> target hooks(Many thanks to their work) so other backends can do similar
>>> things if they have similar feature.
>>>    Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
>>> the upper bits of pointers can be used as metadata, LAM support two modes:
>>>    LAM_U48:bits 48-62 can be used as metadata
>>>    LAM_U57:bits 57-62 can be used as metedata.
>>>
>>> These 2 patches mainly support those target hooks, but HWASAN is not really
>>> enabled until the final decision for the LAM kernel interface which may take
>>> quite a long time. We have verified our patches with a "fake" interface locally[4], and
>>> decided to push the backend patches to the GCC13 to make other HWASAN developper's work
>>> easy.
>>
>> Hello.
>>
>> A few random comments I noticed:
>>
>> 1) please document the new target -mlam in extend.texi
> I will.

Thanks.

>> 2) the description speaks about bits [48-62] or [57-62], can explain why the patch contains:
>>
> Kernel will use bit 63 for special purposes, and here we want to
> extract the tag by shifting right the pointer 57 bits, and need to
> manually mask off bit63.

And thanks for the explanation.

Martin

>> +  /* Mask off bit63 when LAM_U57.  */
>> +  if (ix86_lam_type == lam_u57)
>> ?
>>
>> 3) Shouldn't the -lman option emit GNU_PROPERTY_X86_FEATURE_1_LAM_U57 or GNU_PROPERTY_X86_FEATURE_1_LAM_U48
>> .gnu.property note?
>>
>> 4) Can you please explain Florian's comment here:
>> https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13#note_1181396487
>>
>> Thanks,
>> Martin
>>
>>>
>>> [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
>>> [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
>>> [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
>>> [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
>>>
>>>
>>> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
>>> Ok for trunk?
>>>
>>> liuhongt (2):
>>>    Implement hwasan target_hook.
>>>    Enable hwasan for x86-64.
>>>
>>>   gcc/config/i386/i386-expand.cc  |  12 ++++
>>>   gcc/config/i386/i386-options.cc |   3 +
>>>   gcc/config/i386/i386-opts.h     |   6 ++
>>>   gcc/config/i386/i386-protos.h   |   2 +
>>>   gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
>>>   gcc/config/i386/i386.opt        |  16 +++++
>>>   libsanitizer/configure.tgt      |   1 +
>>>   7 files changed, 163 insertions(+)
>>>
>>
> 
>
  
Hongtao Liu Dec. 9, 2022, 2:04 a.m. UTC | #7
On Wed, Nov 30, 2022 at 10:07 PM Martin Liška <mliska@suse.cz> wrote:
>
> On 11/29/22 03:37, Hongtao Liu wrote:
> > On Mon, Nov 28, 2022 at 10:40 PM Martin Liška <mliska@suse.cz> wrote:
> >>
> >> On 11/11/22 02:26, liuhongt via Gcc-patches wrote:
> >>>    2 years ago, ARM folks support HWASAN[1] in GCC[2], and introduced several
> >>> target hooks(Many thanks to their work) so other backends can do similar
> >>> things if they have similar feature.
> >>>    Intel LAM(linear Address Masking)[3 Charpter 14] supports similar feature with
> >>> the upper bits of pointers can be used as metadata, LAM support two modes:
> >>>    LAM_U48:bits 48-62 can be used as metadata
> >>>    LAM_U57:bits 57-62 can be used as metedata.
> >>>
> >>> These 2 patches mainly support those target hooks, but HWASAN is not really
> >>> enabled until the final decision for the LAM kernel interface which may take
> >>> quite a long time. We have verified our patches with a "fake" interface locally[4], and
> >>> decided to push the backend patches to the GCC13 to make other HWASAN developper's work
> >>> easy.
I've committed 2 patches.
> >>
> >> Hello.
> >>
> >> A few random comments I noticed:
> >>
> >> 1) please document the new target -mlam in extend.texi
> > I will.
>
> Thanks.
>
> >> 2) the description speaks about bits [48-62] or [57-62], can explain why the patch contains:
> >>
> > Kernel will use bit 63 for special purposes, and here we want to
> > extract the tag by shifting right the pointer 57 bits, and need to
> > manually mask off bit63.
>
> And thanks for the explanation.
>
> Martin
>
> >> +  /* Mask off bit63 when LAM_U57.  */
> >> +  if (ix86_lam_type == lam_u57)
> >> ?
> >>
> >> 3) Shouldn't the -lman option emit GNU_PROPERTY_X86_FEATURE_1_LAM_U57 or GNU_PROPERTY_X86_FEATURE_1_LAM_U48
> >> .gnu.property note?
> >>
> >> 4) Can you please explain Florian's comment here:
> >> https://gitlab.com/x86-psABIs/x86-64-ABI/-/merge_requests/13#note_1181396487
> >>
> >> Thanks,
> >> Martin
> >>
> >>>
> >>> [1] https://clang.llvm.org/docs/HardwareAssistedAddressSanitizerDesign.html
> >>> [2] https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557857.html
> >>> [3] https://www.intel.com/content/dam/develop/external/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf
> >>> [4] https://gitlab.com/x86-gcc/gcc/-/tree/users/intel/lam/master
> >>>
> >>>
> >>> Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
> >>> Ok for trunk?
> >>>
> >>> liuhongt (2):
> >>>    Implement hwasan target_hook.
> >>>    Enable hwasan for x86-64.
> >>>
> >>>   gcc/config/i386/i386-expand.cc  |  12 ++++
> >>>   gcc/config/i386/i386-options.cc |   3 +
> >>>   gcc/config/i386/i386-opts.h     |   6 ++
> >>>   gcc/config/i386/i386-protos.h   |   2 +
> >>>   gcc/config/i386/i386.cc         | 123 ++++++++++++++++++++++++++++++++
> >>>   gcc/config/i386/i386.opt        |  16 +++++
> >>>   libsanitizer/configure.tgt      |   1 +
> >>>   7 files changed, 163 insertions(+)
> >>>
> >>
> >
> >
>