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Do Nascimento via Binutils" From: Victor Do Nascimento Reply-To: "Victor L. Do Nascimento" Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1776472092424846126 X-GMAIL-MSGID: 1776472092424846126 This patch adds an abstraction level to the way that feature flags are combined in the `features' field of a SYSREG entry. Until now, feature flags have been ORed together, e.g. AARCH64_FEATURE_V8_4A | AARCH64_FEATURE_V8A As the number of distinct architectural features supported by the toolchain rapidly approaches the limit supported by a bitmask of type `unsigned long long', the representation of these flags is bound to be updated. Therefore, looking ahead we add a layer of indirection in terms of how these flags are combined. That way, when the flag representation changes, only the macro will need updating and any instance of its use will remain unaffected. The new scheme uses the macro `ARCH(N, FEAT_1, ..., FEAT_N)' to combine N feature flags. This abstraction means that any changes to feature flag representation will have no effect on how the SYSREG entries are presented. Finally, the `AARCH64_FEATURE_' prefix used in flag nomenclature is likewise abstracted away behind a new `FEAT()' macro. This indirection is added as other parts of the toolchain use different prefixes, and a prefix macro allows this to be redefined as needed making the ARCH macro portable. Under the new formalism, the above example now becomes: ARCH (2, FEAT (V8_4A), FEAT (V8A)) opcodes/ChangeLog: * aarch64-opc.c (FEAT): New macro. (ARCH_OR_1): Likewise. (ARCH_OR_2): Likewise. (ARCH_OR_3): Likewise. (ARCH): Likewise. * aarch64-system-regs.def: Use ARCH macro in `features' field of SYSREG entries --- opcodes/aarch64-opc.c | 6 + opcodes/aarch64-system-regs.def | 2052 +++++++++++++++---------------- 2 files changed, 1032 insertions(+), 1026 deletions(-) diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index e3f0ed13de0..52805fe1cd0 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -4681,6 +4681,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, respectively. If neither of these are set then the register is read-write. */ const aarch64_sys_reg aarch64_sys_regs [] = { +#define FEAT(feature) AARCH64_FEATURE_##feature +#define ARCH_OR_1(F1) (F1) +#define ARCH_OR_2(F1, F2) (F1 | F2) +#define ARCH_OR_3(F1, ...) \ + (F1 | ARCH_OR_FEATURES_2 (__VA_ARGS__)) +#define ARCH(N, ...) ARCH_OR_##N (__VA_ARGS__) #define SYSREG(name, encoding, flags, features) \ { name, encoding, flags, features }, #include "aarch64-system-regs.def" diff --git a/opcodes/aarch64-system-regs.def b/opcodes/aarch64-system-regs.def index bf8c488472a..02731607077 100644 --- a/opcodes/aarch64-system-regs.def +++ b/opcodes/aarch64-system-regs.def @@ -31,1029 +31,1029 @@ the ISA flags recognized by the compiler and specifies the architectural requirements of the system register. */ - SYSREG ("accdata_el1", CPENC (3,0,13,0,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("actlr_el1", CPENC (3,0,1,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("actlr_el2", CPENC (3,4,1,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("actlr_el3", CPENC (3,6,1,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("afsr0_el1", CPENC (3,0,5,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("afsr0_el12", CPENC (3,5,5,1,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("afsr0_el2", CPENC (3,4,5,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("afsr0_el3", CPENC (3,6,5,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("afsr1_el1", CPENC (3,0,5,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("afsr1_el12", CPENC (3,5,5,1,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("afsr1_el2", CPENC (3,4,5,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("afsr1_el3", CPENC (3,6,5,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("aidr_el1", CPENC (3,1,0,0,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("allint", CPENC (3,0,4,3,0), F_ARCHEXT, AARCH64_FEATURE_V8_8A) - SYSREG ("amair_el1", CPENC (3,0,10,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("amair_el12", CPENC (3,5,10,3,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("amair_el2", CPENC (3,4,10,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("amair_el3", CPENC (3,6,10,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("amcfgr_el0", CPENC (3,3,13,2,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amcg1idr_el0", CPENC (3,3,13,2,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amcgcr_el0", CPENC (3,3,13,2,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amcntenclr0_el0", CPENC (3,3,13,2,4), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amcntenclr1_el0", CPENC (3,3,13,3,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amcntenset0_el0", CPENC (3,3,13,2,5), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amcntenset1_el0", CPENC (3,3,13,3,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amcr_el0", CPENC (3,3,13,2,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr00_el0", CPENC (3,3,13,4,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr01_el0", CPENC (3,3,13,4,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr02_el0", CPENC (3,3,13,4,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr03_el0", CPENC (3,3,13,4,3), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr10_el0", CPENC (3,3,13,12,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr110_el0", CPENC (3,3,13,13,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr111_el0", CPENC (3,3,13,13,3), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr112_el0", CPENC (3,3,13,13,4), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr113_el0", CPENC (3,3,13,13,5), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr114_el0", CPENC (3,3,13,13,6), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr115_el0", CPENC (3,3,13,13,7), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr11_el0", CPENC (3,3,13,12,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr12_el0", CPENC (3,3,13,12,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr13_el0", CPENC (3,3,13,12,3), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr14_el0", CPENC (3,3,13,12,4), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr15_el0", CPENC (3,3,13,12,5), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr16_el0", CPENC (3,3,13,12,6), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr17_el0", CPENC (3,3,13,12,7), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr18_el0", CPENC (3,3,13,13,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntr19_el0", CPENC (3,3,13,13,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevcntvoff00_el2", CPENC (3,4,13,8,0), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff010_el2", CPENC (3,4,13,9,2), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff011_el2", CPENC (3,4,13,9,3), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff012_el2", CPENC (3,4,13,9,4), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff013_el2", CPENC (3,4,13,9,5), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff014_el2", CPENC (3,4,13,9,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff015_el2", CPENC (3,4,13,9,7), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff01_el2", CPENC (3,4,13,8,1), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff02_el2", CPENC (3,4,13,8,2), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff03_el2", CPENC (3,4,13,8,3), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff04_el2", CPENC (3,4,13,8,4), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff05_el2", CPENC (3,4,13,8,5), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff06_el2", CPENC (3,4,13,8,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff07_el2", CPENC (3,4,13,8,7), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff08_el2", CPENC (3,4,13,9,0), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff09_el2", CPENC (3,4,13,9,1), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff10_el2", CPENC (3,4,13,10,0), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff110_el2", CPENC (3,4,13,11,2), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff111_el2", CPENC (3,4,13,11,3), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff112_el2", CPENC (3,4,13,11,4), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff113_el2", CPENC (3,4,13,11,5), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff114_el2", CPENC (3,4,13,11,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff115_el2", CPENC (3,4,13,11,7), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff11_el2", CPENC (3,4,13,10,1), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff12_el2", CPENC (3,4,13,10,2), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff13_el2", CPENC (3,4,13,10,3), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff14_el2", CPENC (3,4,13,10,4), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff15_el2", CPENC (3,4,13,10,5), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff16_el2", CPENC (3,4,13,10,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff17_el2", CPENC (3,4,13,10,7), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff18_el2", CPENC (3,4,13,11,0), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevcntvoff19_el2", CPENC (3,4,13,11,1), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("amevtyper00_el0", CPENC (3,3,13,6,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper01_el0", CPENC (3,3,13,6,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper02_el0", CPENC (3,3,13,6,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper03_el0", CPENC (3,3,13,6,3), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper10_el0", CPENC (3,3,13,14,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper110_el0", CPENC (3,3,13,15,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper111_el0", CPENC (3,3,13,15,3), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper112_el0", CPENC (3,3,13,15,4), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper113_el0", CPENC (3,3,13,15,5), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper114_el0", CPENC (3,3,13,15,6), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper115_el0", CPENC (3,3,13,15,7), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper11_el0", CPENC (3,3,13,14,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper12_el0", CPENC (3,3,13,14,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper13_el0", CPENC (3,3,13,14,3), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper14_el0", CPENC (3,3,13,14,4), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper15_el0", CPENC (3,3,13,14,5), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper16_el0", CPENC (3,3,13,14,6), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper17_el0", CPENC (3,3,13,14,7), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper18_el0", CPENC (3,3,13,15,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amevtyper19_el0", CPENC (3,3,13,15,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("amuserenr_el0", CPENC (3,3,13,2,3), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("apdakeyhi_el1", CPENC (3,0,2,2,1), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apdakeylo_el1", CPENC (3,0,2,2,0), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apdbkeyhi_el1", CPENC (3,0,2,2,3), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apdbkeylo_el1", CPENC (3,0,2,2,2), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apgakeyhi_el1", CPENC (3,0,2,3,1), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apgakeylo_el1", CPENC (3,0,2,3,0), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apiakeyhi_el1", CPENC (3,0,2,1,1), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apiakeylo_el1", CPENC (3,0,2,1,0), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apibkeyhi_el1", CPENC (3,0,2,1,3), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("apibkeylo_el1", CPENC (3,0,2,1,2), F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("brbcr_el1", CPENC (2,1,9,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbcr_el12", CPENC (2,5,9,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbcr_el2", CPENC (2,4,9,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbfcr_el1", CPENC (2,1,9,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbidr0_el1", CPENC (2,1,9,2,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf0_el1", CPENC (2,1,8,0,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf10_el1", CPENC (2,1,8,10,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf11_el1", CPENC (2,1,8,11,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf12_el1", CPENC (2,1,8,12,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf13_el1", CPENC (2,1,8,13,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf14_el1", CPENC (2,1,8,14,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf15_el1", CPENC (2,1,8,15,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf16_el1", CPENC (2,1,8,0,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf17_el1", CPENC (2,1,8,1,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf18_el1", CPENC (2,1,8,2,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf19_el1", CPENC (2,1,8,3,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf1_el1", CPENC (2,1,8,1,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf20_el1", CPENC (2,1,8,4,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf21_el1", CPENC (2,1,8,5,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf22_el1", CPENC (2,1,8,6,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf23_el1", CPENC (2,1,8,7,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf24_el1", CPENC (2,1,8,8,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf25_el1", CPENC (2,1,8,9,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf26_el1", CPENC (2,1,8,10,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf27_el1", CPENC (2,1,8,11,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf28_el1", CPENC (2,1,8,12,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf29_el1", CPENC (2,1,8,13,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf2_el1", CPENC (2,1,8,2,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf30_el1", CPENC (2,1,8,14,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf31_el1", CPENC (2,1,8,15,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf3_el1", CPENC (2,1,8,3,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf4_el1", CPENC (2,1,8,4,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf5_el1", CPENC (2,1,8,5,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf6_el1", CPENC (2,1,8,6,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf7_el1", CPENC (2,1,8,7,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf8_el1", CPENC (2,1,8,8,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinf9_el1", CPENC (2,1,8,9,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbinfinj_el1", CPENC (2,1,9,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc0_el1", CPENC (2,1,8,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc10_el1", CPENC (2,1,8,10,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc11_el1", CPENC (2,1,8,11,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc12_el1", CPENC (2,1,8,12,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc13_el1", CPENC (2,1,8,13,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc14_el1", CPENC (2,1,8,14,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc15_el1", CPENC (2,1,8,15,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc16_el1", CPENC (2,1,8,0,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc17_el1", CPENC (2,1,8,1,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc18_el1", CPENC (2,1,8,2,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc19_el1", CPENC (2,1,8,3,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc1_el1", CPENC (2,1,8,1,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc20_el1", CPENC (2,1,8,4,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc21_el1", CPENC (2,1,8,5,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc22_el1", CPENC (2,1,8,6,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc23_el1", CPENC (2,1,8,7,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc24_el1", CPENC (2,1,8,8,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc25_el1", CPENC (2,1,8,9,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc26_el1", CPENC (2,1,8,10,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc27_el1", CPENC (2,1,8,11,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc28_el1", CPENC (2,1,8,12,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc29_el1", CPENC (2,1,8,13,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc2_el1", CPENC (2,1,8,2,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc30_el1", CPENC (2,1,8,14,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc31_el1", CPENC (2,1,8,15,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc3_el1", CPENC (2,1,8,3,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc4_el1", CPENC (2,1,8,4,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc5_el1", CPENC (2,1,8,5,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc6_el1", CPENC (2,1,8,6,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc7_el1", CPENC (2,1,8,7,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc8_el1", CPENC (2,1,8,8,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrc9_el1", CPENC (2,1,8,9,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbsrcinj_el1", CPENC (2,1,9,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt0_el1", CPENC (2,1,8,0,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt10_el1", CPENC (2,1,8,10,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt11_el1", CPENC (2,1,8,11,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt12_el1", CPENC (2,1,8,12,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt13_el1", CPENC (2,1,8,13,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt14_el1", CPENC (2,1,8,14,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt15_el1", CPENC (2,1,8,15,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt16_el1", CPENC (2,1,8,0,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt17_el1", CPENC (2,1,8,1,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt18_el1", CPENC (2,1,8,2,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt19_el1", CPENC (2,1,8,3,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt1_el1", CPENC (2,1,8,1,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt20_el1", CPENC (2,1,8,4,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt21_el1", CPENC (2,1,8,5,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt22_el1", CPENC (2,1,8,6,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt23_el1", CPENC (2,1,8,7,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt24_el1", CPENC (2,1,8,8,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt25_el1", CPENC (2,1,8,9,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt26_el1", CPENC (2,1,8,10,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt27_el1", CPENC (2,1,8,11,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt28_el1", CPENC (2,1,8,12,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt29_el1", CPENC (2,1,8,13,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt2_el1", CPENC (2,1,8,2,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt30_el1", CPENC (2,1,8,14,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt31_el1", CPENC (2,1,8,15,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt3_el1", CPENC (2,1,8,3,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt4_el1", CPENC (2,1,8,4,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt5_el1", CPENC (2,1,8,5,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt6_el1", CPENC (2,1,8,6,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt7_el1", CPENC (2,1,8,7,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt8_el1", CPENC (2,1,8,8,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgt9_el1", CPENC (2,1,8,9,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("brbtgtinj_el1", CPENC (2,1,9,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("brbts_el1", CPENC (2,1,9,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("ccsidr2_el1", CPENC (3,1,0,0,2), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_3A) - SYSREG ("ccsidr_el1", CPENC (3,1,0,0,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("clidr_el1", CPENC (3,1,0,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("cntfrq_el0", CPENC (3,3,14,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cnthctl_el2", CPENC (3,4,14,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cnthp_ctl_el2", CPENC (3,4,14,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("cnthp_cval_el2", CPENC (3,4,14,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("cnthp_tval_el2", CPENC (3,4,14,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cnthps_ctl_el2", CPENC (3,4,14,5,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("cnthps_cval_el2", CPENC (3,4,14,5,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("cnthps_tval_el2", CPENC (3,4,14,5,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("cnthv_ctl_el2", CPENC (3,4,14,3,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cnthv_cval_el2", CPENC (3,4,14,3,2), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cnthv_tval_el2", CPENC (3,4,14,3,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cnthvs_ctl_el2", CPENC (3,4,14,4,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("cnthvs_cval_el2", CPENC (3,4,14,4,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("cnthvs_tval_el2", CPENC (3,4,14,4,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("cntkctl_el1", CPENC (3,0,14,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntkctl_el12", CPENC (3,5,14,1,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntp_ctl_el0", CPENC (3,3,14,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntp_ctl_el02", CPENC (3,5,14,2,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntp_cval_el0", CPENC (3,3,14,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntp_cval_el02", CPENC (3,5,14,2,2), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntp_tval_el0", CPENC (3,3,14,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntp_tval_el02", CPENC (3,5,14,2,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntpct_el0", CPENC (3,3,14,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("cntpctss_el0", CPENC (3,3,14,0,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("cntpoff_el2", CPENC (3,4,14,0,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("cntps_ctl_el1", CPENC (3,7,14,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntps_cval_el1", CPENC (3,7,14,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntps_tval_el1", CPENC (3,7,14,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntv_ctl_el0", CPENC (3,3,14,3,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntv_ctl_el02", CPENC (3,5,14,3,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntv_cval_el0", CPENC (3,3,14,3,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntv_cval_el02", CPENC (3,5,14,3,2), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntv_tval_el0", CPENC (3,3,14,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("cntv_tval_el02", CPENC (3,5,14,3,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cntvct_el0", CPENC (3,3,14,0,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("cntvctss_el0", CPENC (3,3,14,0,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("cntvoff_el2", CPENC (3,4,14,0,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("contextidr_el1", CPENC (3,0,13,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("contextidr_el12", CPENC (3,5,13,0,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("contextidr_el2", CPENC (3,4,13,0,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cpacr_el1", CPENC (3,0,1,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("cpacr_el12", CPENC (3,5,1,0,2), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("cptr_el2", CPENC (3,4,1,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("cptr_el3", CPENC (3,6,1,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrcr_el0", CPENC (2,3,8,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrcr_el1", CPENC (2,0,8,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrcr_el12", CPENC (2,5,8,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrcr_el2", CPENC (2,4,8,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("csridr_el0", CPENC (2,3,8,0,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("csrptr_el0", CPENC (2,3,8,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrptr_el1", CPENC (2,0,8,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrptr_el12", CPENC (2,5,8,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrptr_el2", CPENC (2,4,8,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("csrptridx_el0", CPENC (2,3,8,0,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("csrptridx_el1", CPENC (2,0,8,0,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("csrptridx_el2", CPENC (2,4,8,0,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("csselr_el1", CPENC (3,2,0,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ctr_el0", CPENC (3,3,0,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("currentel", CPENC (3,0,4,2,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("dacr32_el2", CPENC (3,4,3,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("daif", CPENC (3,3,4,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgauthstatus_el1", CPENC (2,0,7,14,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr0_el1", CPENC (2,0,0,0,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr10_el1", CPENC (2,0,0,10,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr11_el1", CPENC (2,0,0,11,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr12_el1", CPENC (2,0,0,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr13_el1", CPENC (2,0,0,13,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr14_el1", CPENC (2,0,0,14,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr15_el1", CPENC (2,0,0,15,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr1_el1", CPENC (2,0,0,1,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr2_el1", CPENC (2,0,0,2,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr3_el1", CPENC (2,0,0,3,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr4_el1", CPENC (2,0,0,4,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr5_el1", CPENC (2,0,0,5,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr6_el1", CPENC (2,0,0,6,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr7_el1", CPENC (2,0,0,7,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr8_el1", CPENC (2,0,0,8,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbcr9_el1", CPENC (2,0,0,9,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr0_el1", CPENC (2,0,0,0,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr10_el1", CPENC (2,0,0,10,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr11_el1", CPENC (2,0,0,11,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr12_el1", CPENC (2,0,0,12,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr13_el1", CPENC (2,0,0,13,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr14_el1", CPENC (2,0,0,14,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr15_el1", CPENC (2,0,0,15,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr1_el1", CPENC (2,0,0,1,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr2_el1", CPENC (2,0,0,2,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr3_el1", CPENC (2,0,0,3,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr4_el1", CPENC (2,0,0,4,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr5_el1", CPENC (2,0,0,5,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr6_el1", CPENC (2,0,0,6,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr7_el1", CPENC (2,0,0,7,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr8_el1", CPENC (2,0,0,8,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgbvr9_el1", CPENC (2,0,0,9,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgclaimclr_el1", CPENC (2,0,7,9,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgclaimset_el1", CPENC (2,0,7,8,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgdtr_el0", CPENC (2,3,0,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgdtrrx_el0", CPENC (2,3,0,5,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("dbgdtrtx_el0", CPENC (2,3,0,5,0), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("dbgprcr_el1", CPENC (2,0,1,4,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgvcr32_el2", CPENC (2,4,0,7,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr0_el1", CPENC (2,0,0,0,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr10_el1", CPENC (2,0,0,10,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr11_el1", CPENC (2,0,0,11,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr12_el1", CPENC (2,0,0,12,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr13_el1", CPENC (2,0,0,13,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr14_el1", CPENC (2,0,0,14,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr15_el1", CPENC (2,0,0,15,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr1_el1", CPENC (2,0,0,1,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr2_el1", CPENC (2,0,0,2,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr3_el1", CPENC (2,0,0,3,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr4_el1", CPENC (2,0,0,4,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr5_el1", CPENC (2,0,0,5,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr6_el1", CPENC (2,0,0,6,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr7_el1", CPENC (2,0,0,7,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr8_el1", CPENC (2,0,0,8,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwcr9_el1", CPENC (2,0,0,9,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr0_el1", CPENC (2,0,0,0,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr10_el1", CPENC (2,0,0,10,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr11_el1", CPENC (2,0,0,11,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr12_el1", CPENC (2,0,0,12,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr13_el1", CPENC (2,0,0,13,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr14_el1", CPENC (2,0,0,14,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr15_el1", CPENC (2,0,0,15,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr1_el1", CPENC (2,0,0,1,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr2_el1", CPENC (2,0,0,2,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr3_el1", CPENC (2,0,0,3,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr4_el1", CPENC (2,0,0,4,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr5_el1", CPENC (2,0,0,5,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr6_el1", CPENC (2,0,0,6,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr7_el1", CPENC (2,0,0,7,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr8_el1", CPENC (2,0,0,8,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dbgwvr9_el1", CPENC (2,0,0,9,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("dczid_el0", CPENC (3,3,0,0,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("disr_el1", CPENC (3,0,12,1,1), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("dit", CPENC (3,3,4,2,5), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("dlr_el0", CPENC (3,3,4,5,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("dspsr_el0", CPENC (3,3,4,5,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("elr_el1", CPENC (3,0,4,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("elr_el12", CPENC (3,5,4,0,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("elr_el2", CPENC (3,4,4,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("elr_el3", CPENC (3,6,4,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("erridr_el1", CPENC (3,0,5,3,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("errselr_el1", CPENC (3,0,5,3,1), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxaddr_el1", CPENC (3,0,5,4,3), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxctlr_el1", CPENC (3,0,5,4,1), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxfr_el1", CPENC (3,0,5,4,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxmisc0_el1", CPENC (3,0,5,5,0), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxmisc1_el1", CPENC (3,0,5,5,1), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxmisc2_el1", CPENC (3,0,5,5,2), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxmisc3_el1", CPENC (3,0,5,5,3), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxpfgcdn_el1", CPENC (3,0,5,4,6), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxpfgctl_el1", CPENC (3,0,5,4,5), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxpfgf_el1", CPENC (3,0,5,4,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("erxstatus_el1", CPENC (3,0,5,4,2), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("esr_el1", CPENC (3,0,5,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("esr_el12", CPENC (3,5,5,2,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("esr_el2", CPENC (3,4,5,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("esr_el3", CPENC (3,6,5,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("far_el1", CPENC (3,0,6,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("far_el12", CPENC (3,5,6,0,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("far_el2", CPENC (3,4,6,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("far_el3", CPENC (3,6,6,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("fpsr", CPENC (3,3,4,4,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("gcr_el1", CPENC (3,0,1,0,6), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("gmid_el1", CPENC (3,1,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("gptbr_el3", CPENC (3,6,2,1,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("hacr_el2", CPENC (3,4,1,1,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("hafgrtr_el2", CPENC (3,4,3,1,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), F_ARCHEXT, AARCH64_FEATURE_V8_7A) - SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("hdfgwtr_el2", CPENC (3,4,3,1,5), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("hfgitr_el2", CPENC (3,4,1,1,6), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("hfgrtr_el2", CPENC (3,4,1,1,4), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("hfgwtr_el2", CPENC (3,4,1,1,5), F_ARCHEXT, AARCH64_FEATURE_V8_6A) - SYSREG ("hpfar_el2", CPENC (3,4,6,0,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("hstr_el2", CPENC (3,4,1,1,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap0r0_el1", CPENC (3,0,12,8,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap0r1_el1", CPENC (3,0,12,8,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap0r2_el1", CPENC (3,0,12,8,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap0r3_el1", CPENC (3,0,12,8,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap1r0_el1", CPENC (3,0,12,9,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap1r1_el1", CPENC (3,0,12,9,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap1r2_el1", CPENC (3,0,12,9,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ap1r3_el1", CPENC (3,0,12,9,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_asgi1r_el1", CPENC (3,0,12,11,6), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("icc_bpr0_el1", CPENC (3,0,12,8,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_bpr1_el1", CPENC (3,0,12,12,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ctlr_el1", CPENC (3,0,12,12,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_ctlr_el3", CPENC (3,6,12,12,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_dir_el1", CPENC (3,0,12,11,1), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("icc_eoir0_el1", CPENC (3,0,12,8,1), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("icc_eoir1_el1", CPENC (3,0,12,12,1), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("icc_hppir0_el1", CPENC (3,0,12,8,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("icc_hppir1_el1", CPENC (3,0,12,12,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("icc_iar0_el1", CPENC (3,0,12,8,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("icc_iar1_el1", CPENC (3,0,12,12,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("icc_igrpen0_el1", CPENC (3,0,12,12,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_igrpen1_el1", CPENC (3,0,12,12,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_igrpen1_el3", CPENC (3,6,12,12,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_nmiar1_el1", CPENC (3,0,12,9,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_8A) - SYSREG ("icc_pmr_el1", CPENC (3,0,4,6,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_rpr_el1", CPENC (3,0,12,11,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("icc_sgi0r_el1", CPENC (3,0,12,11,7), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("icc_sgi1r_el1", CPENC (3,0,12,11,5), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("icc_sre_el1", CPENC (3,0,12,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_sre_el2", CPENC (3,4,12,9,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("icc_sre_el3", CPENC (3,6,12,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap0r0_el2", CPENC (3,4,12,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap0r1_el2", CPENC (3,4,12,8,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap0r2_el2", CPENC (3,4,12,8,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap0r3_el2", CPENC (3,4,12,8,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap1r0_el2", CPENC (3,4,12,9,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap1r1_el2", CPENC (3,4,12,9,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap1r2_el2", CPENC (3,4,12,9,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_ap1r3_el2", CPENC (3,4,12,9,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_eisr_el2", CPENC (3,4,12,11,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("ich_elrsr_el2", CPENC (3,4,12,11,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("ich_hcr_el2", CPENC (3,4,12,11,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr0_el2", CPENC (3,4,12,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr10_el2", CPENC (3,4,12,13,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr11_el2", CPENC (3,4,12,13,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr12_el2", CPENC (3,4,12,13,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr13_el2", CPENC (3,4,12,13,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr14_el2", CPENC (3,4,12,13,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr15_el2", CPENC (3,4,12,13,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr1_el2", CPENC (3,4,12,12,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr2_el2", CPENC (3,4,12,12,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr3_el2", CPENC (3,4,12,12,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr4_el2", CPENC (3,4,12,12,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr5_el2", CPENC (3,4,12,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr6_el2", CPENC (3,4,12,12,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr7_el2", CPENC (3,4,12,12,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr8_el2", CPENC (3,4,12,13,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_lr9_el2", CPENC (3,4,12,13,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_misr_el2", CPENC (3,4,12,11,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("ich_vmcr_el2", CPENC (3,4,12,11,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("ich_vtr_el2", CPENC (3,4,12,11,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64afr0_el1", CPENC (3,0,0,5,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64afr1_el1", CPENC (3,0,0,5,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64dfr0_el1", CPENC (3,0,0,5,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64dfr1_el1", CPENC (3,0,0,5,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64isar0_el1", CPENC (3,0,0,6,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64isar1_el1", CPENC (3,0,0,6,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64isar2_el1", CPENC (3,0,0,6,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64mmfr0_el1", CPENC (3,0,0,7,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64mmfr1_el1", CPENC (3,0,0,7,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64mmfr2_el1", CPENC (3,0,0,7,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64pfr0_el1", CPENC (3,0,0,4,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64pfr1_el1", CPENC (3,0,0,4,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_aa64smfr0_el1", CPENC (3,0,0,4,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("id_aa64zfr0_el1", CPENC (3,0,0,4,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_SVE) - SYSREG ("id_afr0_el1", CPENC (3,0,0,1,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_dfr0_el1", CPENC (3,0,0,1,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_dfr1_el1", CPENC (3,0,0,3,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar0_el1", CPENC (3,0,0,2,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar1_el1", CPENC (3,0,0,2,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar2_el1", CPENC (3,0,0,2,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar3_el1", CPENC (3,0,0,2,3), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar4_el1", CPENC (3,0,0,2,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar5_el1", CPENC (3,0,0,2,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_isar6_el1", CPENC (3,0,0,2,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_mmfr0_el1", CPENC (3,0,0,1,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_mmfr1_el1", CPENC (3,0,0,1,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_mmfr2_el1", CPENC (3,0,0,1,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_mmfr3_el1", CPENC (3,0,0,1,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_mmfr4_el1", CPENC (3,0,0,2,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_mmfr5_el1", CPENC (3,0,0,3,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_pfr0_el1", CPENC (3,0,0,1,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_pfr1_el1", CPENC (3,0,0,1,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("id_pfr2_el1", CPENC (3,0,0,3,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_ID_PFR2) - SYSREG ("ifsr32_el2", CPENC (3,4,5,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("isr_el1", CPENC (3,0,12,1,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("lorc_el1", CPENC (3,0,10,4,3), F_ARCHEXT, AARCH64_FEATURE_LOR) - SYSREG ("lorea_el1", CPENC (3,0,10,4,1), F_ARCHEXT, AARCH64_FEATURE_LOR) - SYSREG ("lorid_el1", CPENC (3,0,10,4,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_LOR) - SYSREG ("lorn_el1", CPENC (3,0,10,4,2), F_ARCHEXT, AARCH64_FEATURE_LOR) - SYSREG ("lorsa_el1", CPENC (3,0,10,4,0), F_ARCHEXT, AARCH64_FEATURE_LOR) - SYSREG ("mair_el1", CPENC (3,0,10,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mair_el12", CPENC (3,5,10,2,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("mair_el2", CPENC (3,4,10,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mair_el3", CPENC (3,6,10,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mdccint_el1", CPENC (2,0,0,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mdccsr_el0", CPENC (2,3,0,1,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mdcr_el2", CPENC (3,4,1,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mdcr_el3", CPENC (3,6,1,3,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mdrar_el1", CPENC (2,0,1,0,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mdscr_el1", CPENC (2,0,0,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("mecid_a0_el2", CPENC (3,4,10,8,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mecid_a1_el2", CPENC (3,4,10,8,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("mecid_p0_el2", CPENC (3,4,10,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mecid_p1_el2", CPENC (3,4,10,8,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("mecid_rl_a_el3", CPENC (3,6,10,10,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mecidr_el2", CPENC (3,4,10,8,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mfar_el3", CPENC (3,6,6,0,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("midr_el1", CPENC (3,0,0,0,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mpam0_el1", CPENC (3,0,10,5,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpam1_el1", CPENC (3,0,10,5,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpam1_el12", CPENC (3,5,10,5,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpam2_el2", CPENC (3,4,10,5,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpam3_el3", CPENC (3,6,10,5,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("mpamvpm0_el2", CPENC (3,4,10,6,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm1_el2", CPENC (3,4,10,6,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm2_el2", CPENC (3,4,10,6,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm3_el2", CPENC (3,4,10,6,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm4_el2", CPENC (3,4,10,6,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm5_el2", CPENC (3,4,10,6,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm6_el2", CPENC (3,4,10,6,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpm7_el2", CPENC (3,4,10,6,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpamvpmv_el2", CPENC (3,4,10,4,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("mpidr_el1", CPENC (3,0,0,0,5), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mpuir_el1", CPENC (3,0,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("mpuir_el2", CPENC (3,4,0,0,4), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("mvfr0_el1", CPENC (3,0,0,3,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mvfr1_el1", CPENC (3,0,0,3,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("mvfr2_el1", CPENC (3,0,0,3,2), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("nzcv", CPENC (3,3,4,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("osdlr_el1", CPENC (2,0,1,3,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("osdtrrx_el1", CPENC (2,0,0,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("osdtrtx_el1", CPENC (2,0,0,3,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("oseccr_el1", CPENC (2,0,0,6,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("oslar_el1", CPENC (2,0,1,0,4), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("pan", CPENC (3,0,4,2,3), F_ARCHEXT, AARCH64_FEATURE_PAN) - SYSREG ("par_el1", CPENC (3,0,7,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmbsr_el1", CPENC (3,0,9,10,3), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmccfiltr_el0", CPENC (3,3,14,15,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmccntr_el0", CPENC (3,3,9,13,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmceid0_el0", CPENC (3,3,9,12,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("pmceid1_el0", CPENC (3,3,9,12,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("pmcntenclr_el0", CPENC (3,3,9,12,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmcntenset_el0", CPENC (3,3,9,12,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmcr_el0", CPENC (3,3,9,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr0_el0", CPENC (3,3,14,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr10_el0", CPENC (3,3,14,9,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr11_el0", CPENC (3,3,14,9,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr12_el0", CPENC (3,3,14,9,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr13_el0", CPENC (3,3,14,9,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr14_el0", CPENC (3,3,14,9,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr15_el0", CPENC (3,3,14,9,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr16_el0", CPENC (3,3,14,10,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr17_el0", CPENC (3,3,14,10,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr18_el0", CPENC (3,3,14,10,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr19_el0", CPENC (3,3,14,10,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr1_el0", CPENC (3,3,14,8,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr20_el0", CPENC (3,3,14,10,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr21_el0", CPENC (3,3,14,10,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr22_el0", CPENC (3,3,14,10,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr23_el0", CPENC (3,3,14,10,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr24_el0", CPENC (3,3,14,11,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr25_el0", CPENC (3,3,14,11,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr26_el0", CPENC (3,3,14,11,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr27_el0", CPENC (3,3,14,11,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr28_el0", CPENC (3,3,14,11,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr29_el0", CPENC (3,3,14,11,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr2_el0", CPENC (3,3,14,8,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr30_el0", CPENC (3,3,14,11,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr3_el0", CPENC (3,3,14,8,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr4_el0", CPENC (3,3,14,8,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr5_el0", CPENC (3,3,14,8,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr6_el0", CPENC (3,3,14,8,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr7_el0", CPENC (3,3,14,8,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr8_el0", CPENC (3,3,14,9,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevcntr9_el0", CPENC (3,3,14,9,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper0_el0", CPENC (3,3,14,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper10_el0", CPENC (3,3,14,13,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper11_el0", CPENC (3,3,14,13,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper12_el0", CPENC (3,3,14,13,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper13_el0", CPENC (3,3,14,13,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper14_el0", CPENC (3,3,14,13,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper15_el0", CPENC (3,3,14,13,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper16_el0", CPENC (3,3,14,14,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper17_el0", CPENC (3,3,14,14,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper18_el0", CPENC (3,3,14,14,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper19_el0", CPENC (3,3,14,14,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper1_el0", CPENC (3,3,14,12,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper20_el0", CPENC (3,3,14,14,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper21_el0", CPENC (3,3,14,14,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper22_el0", CPENC (3,3,14,14,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper23_el0", CPENC (3,3,14,14,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper24_el0", CPENC (3,3,14,15,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper25_el0", CPENC (3,3,14,15,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper26_el0", CPENC (3,3,14,15,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper27_el0", CPENC (3,3,14,15,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper28_el0", CPENC (3,3,14,15,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper29_el0", CPENC (3,3,14,15,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper2_el0", CPENC (3,3,14,12,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper30_el0", CPENC (3,3,14,15,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper3_el0", CPENC (3,3,14,12,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper4_el0", CPENC (3,3,14,12,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper5_el0", CPENC (3,3,14,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper6_el0", CPENC (3,3,14,12,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper7_el0", CPENC (3,3,14,12,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper8_el0", CPENC (3,3,14,13,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmevtyper9_el0", CPENC (3,3,14,13,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmintenclr_el1", CPENC (3,0,9,14,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmintenset_el1", CPENC (3,0,9,14,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmmir_el1", CPENC (3,0,9,14,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("pmovsclr_el0", CPENC (3,3,9,12,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmovsset_el0", CPENC (3,3,9,14,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmscr_el12", CPENC (3,5,9,9,0), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmscr_el2", CPENC (3,4,9,9,0), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmscr_el1", CPENC (3,0,9,9,0), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmselr_el0", CPENC (3,3,9,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmsevfr_el1", CPENC (3,0,9,9,5), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmsfcr_el1", CPENC (3,0,9,9,4), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmsicr_el1", CPENC (3,0,9,9,2), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmsidr_el1", CPENC (3,0,9,9,7), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmsirr_el1", CPENC (3,0,9,9,3), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmslatfr_el1", CPENC (3,0,9,9,6), F_ARCHEXT, AARCH64_FEATURE_PROFILE) - SYSREG ("pmsnevfr_el1", CPENC (3,0,9,9,1), F_ARCHEXT, AARCH64_FEATURE_V8_7A) - SYSREG ("pmswinc_el0", CPENC (3,3,9,12,4), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("pmuserenr_el0", CPENC (3,3,9,14,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmxevcntr_el0", CPENC (3,3,9,13,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("pmxevtyper_el0", CPENC (3,3,9,13,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("prbar10_el1", CPENC (3,0,6,13,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar10_el2", CPENC (3,4,6,13,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar11_el1", CPENC (3,0,6,13,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar11_el2", CPENC (3,4,6,13,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar12_el1", CPENC (3,0,6,14,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar12_el2", CPENC (3,4,6,14,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar13_el1", CPENC (3,0,6,14,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar13_el2", CPENC (3,4,6,14,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar14_el1", CPENC (3,0,6,15,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar14_el2", CPENC (3,4,6,15,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar15_el1", CPENC (3,0,6,15,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar15_el2", CPENC (3,4,6,15,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar1_el1", CPENC (3,0,6,8,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar1_el2", CPENC (3,4,6,8,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar2_el1", CPENC (3,0,6,9,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar2_el2", CPENC (3,4,6,9,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar3_el1", CPENC (3,0,6,9,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar3_el2", CPENC (3,4,6,9,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar4_el1", CPENC (3,0,6,10,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar4_el2", CPENC (3,4,6,10,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar5_el1", CPENC (3,0,6,10,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar5_el2", CPENC (3,4,6,10,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar6_el1", CPENC (3,0,6,11,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar6_el2", CPENC (3,4,6,11,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar7_el1", CPENC (3,0,6,11,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar7_el2", CPENC (3,4,6,11,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar8_el1", CPENC (3,0,6,12,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar8_el2", CPENC (3,4,6,12,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar9_el1", CPENC (3,0,6,12,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar9_el2", CPENC (3,4,6,12,4), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar_el1", CPENC (3,0,6,8,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prbar_el2", CPENC (3,4,6,8,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prenr_el1", CPENC (3,0,6,1,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prenr_el2", CPENC (3,4,6,1,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar10_el1", CPENC (3,0,6,13,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar10_el2", CPENC (3,4,6,13,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar11_el1", CPENC (3,0,6,13,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar11_el2", CPENC (3,4,6,13,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar12_el1", CPENC (3,0,6,14,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar12_el2", CPENC (3,4,6,14,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar13_el1", CPENC (3,0,6,14,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar13_el2", CPENC (3,4,6,14,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar14_el1", CPENC (3,0,6,15,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar14_el2", CPENC (3,4,6,15,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar15_el1", CPENC (3,0,6,15,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar15_el2", CPENC (3,4,6,15,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar1_el1", CPENC (3,0,6,8,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar1_el2", CPENC (3,4,6,8,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar2_el1", CPENC (3,0,6,9,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar2_el2", CPENC (3,4,6,9,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar3_el1", CPENC (3,0,6,9,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar3_el2", CPENC (3,4,6,9,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar4_el1", CPENC (3,0,6,10,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar4_el2", CPENC (3,4,6,10,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar5_el1", CPENC (3,0,6,10,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar5_el2", CPENC (3,4,6,10,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar6_el1", CPENC (3,0,6,11,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar6_el2", CPENC (3,4,6,11,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar7_el1", CPENC (3,0,6,11,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar7_el2", CPENC (3,4,6,11,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar8_el1", CPENC (3,0,6,12,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar8_el2", CPENC (3,4,6,12,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar9_el1", CPENC (3,0,6,12,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar9_el2", CPENC (3,4,6,12,5), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar_el1", CPENC (3,0,6,8,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prlar_el2", CPENC (3,4,6,8,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prselr_el1", CPENC (3,0,6,2,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("prselr_el2", CPENC (3,4,6,2,1), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("revidr_el1", CPENC (3,0,0,0,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("rgsr_el1", CPENC (3,0,1,0,5), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("rmr_el1", CPENC (3,0,12,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("rmr_el2", CPENC (3,4,12,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("rmr_el3", CPENC (3,6,12,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("rndr", CPENC (3,3,2,4,0), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_RNG) - SYSREG ("rndrrs", CPENC (3,3,2,4,1), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_RNG) - SYSREG ("rvbar_el1", CPENC (3,0,12,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("rvbar_el2", CPENC (3,4,12,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("rvbar_el3", CPENC (3,6,12,0,1), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("scr_el3", CPENC (3,6,1,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("sctlr_el1", CPENC (3,0,1,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("sctlr_el12", CPENC (3,5,1,0,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("sctlr_el2", CPENC (3,4,1,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("sctlr_el3", CPENC (3,6,1,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("scxtnum_el0", CPENC (3,3,13,0,7), F_ARCHEXT, AARCH64_FEATURE_SCXTNUM) - SYSREG ("scxtnum_el1", CPENC (3,0,13,0,7), F_ARCHEXT, AARCH64_FEATURE_SCXTNUM) - SYSREG ("scxtnum_el12", CPENC (3,5,13,0,7), F_ARCHEXT, AARCH64_FEATURE_SCXTNUM) - SYSREG ("scxtnum_el2", CPENC (3,4,13,0,7), F_ARCHEXT, AARCH64_FEATURE_SCXTNUM) - SYSREG ("scxtnum_el3", CPENC (3,6,13,0,7), F_ARCHEXT, AARCH64_FEATURE_SCXTNUM) - SYSREG ("sder32_el2", CPENC (3,4,1,3,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("sder32_el3", CPENC (3,6,1,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("smcr_el1", CPENC (3,0,1,2,6), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("smcr_el12", CPENC (3,5,1,2,6), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("smcr_el2", CPENC (3,4,1,2,6), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("smcr_el3", CPENC (3,6,1,2,6), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("smidr_el1", CPENC (3,1,0,0,6), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("smpri_el1", CPENC (3,0,1,2,4), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("smprimap_el2", CPENC (3,4,1,2,5), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("sp_el0", CPENC (3,0,4,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("sp_el1", CPENC (3,4,4,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("sp_el2", CPENC (3,6,4,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsel", CPENC (3,0,4,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_abt", CPENC (3,4,4,3,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_el1", CPENC (3,0,4,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_el12", CPENC (3,5,4,0,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("spsr_el2", CPENC (3,4,4,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_el3", CPENC (3,6,4,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_fiq", CPENC (3,4,4,3,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_hyp", CPENC (3,4,4,0,0), F_DEPRECATED, AARCH64_FEATURE_CORE) - SYSREG ("spsr_irq", CPENC (3,4,4,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("spsr_svc", CPENC (3,0,4,0,0), F_DEPRECATED, AARCH64_FEATURE_CORE) - SYSREG ("spsr_und", CPENC (3,4,4,3,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("ssbs", CPENC (3,3,4,2,6), F_ARCHEXT, AARCH64_FEATURE_SSBS) - SYSREG ("svcr", CPENC (3,3,4,2,2), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("tco", CPENC (3,3,4,2,7), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("tcr_el1", CPENC (3,0,2,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("tcr_el12", CPENC (3,5,2,0,2), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("tcr_el2", CPENC (3,4,2,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("tcr_el3", CPENC (3,6,2,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("teecr32_el1", CPENC (2,2,0,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("teehbr32_el1", CPENC (2,2,1,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("tfsr_el1", CPENC (3,0,5,6,0), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("tfsr_el12", CPENC (3,5,5,6,0), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("tfsr_el2", CPENC (3,4,5,6,0), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("tfsr_el3", CPENC (3,6,5,6,0), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("tfsre0_el1", CPENC (3,0,5,6,1), F_ARCHEXT, AARCH64_FEATURE_MEMTAG) - SYSREG ("tpidr2_el0", CPENC (3,3,13,0,5), F_ARCHEXT, AARCH64_FEATURE_SME) - SYSREG ("tpidr_el0", CPENC (3,3,13,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("tpidr_el1", CPENC (3,0,13,0,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("tpidr_el2", CPENC (3,4,13,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("tpidr_el3", CPENC (3,6,13,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("tpidrro_el0", CPENC (3,3,13,0,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trbbaser_el1", CPENC (3,0,9,11,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trbidr_el1", CPENC (3,0,9,11,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trblimitr_el1", CPENC (3,0,9,11,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trbmar_el1", CPENC (3,0,9,11,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trbptr_el1", CPENC (3,0,9,11,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trbsr_el1", CPENC (3,0,9,11,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trbtrg_el1", CPENC (3,0,9,11,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr0", CPENC (2,1,2,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr1", CPENC (2,1,2,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr10", CPENC (2,1,2,4,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr11", CPENC (2,1,2,6,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr12", CPENC (2,1,2,8,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr13", CPENC (2,1,2,10,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr14", CPENC (2,1,2,12,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr15", CPENC (2,1,2,14,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr2", CPENC (2,1,2,4,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr3", CPENC (2,1,2,6,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr4", CPENC (2,1,2,8,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr5", CPENC (2,1,2,10,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr6", CPENC (2,1,2,12,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr7", CPENC (2,1,2,14,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr8", CPENC (2,1,2,0,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacatr9", CPENC (2,1,2,2,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr0", CPENC (2,1,2,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr1", CPENC (2,1,2,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr10", CPENC (2,1,2,4,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr11", CPENC (2,1,2,6,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr12", CPENC (2,1,2,8,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr13", CPENC (2,1,2,10,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr14", CPENC (2,1,2,12,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr15", CPENC (2,1,2,14,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr2", CPENC (2,1,2,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr3", CPENC (2,1,2,6,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr4", CPENC (2,1,2,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr5", CPENC (2,1,2,10,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr6", CPENC (2,1,2,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr7", CPENC (2,1,2,14,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr8", CPENC (2,1,2,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcacvr9", CPENC (2,1,2,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcauthstatus", CPENC (2,1,7,14,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcauxctlr", CPENC (2,1,0,6,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcbbctlr", CPENC (2,1,0,15,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcccctlr", CPENC (2,1,0,14,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcctlr0", CPENC (2,1,3,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcctlr1", CPENC (2,1,3,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr0", CPENC (2,1,3,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr1", CPENC (2,1,3,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr2", CPENC (2,1,3,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr3", CPENC (2,1,3,6,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr4", CPENC (2,1,3,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr5", CPENC (2,1,3,10,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr6", CPENC (2,1,3,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidcvr7", CPENC (2,1,3,14,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccidr0", CPENC (2,1,7,12,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trccidr1", CPENC (2,1,7,13,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trccidr2", CPENC (2,1,7,14,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trccidr3", CPENC (2,1,7,15,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcclaimclr", CPENC (2,1,7,9,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcclaimset", CPENC (2,1,7,8,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntctlr0", CPENC (2,1,0,4,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntctlr1", CPENC (2,1,0,5,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntctlr2", CPENC (2,1,0,6,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntctlr3", CPENC (2,1,0,7,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntrldvr0", CPENC (2,1,0,0,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntrldvr1", CPENC (2,1,0,1,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntrldvr2", CPENC (2,1,0,2,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntrldvr3", CPENC (2,1,0,3,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntvr0", CPENC (2,1,0,8,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntvr1", CPENC (2,1,0,9,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntvr2", CPENC (2,1,0,10,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trccntvr3", CPENC (2,1,0,11,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcconfigr", CPENC (2,1,0,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdevaff0", CPENC (2,1,7,10,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcdevaff1", CPENC (2,1,7,11,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcdevarch", CPENC (2,1,7,15,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcdevid", CPENC (2,1,7,2,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcdevtype", CPENC (2,1,7,3,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr0", CPENC (2,1,2,0,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr1", CPENC (2,1,2,4,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr2", CPENC (2,1,2,8,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr3", CPENC (2,1,2,12,6), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr4", CPENC (2,1,2,0,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr5", CPENC (2,1,2,4,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr6", CPENC (2,1,2,8,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcmr7", CPENC (2,1,2,12,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr0", CPENC (2,1,2,0,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr1", CPENC (2,1,2,4,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr2", CPENC (2,1,2,8,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr3", CPENC (2,1,2,12,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr4", CPENC (2,1,2,0,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr5", CPENC (2,1,2,4,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr6", CPENC (2,1,2,8,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcdvcvr7", CPENC (2,1,2,12,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("trceventctl0r", CPENC (2,1,0,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trceventctl1r", CPENC (2,1,0,9,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcextinselr", CPENC (2,1,0,8,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcextinselr0", CPENC (2,1,0,8,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcextinselr1", CPENC (2,1,0,9,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcextinselr2", CPENC (2,1,0,10,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcextinselr3", CPENC (2,1,0,11,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcidr0", CPENC (2,1,0,8,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr1", CPENC (2,1,0,9,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr10", CPENC (2,1,0,2,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr11", CPENC (2,1,0,3,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr12", CPENC (2,1,0,4,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr13", CPENC (2,1,0,5,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr2", CPENC (2,1,0,10,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr3", CPENC (2,1,0,11,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr4", CPENC (2,1,0,12,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr5", CPENC (2,1,0,13,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr6", CPENC (2,1,0,14,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr7", CPENC (2,1,0,15,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr8", CPENC (2,1,0,0,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcidr9", CPENC (2,1,0,1,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec0", CPENC (2,1,0,0,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec1", CPENC (2,1,0,1,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec2", CPENC (2,1,0,2,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec3", CPENC (2,1,0,3,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec4", CPENC (2,1,0,4,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec5", CPENC (2,1,0,5,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec6", CPENC (2,1,0,6,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcimspec7", CPENC (2,1,0,7,7), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcitctrl", CPENC (2,1,7,0,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trclar", CPENC (2,1,7,12,6), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("trclsr", CPENC (2,1,7,13,6), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcoslar", CPENC (2,1,1,0,4), F_REG_WRITE, AARCH64_FEATURE_CORE) - SYSREG ("trcoslsr", CPENC (2,1,1,1,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpdcr", CPENC (2,1,1,4,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcpdsr", CPENC (2,1,1,5,4), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr0", CPENC (2,1,7,8,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr1", CPENC (2,1,7,9,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr2", CPENC (2,1,7,10,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr3", CPENC (2,1,7,11,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr4", CPENC (2,1,7,4,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr5", CPENC (2,1,7,5,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr6", CPENC (2,1,7,6,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcpidr7", CPENC (2,1,7,7,7), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcprgctlr", CPENC (2,1,0,1,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcprocselr", CPENC (2,1,0,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcqctlr", CPENC (2,1,0,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr10", CPENC (2,1,1,10,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr11", CPENC (2,1,1,11,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr12", CPENC (2,1,1,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr13", CPENC (2,1,1,13,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr14", CPENC (2,1,1,14,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr15", CPENC (2,1,1,15,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr16", CPENC (2,1,1,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr17", CPENC (2,1,1,1,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr18", CPENC (2,1,1,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr19", CPENC (2,1,1,3,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr2", CPENC (2,1,1,2,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr20", CPENC (2,1,1,4,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr21", CPENC (2,1,1,5,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr22", CPENC (2,1,1,6,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr23", CPENC (2,1,1,7,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr24", CPENC (2,1,1,8,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr25", CPENC (2,1,1,9,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr26", CPENC (2,1,1,10,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr27", CPENC (2,1,1,11,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr28", CPENC (2,1,1,12,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr29", CPENC (2,1,1,13,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr3", CPENC (2,1,1,3,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr30", CPENC (2,1,1,14,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr31", CPENC (2,1,1,15,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr4", CPENC (2,1,1,4,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr5", CPENC (2,1,1,5,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr6", CPENC (2,1,1,6,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr7", CPENC (2,1,1,7,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr8", CPENC (2,1,1,8,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsctlr9", CPENC (2,1,1,9,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcrsr", CPENC (2,1,0,10,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcseqevr0", CPENC (2,1,0,0,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcseqevr1", CPENC (2,1,0,1,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcseqevr2", CPENC (2,1,0,2,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcseqrstevr", CPENC (2,1,0,6,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcseqstr", CPENC (2,1,0,7,4), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr0", CPENC (2,1,1,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr1", CPENC (2,1,1,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr2", CPENC (2,1,1,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr3", CPENC (2,1,1,3,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr4", CPENC (2,1,1,4,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr5", CPENC (2,1,1,5,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr6", CPENC (2,1,1,6,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcssccr7", CPENC (2,1,1,7,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr0", CPENC (2,1,1,8,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr1", CPENC (2,1,1,9,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr2", CPENC (2,1,1,10,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr3", CPENC (2,1,1,11,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr4", CPENC (2,1,1,12,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr5", CPENC (2,1,1,13,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr6", CPENC (2,1,1,14,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsscsr7", CPENC (2,1,1,15,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr0", CPENC (2,1,1,0,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr1", CPENC (2,1,1,1,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr2", CPENC (2,1,1,2,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr3", CPENC (2,1,1,3,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr4", CPENC (2,1,1,4,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr5", CPENC (2,1,1,5,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr6", CPENC (2,1,1,6,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcsspcicr7", CPENC (2,1,1,7,3), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcstallctlr", CPENC (2,1,0,11,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcstatr", CPENC (2,1,0,3,0), F_REG_READ, AARCH64_FEATURE_CORE) - SYSREG ("trcsyncpr", CPENC (2,1,0,13,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trctraceidr", CPENC (2,1,0,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trctsctlr", CPENC (2,1,0,12,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvdarcctlr", CPENC (2,1,0,10,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvdctlr", CPENC (2,1,0,8,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvdsacctlr", CPENC (2,1,0,9,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvictlr", CPENC (2,1,0,0,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcviiectlr", CPENC (2,1,0,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvipcssctlr", CPENC (2,1,0,3,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvissctlr", CPENC (2,1,0,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcctlr0", CPENC (2,1,3,2,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcctlr1", CPENC (2,1,3,3,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr0", CPENC (2,1,3,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr1", CPENC (2,1,3,2,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr2", CPENC (2,1,3,4,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr3", CPENC (2,1,3,6,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr4", CPENC (2,1,3,8,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr5", CPENC (2,1,3,10,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr6", CPENC (2,1,3,12,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trcvmidcvr7", CPENC (2,1,3,14,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("trfcr_el1", CPENC (3,0,1,2,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("trfcr_el12", CPENC (3,5,1,2,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("trfcr_el2", CPENC (3,4,1,2,1), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_ARCHEXT, AARCH64_FEATURE_V8A) - SYSREG ("ttbr0_el3", CPENC (3,6,2,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_ARCHEXT, AARCH64_FEATURE_V8A|AARCH64_FEATURE_V8_1A) - SYSREG ("uao", CPENC (3,0,4,2,4), F_ARCHEXT, AARCH64_FEATURE_V8_2A) - SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("vbar_el12", CPENC (3,5,12,0,0), F_ARCHEXT, AARCH64_FEATURE_V8_1A) - SYSREG ("vbar_el2", CPENC (3,4,12,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("vbar_el3", CPENC (3,6,12,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("vdisr_el2", CPENC (3,4,12,1,1), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("vmecid_a_el2", CPENC (3,4,10,9,1), 0, AARCH64_FEATURE_CORE) - SYSREG ("vmecid_p_el2", CPENC (3,4,10,9,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("vmpidr_el2", CPENC (3,4,0,0,5), 0, AARCH64_FEATURE_CORE) - SYSREG ("vncr_el2", CPENC (3,4,2,2,0), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("vpidr_el2", CPENC (3,4,0,0,0), 0, AARCH64_FEATURE_CORE) - SYSREG ("vsctlr_el2", CPENC (3,4,2,0,0), F_ARCHEXT, AARCH64_FEATURE_V8R) - SYSREG ("vsesr_el2", CPENC (3,4,5,2,3), F_ARCHEXT, AARCH64_FEATURE_RAS) - SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), F_ARCHEXT, AARCH64_FEATURE_V8_4A) - SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), F_ARCHEXT, AARCH64_FEATURE_V8A|AARCH64_FEATURE_V8_4A) - SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0, AARCH64_FEATURE_CORE) - SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_ARCHEXT, AARCH64_FEATURE_V8A) - SYSREG ("zcr_el1", CPENC (3,0,1,2,0), F_ARCHEXT, AARCH64_FEATURE_SVE) - SYSREG ("zcr_el12", CPENC (3,5,1,2,0), F_ARCHEXT, AARCH64_FEATURE_SVE) - SYSREG ("zcr_el2", CPENC (3,4,1,2,0), F_ARCHEXT, AARCH64_FEATURE_SVE) - SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, AARCH64_FEATURE_SVE) + SYSREG ("accdata_el1", CPENC (3,0,13,0,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("actlr_el1", CPENC (3,0,1,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("actlr_el2", CPENC (3,4,1,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("actlr_el3", CPENC (3,6,1,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("afsr0_el1", CPENC (3,0,5,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("afsr0_el12", CPENC (3,5,5,1,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("afsr0_el2", CPENC (3,4,5,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("afsr0_el3", CPENC (3,6,5,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("afsr1_el1", CPENC (3,0,5,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("afsr1_el12", CPENC (3,5,5,1,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("afsr1_el2", CPENC (3,4,5,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("afsr1_el3", CPENC (3,6,5,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("aidr_el1", CPENC (3,1,0,0,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("allint", CPENC (3,0,4,3,0), F_ARCHEXT, ARCH (1, FEAT (V8_8A))) + SYSREG ("amair_el1", CPENC (3,0,10,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("amair_el12", CPENC (3,5,10,3,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("amair_el2", CPENC (3,4,10,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("amair_el3", CPENC (3,6,10,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("amcfgr_el0", CPENC (3,3,13,2,1), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amcg1idr_el0", CPENC (3,3,13,2,6), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amcgcr_el0", CPENC (3,3,13,2,2), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amcntenclr0_el0", CPENC (3,3,13,2,4), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amcntenclr1_el0", CPENC (3,3,13,3,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amcntenset0_el0", CPENC (3,3,13,2,5), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amcntenset1_el0", CPENC (3,3,13,3,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amcr_el0", CPENC (3,3,13,2,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr00_el0", CPENC (3,3,13,4,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr01_el0", CPENC (3,3,13,4,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr02_el0", CPENC (3,3,13,4,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr03_el0", CPENC (3,3,13,4,3), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr10_el0", CPENC (3,3,13,12,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr110_el0", CPENC (3,3,13,13,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr111_el0", CPENC (3,3,13,13,3), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr112_el0", CPENC (3,3,13,13,4), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr113_el0", CPENC (3,3,13,13,5), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr114_el0", CPENC (3,3,13,13,6), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr115_el0", CPENC (3,3,13,13,7), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr11_el0", CPENC (3,3,13,12,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr12_el0", CPENC (3,3,13,12,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr13_el0", CPENC (3,3,13,12,3), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr14_el0", CPENC (3,3,13,12,4), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr15_el0", CPENC (3,3,13,12,5), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr16_el0", CPENC (3,3,13,12,6), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr17_el0", CPENC (3,3,13,12,7), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr18_el0", CPENC (3,3,13,13,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntr19_el0", CPENC (3,3,13,13,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevcntvoff00_el2", CPENC (3,4,13,8,0), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff010_el2", CPENC (3,4,13,9,2), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff011_el2", CPENC (3,4,13,9,3), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff012_el2", CPENC (3,4,13,9,4), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff013_el2", CPENC (3,4,13,9,5), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff014_el2", CPENC (3,4,13,9,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff015_el2", CPENC (3,4,13,9,7), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff01_el2", CPENC (3,4,13,8,1), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff02_el2", CPENC (3,4,13,8,2), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff03_el2", CPENC (3,4,13,8,3), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff04_el2", CPENC (3,4,13,8,4), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff05_el2", CPENC (3,4,13,8,5), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff06_el2", CPENC (3,4,13,8,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff07_el2", CPENC (3,4,13,8,7), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff08_el2", CPENC (3,4,13,9,0), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff09_el2", CPENC (3,4,13,9,1), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff10_el2", CPENC (3,4,13,10,0), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff110_el2", CPENC (3,4,13,11,2), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff111_el2", CPENC (3,4,13,11,3), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff112_el2", CPENC (3,4,13,11,4), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff113_el2", CPENC (3,4,13,11,5), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff114_el2", CPENC (3,4,13,11,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff115_el2", CPENC (3,4,13,11,7), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff11_el2", CPENC (3,4,13,10,1), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff12_el2", CPENC (3,4,13,10,2), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff13_el2", CPENC (3,4,13,10,3), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff14_el2", CPENC (3,4,13,10,4), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff15_el2", CPENC (3,4,13,10,5), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff16_el2", CPENC (3,4,13,10,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff17_el2", CPENC (3,4,13,10,7), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff18_el2", CPENC (3,4,13,11,0), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevcntvoff19_el2", CPENC (3,4,13,11,1), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("amevtyper00_el0", CPENC (3,3,13,6,0), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper01_el0", CPENC (3,3,13,6,1), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper02_el0", CPENC (3,3,13,6,2), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper03_el0", CPENC (3,3,13,6,3), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper10_el0", CPENC (3,3,13,14,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper110_el0", CPENC (3,3,13,15,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper111_el0", CPENC (3,3,13,15,3), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper112_el0", CPENC (3,3,13,15,4), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper113_el0", CPENC (3,3,13,15,5), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper114_el0", CPENC (3,3,13,15,6), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper115_el0", CPENC (3,3,13,15,7), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper11_el0", CPENC (3,3,13,14,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper12_el0", CPENC (3,3,13,14,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper13_el0", CPENC (3,3,13,14,3), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper14_el0", CPENC (3,3,13,14,4), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper15_el0", CPENC (3,3,13,14,5), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper16_el0", CPENC (3,3,13,14,6), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper17_el0", CPENC (3,3,13,14,7), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper18_el0", CPENC (3,3,13,15,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amevtyper19_el0", CPENC (3,3,13,15,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("amuserenr_el0", CPENC (3,3,13,2,3), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("apdakeyhi_el1", CPENC (3,0,2,2,1), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apdakeylo_el1", CPENC (3,0,2,2,0), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apdbkeyhi_el1", CPENC (3,0,2,2,3), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apdbkeylo_el1", CPENC (3,0,2,2,2), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apgakeyhi_el1", CPENC (3,0,2,3,1), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apgakeylo_el1", CPENC (3,0,2,3,0), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apiakeyhi_el1", CPENC (3,0,2,1,1), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apiakeylo_el1", CPENC (3,0,2,1,0), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apibkeyhi_el1", CPENC (3,0,2,1,3), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("apibkeylo_el1", CPENC (3,0,2,1,2), F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("brbcr_el1", CPENC (2,1,9,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbcr_el12", CPENC (2,5,9,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbcr_el2", CPENC (2,4,9,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbfcr_el1", CPENC (2,1,9,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbidr0_el1", CPENC (2,1,9,2,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf0_el1", CPENC (2,1,8,0,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf10_el1", CPENC (2,1,8,10,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf11_el1", CPENC (2,1,8,11,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf12_el1", CPENC (2,1,8,12,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf13_el1", CPENC (2,1,8,13,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf14_el1", CPENC (2,1,8,14,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf15_el1", CPENC (2,1,8,15,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf16_el1", CPENC (2,1,8,0,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf17_el1", CPENC (2,1,8,1,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf18_el1", CPENC (2,1,8,2,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf19_el1", CPENC (2,1,8,3,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf1_el1", CPENC (2,1,8,1,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf20_el1", CPENC (2,1,8,4,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf21_el1", CPENC (2,1,8,5,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf22_el1", CPENC (2,1,8,6,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf23_el1", CPENC (2,1,8,7,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf24_el1", CPENC (2,1,8,8,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf25_el1", CPENC (2,1,8,9,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf26_el1", CPENC (2,1,8,10,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf27_el1", CPENC (2,1,8,11,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf28_el1", CPENC (2,1,8,12,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf29_el1", CPENC (2,1,8,13,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf2_el1", CPENC (2,1,8,2,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf30_el1", CPENC (2,1,8,14,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf31_el1", CPENC (2,1,8,15,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf3_el1", CPENC (2,1,8,3,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf4_el1", CPENC (2,1,8,4,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf5_el1", CPENC (2,1,8,5,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf6_el1", CPENC (2,1,8,6,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf7_el1", CPENC (2,1,8,7,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf8_el1", CPENC (2,1,8,8,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinf9_el1", CPENC (2,1,8,9,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbinfinj_el1", CPENC (2,1,9,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc0_el1", CPENC (2,1,8,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc10_el1", CPENC (2,1,8,10,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc11_el1", CPENC (2,1,8,11,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc12_el1", CPENC (2,1,8,12,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc13_el1", CPENC (2,1,8,13,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc14_el1", CPENC (2,1,8,14,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc15_el1", CPENC (2,1,8,15,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc16_el1", CPENC (2,1,8,0,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc17_el1", CPENC (2,1,8,1,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc18_el1", CPENC (2,1,8,2,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc19_el1", CPENC (2,1,8,3,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc1_el1", CPENC (2,1,8,1,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc20_el1", CPENC (2,1,8,4,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc21_el1", CPENC (2,1,8,5,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc22_el1", CPENC (2,1,8,6,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc23_el1", CPENC (2,1,8,7,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc24_el1", CPENC (2,1,8,8,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc25_el1", CPENC (2,1,8,9,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc26_el1", CPENC (2,1,8,10,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc27_el1", CPENC (2,1,8,11,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc28_el1", CPENC (2,1,8,12,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc29_el1", CPENC (2,1,8,13,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc2_el1", CPENC (2,1,8,2,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc30_el1", CPENC (2,1,8,14,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc31_el1", CPENC (2,1,8,15,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc3_el1", CPENC (2,1,8,3,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc4_el1", CPENC (2,1,8,4,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc5_el1", CPENC (2,1,8,5,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc6_el1", CPENC (2,1,8,6,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc7_el1", CPENC (2,1,8,7,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc8_el1", CPENC (2,1,8,8,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrc9_el1", CPENC (2,1,8,9,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbsrcinj_el1", CPENC (2,1,9,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt0_el1", CPENC (2,1,8,0,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt10_el1", CPENC (2,1,8,10,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt11_el1", CPENC (2,1,8,11,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt12_el1", CPENC (2,1,8,12,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt13_el1", CPENC (2,1,8,13,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt14_el1", CPENC (2,1,8,14,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt15_el1", CPENC (2,1,8,15,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt16_el1", CPENC (2,1,8,0,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt17_el1", CPENC (2,1,8,1,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt18_el1", CPENC (2,1,8,2,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt19_el1", CPENC (2,1,8,3,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt1_el1", CPENC (2,1,8,1,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt20_el1", CPENC (2,1,8,4,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt21_el1", CPENC (2,1,8,5,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt22_el1", CPENC (2,1,8,6,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt23_el1", CPENC (2,1,8,7,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt24_el1", CPENC (2,1,8,8,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt25_el1", CPENC (2,1,8,9,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt26_el1", CPENC (2,1,8,10,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt27_el1", CPENC (2,1,8,11,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt28_el1", CPENC (2,1,8,12,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt29_el1", CPENC (2,1,8,13,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt2_el1", CPENC (2,1,8,2,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt30_el1", CPENC (2,1,8,14,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt31_el1", CPENC (2,1,8,15,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt3_el1", CPENC (2,1,8,3,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt4_el1", CPENC (2,1,8,4,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt5_el1", CPENC (2,1,8,5,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt6_el1", CPENC (2,1,8,6,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt7_el1", CPENC (2,1,8,7,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt8_el1", CPENC (2,1,8,8,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgt9_el1", CPENC (2,1,8,9,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("brbtgtinj_el1", CPENC (2,1,9,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("brbts_el1", CPENC (2,1,9,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ccsidr2_el1", CPENC (3,1,0,0,2), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_3A))) + SYSREG ("ccsidr_el1", CPENC (3,1,0,0,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("clidr_el1", CPENC (3,1,0,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("cntfrq_el0", CPENC (3,3,14,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cnthctl_el2", CPENC (3,4,14,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cnthp_ctl_el2", CPENC (3,4,14,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cnthp_cval_el2", CPENC (3,4,14,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cnthp_tval_el2", CPENC (3,4,14,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cnthps_ctl_el2", CPENC (3,4,14,5,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("cnthps_cval_el2", CPENC (3,4,14,5,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("cnthps_tval_el2", CPENC (3,4,14,5,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("cnthv_ctl_el2", CPENC (3,4,14,3,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cnthv_cval_el2", CPENC (3,4,14,3,2), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cnthv_tval_el2", CPENC (3,4,14,3,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cnthvs_ctl_el2", CPENC (3,4,14,4,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("cnthvs_cval_el2", CPENC (3,4,14,4,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("cnthvs_tval_el2", CPENC (3,4,14,4,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("cntkctl_el1", CPENC (3,0,14,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntkctl_el12", CPENC (3,5,14,1,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntp_ctl_el0", CPENC (3,3,14,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntp_ctl_el02", CPENC (3,5,14,2,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntp_cval_el0", CPENC (3,3,14,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntp_cval_el02", CPENC (3,5,14,2,2), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntp_tval_el0", CPENC (3,3,14,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntp_tval_el02", CPENC (3,5,14,2,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntpct_el0", CPENC (3,3,14,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("cntpctss_el0", CPENC (3,3,14,0,5), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("cntpoff_el2", CPENC (3,4,14,0,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("cntps_ctl_el1", CPENC (3,7,14,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntps_cval_el1", CPENC (3,7,14,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntps_tval_el1", CPENC (3,7,14,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntv_ctl_el0", CPENC (3,3,14,3,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntv_ctl_el02", CPENC (3,5,14,3,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntv_cval_el0", CPENC (3,3,14,3,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntv_cval_el02", CPENC (3,5,14,3,2), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntv_tval_el0", CPENC (3,3,14,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cntv_tval_el02", CPENC (3,5,14,3,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cntvct_el0", CPENC (3,3,14,0,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("cntvctss_el0", CPENC (3,3,14,0,6), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("cntvoff_el2", CPENC (3,4,14,0,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("contextidr_el1", CPENC (3,0,13,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("contextidr_el12", CPENC (3,5,13,0,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("contextidr_el2", CPENC (3,4,13,0,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cpacr_el1", CPENC (3,0,1,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cpacr_el12", CPENC (3,5,1,0,2), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("cptr_el2", CPENC (3,4,1,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("cptr_el3", CPENC (3,6,1,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrcr_el0", CPENC (2,3,8,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrcr_el1", CPENC (2,0,8,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrcr_el12", CPENC (2,5,8,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrcr_el2", CPENC (2,4,8,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csridr_el0", CPENC (2,3,8,0,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("csrptr_el0", CPENC (2,3,8,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrptr_el1", CPENC (2,0,8,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrptr_el12", CPENC (2,5,8,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrptr_el2", CPENC (2,4,8,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("csrptridx_el0", CPENC (2,3,8,0,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("csrptridx_el1", CPENC (2,0,8,0,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("csrptridx_el2", CPENC (2,4,8,0,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("csselr_el1", CPENC (3,2,0,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ctr_el0", CPENC (3,3,0,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("currentel", CPENC (3,0,4,2,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("dacr32_el2", CPENC (3,4,3,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("daif", CPENC (3,3,4,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgauthstatus_el1", CPENC (2,0,7,14,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr0_el1", CPENC (2,0,0,0,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr10_el1", CPENC (2,0,0,10,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr11_el1", CPENC (2,0,0,11,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr12_el1", CPENC (2,0,0,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr13_el1", CPENC (2,0,0,13,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr14_el1", CPENC (2,0,0,14,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr15_el1", CPENC (2,0,0,15,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr1_el1", CPENC (2,0,0,1,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr2_el1", CPENC (2,0,0,2,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr3_el1", CPENC (2,0,0,3,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr4_el1", CPENC (2,0,0,4,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr5_el1", CPENC (2,0,0,5,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr6_el1", CPENC (2,0,0,6,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr7_el1", CPENC (2,0,0,7,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr8_el1", CPENC (2,0,0,8,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbcr9_el1", CPENC (2,0,0,9,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr0_el1", CPENC (2,0,0,0,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr10_el1", CPENC (2,0,0,10,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr11_el1", CPENC (2,0,0,11,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr12_el1", CPENC (2,0,0,12,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr13_el1", CPENC (2,0,0,13,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr14_el1", CPENC (2,0,0,14,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr15_el1", CPENC (2,0,0,15,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr1_el1", CPENC (2,0,0,1,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr2_el1", CPENC (2,0,0,2,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr3_el1", CPENC (2,0,0,3,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr4_el1", CPENC (2,0,0,4,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr5_el1", CPENC (2,0,0,5,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr6_el1", CPENC (2,0,0,6,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr7_el1", CPENC (2,0,0,7,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr8_el1", CPENC (2,0,0,8,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgbvr9_el1", CPENC (2,0,0,9,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgclaimclr_el1", CPENC (2,0,7,9,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgclaimset_el1", CPENC (2,0,7,8,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgdtr_el0", CPENC (2,3,0,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgdtrrx_el0", CPENC (2,3,0,5,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("dbgdtrtx_el0", CPENC (2,3,0,5,0), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("dbgprcr_el1", CPENC (2,0,1,4,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgvcr32_el2", CPENC (2,4,0,7,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr0_el1", CPENC (2,0,0,0,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr10_el1", CPENC (2,0,0,10,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr11_el1", CPENC (2,0,0,11,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr12_el1", CPENC (2,0,0,12,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr13_el1", CPENC (2,0,0,13,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr14_el1", CPENC (2,0,0,14,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr15_el1", CPENC (2,0,0,15,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr1_el1", CPENC (2,0,0,1,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr2_el1", CPENC (2,0,0,2,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr3_el1", CPENC (2,0,0,3,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr4_el1", CPENC (2,0,0,4,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr5_el1", CPENC (2,0,0,5,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr6_el1", CPENC (2,0,0,6,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr7_el1", CPENC (2,0,0,7,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr8_el1", CPENC (2,0,0,8,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwcr9_el1", CPENC (2,0,0,9,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr0_el1", CPENC (2,0,0,0,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr10_el1", CPENC (2,0,0,10,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr11_el1", CPENC (2,0,0,11,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr12_el1", CPENC (2,0,0,12,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr13_el1", CPENC (2,0,0,13,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr14_el1", CPENC (2,0,0,14,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr15_el1", CPENC (2,0,0,15,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr1_el1", CPENC (2,0,0,1,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr2_el1", CPENC (2,0,0,2,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr3_el1", CPENC (2,0,0,3,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr4_el1", CPENC (2,0,0,4,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr5_el1", CPENC (2,0,0,5,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr6_el1", CPENC (2,0,0,6,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr7_el1", CPENC (2,0,0,7,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr8_el1", CPENC (2,0,0,8,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dbgwvr9_el1", CPENC (2,0,0,9,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dczid_el0", CPENC (3,3,0,0,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("disr_el1", CPENC (3,0,12,1,1), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("dit", CPENC (3,3,4,2,5), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("dlr_el0", CPENC (3,3,4,5,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("dspsr_el0", CPENC (3,3,4,5,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("elr_el1", CPENC (3,0,4,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("elr_el12", CPENC (3,5,4,0,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("elr_el2", CPENC (3,4,4,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("elr_el3", CPENC (3,6,4,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("erridr_el1", CPENC (3,0,5,3,0), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("errselr_el1", CPENC (3,0,5,3,1), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxaddr_el1", CPENC (3,0,5,4,3), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxctlr_el1", CPENC (3,0,5,4,1), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxfr_el1", CPENC (3,0,5,4,0), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxmisc0_el1", CPENC (3,0,5,5,0), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxmisc1_el1", CPENC (3,0,5,5,1), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxmisc2_el1", CPENC (3,0,5,5,2), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxmisc3_el1", CPENC (3,0,5,5,3), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxpfgcdn_el1", CPENC (3,0,5,4,6), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxpfgctl_el1", CPENC (3,0,5,4,5), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxpfgf_el1", CPENC (3,0,5,4,4), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("erxstatus_el1", CPENC (3,0,5,4,2), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("esr_el1", CPENC (3,0,5,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("esr_el12", CPENC (3,5,5,2,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("esr_el2", CPENC (3,4,5,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("esr_el3", CPENC (3,6,5,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("far_el1", CPENC (3,0,6,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("far_el12", CPENC (3,5,6,0,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("far_el2", CPENC (3,4,6,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("far_el3", CPENC (3,6,6,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("fpcr", CPENC (3,3,4,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("fpexc32_el2", CPENC (3,4,5,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("fpsr", CPENC (3,3,4,4,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("gcr_el1", CPENC (3,0,1,0,6), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("gmid_el1", CPENC (3,1,0,0,4), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("gpccr_el3", CPENC (3,6,2,1,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("gptbr_el3", CPENC (3,6,2,1,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("hacr_el2", CPENC (3,4,1,1,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("hafgrtr_el2", CPENC (3,4,3,1,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("hcr_el2", CPENC (3,4,1,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("hcrx_el2", CPENC (3,4,1,2,2), F_ARCHEXT, ARCH (1, FEAT (V8_7A))) + SYSREG ("hdfgrtr_el2", CPENC (3,4,3,1,4), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("hdfgwtr_el2", CPENC (3,4,3,1,5), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("hfgitr_el2", CPENC (3,4,1,1,6), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("hfgrtr_el2", CPENC (3,4,1,1,4), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("hfgwtr_el2", CPENC (3,4,1,1,5), F_ARCHEXT, ARCH (1, FEAT (V8_6A))) + SYSREG ("hpfar_el2", CPENC (3,4,6,0,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("hstr_el2", CPENC (3,4,1,1,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap0r0_el1", CPENC (3,0,12,8,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap0r1_el1", CPENC (3,0,12,8,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap0r2_el1", CPENC (3,0,12,8,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap0r3_el1", CPENC (3,0,12,8,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap1r0_el1", CPENC (3,0,12,9,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap1r1_el1", CPENC (3,0,12,9,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap1r2_el1", CPENC (3,0,12,9,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ap1r3_el1", CPENC (3,0,12,9,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_asgi1r_el1", CPENC (3,0,12,11,6), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("icc_bpr0_el1", CPENC (3,0,12,8,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_bpr1_el1", CPENC (3,0,12,12,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ctlr_el1", CPENC (3,0,12,12,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_ctlr_el3", CPENC (3,6,12,12,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_dir_el1", CPENC (3,0,12,11,1), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("icc_eoir0_el1", CPENC (3,0,12,8,1), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("icc_eoir1_el1", CPENC (3,0,12,12,1), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("icc_hppir0_el1", CPENC (3,0,12,8,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("icc_hppir1_el1", CPENC (3,0,12,12,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("icc_iar0_el1", CPENC (3,0,12,8,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("icc_iar1_el1", CPENC (3,0,12,12,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("icc_igrpen0_el1", CPENC (3,0,12,12,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_igrpen1_el1", CPENC (3,0,12,12,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_igrpen1_el3", CPENC (3,6,12,12,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_nmiar1_el1", CPENC (3,0,12,9,5), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_8A))) + SYSREG ("icc_pmr_el1", CPENC (3,0,4,6,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_rpr_el1", CPENC (3,0,12,11,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("icc_sgi0r_el1", CPENC (3,0,12,11,7), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("icc_sgi1r_el1", CPENC (3,0,12,11,5), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("icc_sre_el1", CPENC (3,0,12,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_sre_el2", CPENC (3,4,12,9,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("icc_sre_el3", CPENC (3,6,12,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap0r0_el2", CPENC (3,4,12,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap0r1_el2", CPENC (3,4,12,8,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap0r2_el2", CPENC (3,4,12,8,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap0r3_el2", CPENC (3,4,12,8,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap1r0_el2", CPENC (3,4,12,9,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap1r1_el2", CPENC (3,4,12,9,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap1r2_el2", CPENC (3,4,12,9,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_ap1r3_el2", CPENC (3,4,12,9,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_eisr_el2", CPENC (3,4,12,11,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("ich_elrsr_el2", CPENC (3,4,12,11,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("ich_hcr_el2", CPENC (3,4,12,11,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr0_el2", CPENC (3,4,12,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr10_el2", CPENC (3,4,12,13,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr11_el2", CPENC (3,4,12,13,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr12_el2", CPENC (3,4,12,13,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr13_el2", CPENC (3,4,12,13,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr14_el2", CPENC (3,4,12,13,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr15_el2", CPENC (3,4,12,13,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr1_el2", CPENC (3,4,12,12,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr2_el2", CPENC (3,4,12,12,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr3_el2", CPENC (3,4,12,12,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr4_el2", CPENC (3,4,12,12,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr5_el2", CPENC (3,4,12,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr6_el2", CPENC (3,4,12,12,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr7_el2", CPENC (3,4,12,12,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr8_el2", CPENC (3,4,12,13,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_lr9_el2", CPENC (3,4,12,13,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_misr_el2", CPENC (3,4,12,11,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("ich_vmcr_el2", CPENC (3,4,12,11,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ich_vtr_el2", CPENC (3,4,12,11,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64afr0_el1", CPENC (3,0,0,5,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64afr1_el1", CPENC (3,0,0,5,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64dfr0_el1", CPENC (3,0,0,5,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64dfr1_el1", CPENC (3,0,0,5,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64isar0_el1", CPENC (3,0,0,6,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64isar1_el1", CPENC (3,0,0,6,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64isar2_el1", CPENC (3,0,0,6,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64mmfr0_el1", CPENC (3,0,0,7,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64mmfr1_el1", CPENC (3,0,0,7,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64mmfr2_el1", CPENC (3,0,0,7,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64pfr0_el1", CPENC (3,0,0,4,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64pfr1_el1", CPENC (3,0,0,4,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_aa64smfr0_el1", CPENC (3,0,0,4,5), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("id_aa64zfr0_el1", CPENC (3,0,0,4,4), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (SVE))) + SYSREG ("id_afr0_el1", CPENC (3,0,0,1,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_dfr0_el1", CPENC (3,0,0,1,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_dfr1_el1", CPENC (3,0,0,3,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar0_el1", CPENC (3,0,0,2,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar1_el1", CPENC (3,0,0,2,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar2_el1", CPENC (3,0,0,2,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar3_el1", CPENC (3,0,0,2,3), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar4_el1", CPENC (3,0,0,2,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar5_el1", CPENC (3,0,0,2,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_isar6_el1", CPENC (3,0,0,2,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_mmfr0_el1", CPENC (3,0,0,1,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_mmfr1_el1", CPENC (3,0,0,1,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_mmfr2_el1", CPENC (3,0,0,1,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_mmfr3_el1", CPENC (3,0,0,1,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_mmfr4_el1", CPENC (3,0,0,2,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_mmfr5_el1", CPENC (3,0,0,3,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_pfr0_el1", CPENC (3,0,0,1,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_pfr1_el1", CPENC (3,0,0,1,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("id_pfr2_el1", CPENC (3,0,0,3,4), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (ID_PFR2))) + SYSREG ("ifsr32_el2", CPENC (3,4,5,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("isr_el1", CPENC (3,0,12,1,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("lorc_el1", CPENC (3,0,10,4,3), F_ARCHEXT, ARCH (1, FEAT (LOR))) + SYSREG ("lorea_el1", CPENC (3,0,10,4,1), F_ARCHEXT, ARCH (1, FEAT (LOR))) + SYSREG ("lorid_el1", CPENC (3,0,10,4,7), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (LOR))) + SYSREG ("lorn_el1", CPENC (3,0,10,4,2), F_ARCHEXT, ARCH (1, FEAT (LOR))) + SYSREG ("lorsa_el1", CPENC (3,0,10,4,0), F_ARCHEXT, ARCH (1, FEAT (LOR))) + SYSREG ("mair_el1", CPENC (3,0,10,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mair_el12", CPENC (3,5,10,2,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("mair_el2", CPENC (3,4,10,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mair_el3", CPENC (3,6,10,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mdccint_el1", CPENC (2,0,0,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mdccsr_el0", CPENC (2,3,0,1,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mdcr_el2", CPENC (3,4,1,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mdcr_el3", CPENC (3,6,1,3,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mdrar_el1", CPENC (2,0,1,0,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mdscr_el1", CPENC (2,0,0,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mecid_a0_el2", CPENC (3,4,10,8,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mecid_a1_el2", CPENC (3,4,10,8,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mecid_p0_el2", CPENC (3,4,10,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mecid_p1_el2", CPENC (3,4,10,8,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mecid_rl_a_el3", CPENC (3,6,10,10,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mecidr_el2", CPENC (3,4,10,8,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mfar_el3", CPENC (3,6,6,0,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("midr_el1", CPENC (3,0,0,0,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mpam0_el1", CPENC (3,0,10,5,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpam1_el1", CPENC (3,0,10,5,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpam1_el12", CPENC (3,5,10,5,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpam2_el2", CPENC (3,4,10,5,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpam3_el3", CPENC (3,6,10,5,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("mpamvpm0_el2", CPENC (3,4,10,6,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm1_el2", CPENC (3,4,10,6,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm2_el2", CPENC (3,4,10,6,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm3_el2", CPENC (3,4,10,6,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm4_el2", CPENC (3,4,10,6,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm5_el2", CPENC (3,4,10,6,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm6_el2", CPENC (3,4,10,6,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpm7_el2", CPENC (3,4,10,6,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpamvpmv_el2", CPENC (3,4,10,4,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("mpidr_el1", CPENC (3,0,0,0,5), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mpuir_el1", CPENC (3,0,0,0,4), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("mpuir_el2", CPENC (3,4,0,0,4), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("mvfr0_el1", CPENC (3,0,0,3,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mvfr1_el1", CPENC (3,0,0,3,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("mvfr2_el1", CPENC (3,0,0,3,2), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("nzcv", CPENC (3,3,4,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("osdlr_el1", CPENC (2,0,1,3,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("osdtrrx_el1", CPENC (2,0,0,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("osdtrtx_el1", CPENC (2,0,0,3,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("oseccr_el1", CPENC (2,0,0,6,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("oslar_el1", CPENC (2,0,1,0,4), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("oslsr_el1", CPENC (2,0,1,1,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("pan", CPENC (3,0,4,2,3), F_ARCHEXT, ARCH (1, FEAT (PAN))) + SYSREG ("par_el1", CPENC (3,0,7,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmbidr_el1", CPENC (3,0,9,10,7), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmblimitr_el1", CPENC (3,0,9,10,0), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmbptr_el1", CPENC (3,0,9,10,1), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmbsr_el1", CPENC (3,0,9,10,3), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmccfiltr_el0", CPENC (3,3,14,15,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmccntr_el0", CPENC (3,3,9,13,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmceid0_el0", CPENC (3,3,9,12,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("pmceid1_el0", CPENC (3,3,9,12,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("pmcntenclr_el0", CPENC (3,3,9,12,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmcntenset_el0", CPENC (3,3,9,12,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmcr_el0", CPENC (3,3,9,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr0_el0", CPENC (3,3,14,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr10_el0", CPENC (3,3,14,9,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr11_el0", CPENC (3,3,14,9,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr12_el0", CPENC (3,3,14,9,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr13_el0", CPENC (3,3,14,9,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr14_el0", CPENC (3,3,14,9,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr15_el0", CPENC (3,3,14,9,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr16_el0", CPENC (3,3,14,10,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr17_el0", CPENC (3,3,14,10,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr18_el0", CPENC (3,3,14,10,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr19_el0", CPENC (3,3,14,10,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr1_el0", CPENC (3,3,14,8,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr20_el0", CPENC (3,3,14,10,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr21_el0", CPENC (3,3,14,10,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr22_el0", CPENC (3,3,14,10,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr23_el0", CPENC (3,3,14,10,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr24_el0", CPENC (3,3,14,11,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr25_el0", CPENC (3,3,14,11,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr26_el0", CPENC (3,3,14,11,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr27_el0", CPENC (3,3,14,11,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr28_el0", CPENC (3,3,14,11,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr29_el0", CPENC (3,3,14,11,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr2_el0", CPENC (3,3,14,8,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr30_el0", CPENC (3,3,14,11,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr3_el0", CPENC (3,3,14,8,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr4_el0", CPENC (3,3,14,8,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr5_el0", CPENC (3,3,14,8,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr6_el0", CPENC (3,3,14,8,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr7_el0", CPENC (3,3,14,8,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr8_el0", CPENC (3,3,14,9,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevcntr9_el0", CPENC (3,3,14,9,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper0_el0", CPENC (3,3,14,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper10_el0", CPENC (3,3,14,13,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper11_el0", CPENC (3,3,14,13,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper12_el0", CPENC (3,3,14,13,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper13_el0", CPENC (3,3,14,13,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper14_el0", CPENC (3,3,14,13,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper15_el0", CPENC (3,3,14,13,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper16_el0", CPENC (3,3,14,14,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper17_el0", CPENC (3,3,14,14,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper18_el0", CPENC (3,3,14,14,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper19_el0", CPENC (3,3,14,14,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper1_el0", CPENC (3,3,14,12,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper20_el0", CPENC (3,3,14,14,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper21_el0", CPENC (3,3,14,14,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper22_el0", CPENC (3,3,14,14,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper23_el0", CPENC (3,3,14,14,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper24_el0", CPENC (3,3,14,15,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper25_el0", CPENC (3,3,14,15,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper26_el0", CPENC (3,3,14,15,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper27_el0", CPENC (3,3,14,15,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper28_el0", CPENC (3,3,14,15,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper29_el0", CPENC (3,3,14,15,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper2_el0", CPENC (3,3,14,12,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper30_el0", CPENC (3,3,14,15,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper3_el0", CPENC (3,3,14,12,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper4_el0", CPENC (3,3,14,12,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper5_el0", CPENC (3,3,14,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper6_el0", CPENC (3,3,14,12,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper7_el0", CPENC (3,3,14,12,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper8_el0", CPENC (3,3,14,13,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmevtyper9_el0", CPENC (3,3,14,13,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmintenclr_el1", CPENC (3,0,9,14,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmintenset_el1", CPENC (3,0,9,14,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmmir_el1", CPENC (3,0,9,14,6), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("pmovsclr_el0", CPENC (3,3,9,12,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmovsset_el0", CPENC (3,3,9,14,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmscr_el12", CPENC (3,5,9,9,0), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmscr_el2", CPENC (3,4,9,9,0), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmscr_el1", CPENC (3,0,9,9,0), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmselr_el0", CPENC (3,3,9,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmsevfr_el1", CPENC (3,0,9,9,5), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmsfcr_el1", CPENC (3,0,9,9,4), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmsicr_el1", CPENC (3,0,9,9,2), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmsidr_el1", CPENC (3,0,9,9,7), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmsirr_el1", CPENC (3,0,9,9,3), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmslatfr_el1", CPENC (3,0,9,9,6), F_ARCHEXT, ARCH (1, FEAT (PROFILE))) + SYSREG ("pmsnevfr_el1", CPENC (3,0,9,9,1), F_ARCHEXT, ARCH (1, FEAT (V8_7A))) + SYSREG ("pmswinc_el0", CPENC (3,3,9,12,4), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("pmuserenr_el0", CPENC (3,3,9,14,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmxevcntr_el0", CPENC (3,3,9,13,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("pmxevtyper_el0", CPENC (3,3,9,13,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("prbar10_el1", CPENC (3,0,6,13,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar10_el2", CPENC (3,4,6,13,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar11_el1", CPENC (3,0,6,13,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar11_el2", CPENC (3,4,6,13,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar12_el1", CPENC (3,0,6,14,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar12_el2", CPENC (3,4,6,14,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar13_el1", CPENC (3,0,6,14,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar13_el2", CPENC (3,4,6,14,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar14_el1", CPENC (3,0,6,15,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar14_el2", CPENC (3,4,6,15,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar15_el1", CPENC (3,0,6,15,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar15_el2", CPENC (3,4,6,15,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar1_el1", CPENC (3,0,6,8,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar1_el2", CPENC (3,4,6,8,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar2_el1", CPENC (3,0,6,9,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar2_el2", CPENC (3,4,6,9,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar3_el1", CPENC (3,0,6,9,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar3_el2", CPENC (3,4,6,9,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar4_el1", CPENC (3,0,6,10,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar4_el2", CPENC (3,4,6,10,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar5_el1", CPENC (3,0,6,10,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar5_el2", CPENC (3,4,6,10,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar6_el1", CPENC (3,0,6,11,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar6_el2", CPENC (3,4,6,11,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar7_el1", CPENC (3,0,6,11,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar7_el2", CPENC (3,4,6,11,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar8_el1", CPENC (3,0,6,12,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar8_el2", CPENC (3,4,6,12,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar9_el1", CPENC (3,0,6,12,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar9_el2", CPENC (3,4,6,12,4), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar_el1", CPENC (3,0,6,8,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prbar_el2", CPENC (3,4,6,8,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prenr_el1", CPENC (3,0,6,1,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prenr_el2", CPENC (3,4,6,1,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar10_el1", CPENC (3,0,6,13,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar10_el2", CPENC (3,4,6,13,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar11_el1", CPENC (3,0,6,13,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar11_el2", CPENC (3,4,6,13,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar12_el1", CPENC (3,0,6,14,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar12_el2", CPENC (3,4,6,14,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar13_el1", CPENC (3,0,6,14,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar13_el2", CPENC (3,4,6,14,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar14_el1", CPENC (3,0,6,15,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar14_el2", CPENC (3,4,6,15,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar15_el1", CPENC (3,0,6,15,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar15_el2", CPENC (3,4,6,15,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar1_el1", CPENC (3,0,6,8,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar1_el2", CPENC (3,4,6,8,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar2_el1", CPENC (3,0,6,9,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar2_el2", CPENC (3,4,6,9,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar3_el1", CPENC (3,0,6,9,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar3_el2", CPENC (3,4,6,9,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar4_el1", CPENC (3,0,6,10,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar4_el2", CPENC (3,4,6,10,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar5_el1", CPENC (3,0,6,10,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar5_el2", CPENC (3,4,6,10,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar6_el1", CPENC (3,0,6,11,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar6_el2", CPENC (3,4,6,11,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar7_el1", CPENC (3,0,6,11,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar7_el2", CPENC (3,4,6,11,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar8_el1", CPENC (3,0,6,12,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar8_el2", CPENC (3,4,6,12,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar9_el1", CPENC (3,0,6,12,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar9_el2", CPENC (3,4,6,12,5), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar_el1", CPENC (3,0,6,8,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prlar_el2", CPENC (3,4,6,8,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prselr_el1", CPENC (3,0,6,2,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("prselr_el2", CPENC (3,4,6,2,1), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("revidr_el1", CPENC (3,0,0,0,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("rgsr_el1", CPENC (3,0,1,0,5), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("rmr_el1", CPENC (3,0,12,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("rmr_el2", CPENC (3,4,12,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("rmr_el3", CPENC (3,6,12,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("rndr", CPENC (3,3,2,4,0), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (RNG))) + SYSREG ("rndrrs", CPENC (3,3,2,4,1), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (RNG))) + SYSREG ("rvbar_el1", CPENC (3,0,12,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("rvbar_el2", CPENC (3,4,12,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("rvbar_el3", CPENC (3,6,12,0,1), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("scr_el3", CPENC (3,6,1,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("sctlr_el1", CPENC (3,0,1,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("sctlr_el12", CPENC (3,5,1,0,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("sctlr_el2", CPENC (3,4,1,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("sctlr_el3", CPENC (3,6,1,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("scxtnum_el0", CPENC (3,3,13,0,7), F_ARCHEXT, ARCH (1, FEAT (SCXTNUM))) + SYSREG ("scxtnum_el1", CPENC (3,0,13,0,7), F_ARCHEXT, ARCH (1, FEAT (SCXTNUM))) + SYSREG ("scxtnum_el12", CPENC (3,5,13,0,7), F_ARCHEXT, ARCH (1, FEAT (SCXTNUM))) + SYSREG ("scxtnum_el2", CPENC (3,4,13,0,7), F_ARCHEXT, ARCH (1, FEAT (SCXTNUM))) + SYSREG ("scxtnum_el3", CPENC (3,6,13,0,7), F_ARCHEXT, ARCH (1, FEAT (SCXTNUM))) + SYSREG ("sder32_el2", CPENC (3,4,1,3,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("sder32_el3", CPENC (3,6,1,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("smcr_el1", CPENC (3,0,1,2,6), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("smcr_el12", CPENC (3,5,1,2,6), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("smcr_el2", CPENC (3,4,1,2,6), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("smcr_el3", CPENC (3,6,1,2,6), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("smidr_el1", CPENC (3,1,0,0,6), F_REG_READ|F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("smpri_el1", CPENC (3,0,1,2,4), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("smprimap_el2", CPENC (3,4,1,2,5), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("sp_el0", CPENC (3,0,4,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("sp_el1", CPENC (3,4,4,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("sp_el2", CPENC (3,6,4,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsel", CPENC (3,0,4,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_abt", CPENC (3,4,4,3,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_el1", CPENC (3,0,4,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_el12", CPENC (3,5,4,0,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("spsr_el2", CPENC (3,4,4,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_el3", CPENC (3,6,4,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_fiq", CPENC (3,4,4,3,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_hyp", CPENC (3,4,4,0,0), F_DEPRECATED, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_irq", CPENC (3,4,4,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_svc", CPENC (3,0,4,0,0), F_DEPRECATED, ARCH (1, FEAT (CORE))) + SYSREG ("spsr_und", CPENC (3,4,4,3,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ssbs", CPENC (3,3,4,2,6), F_ARCHEXT, ARCH (1, FEAT (SSBS))) + SYSREG ("svcr", CPENC (3,3,4,2,2), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("tco", CPENC (3,3,4,2,7), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("tcr_el1", CPENC (3,0,2,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tcr_el12", CPENC (3,5,2,0,2), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("tcr_el2", CPENC (3,4,2,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tcr_el3", CPENC (3,6,2,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("teecr32_el1", CPENC (2,2,0,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("teehbr32_el1", CPENC (2,2,1,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tfsr_el1", CPENC (3,0,5,6,0), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("tfsr_el12", CPENC (3,5,5,6,0), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("tfsr_el2", CPENC (3,4,5,6,0), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("tfsr_el3", CPENC (3,6,5,6,0), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("tfsre0_el1", CPENC (3,0,5,6,1), F_ARCHEXT, ARCH (1, FEAT (MEMTAG))) + SYSREG ("tpidr2_el0", CPENC (3,3,13,0,5), F_ARCHEXT, ARCH (1, FEAT (SME))) + SYSREG ("tpidr_el0", CPENC (3,3,13,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tpidr_el1", CPENC (3,0,13,0,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tpidr_el2", CPENC (3,4,13,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tpidr_el3", CPENC (3,6,13,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("tpidrro_el0", CPENC (3,3,13,0,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trbbaser_el1", CPENC (3,0,9,11,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trbidr_el1", CPENC (3,0,9,11,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trblimitr_el1", CPENC (3,0,9,11,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trbmar_el1", CPENC (3,0,9,11,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trbptr_el1", CPENC (3,0,9,11,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trbsr_el1", CPENC (3,0,9,11,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trbtrg_el1", CPENC (3,0,9,11,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr0", CPENC (2,1,2,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr1", CPENC (2,1,2,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr10", CPENC (2,1,2,4,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr11", CPENC (2,1,2,6,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr12", CPENC (2,1,2,8,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr13", CPENC (2,1,2,10,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr14", CPENC (2,1,2,12,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr15", CPENC (2,1,2,14,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr2", CPENC (2,1,2,4,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr3", CPENC (2,1,2,6,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr4", CPENC (2,1,2,8,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr5", CPENC (2,1,2,10,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr6", CPENC (2,1,2,12,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr7", CPENC (2,1,2,14,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr8", CPENC (2,1,2,0,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacatr9", CPENC (2,1,2,2,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr0", CPENC (2,1,2,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr1", CPENC (2,1,2,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr10", CPENC (2,1,2,4,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr11", CPENC (2,1,2,6,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr12", CPENC (2,1,2,8,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr13", CPENC (2,1,2,10,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr14", CPENC (2,1,2,12,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr15", CPENC (2,1,2,14,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr2", CPENC (2,1,2,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr3", CPENC (2,1,2,6,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr4", CPENC (2,1,2,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr5", CPENC (2,1,2,10,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr6", CPENC (2,1,2,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr7", CPENC (2,1,2,14,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr8", CPENC (2,1,2,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcacvr9", CPENC (2,1,2,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcauthstatus", CPENC (2,1,7,14,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcauxctlr", CPENC (2,1,0,6,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcbbctlr", CPENC (2,1,0,15,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcccctlr", CPENC (2,1,0,14,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcctlr0", CPENC (2,1,3,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcctlr1", CPENC (2,1,3,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr0", CPENC (2,1,3,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr1", CPENC (2,1,3,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr2", CPENC (2,1,3,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr3", CPENC (2,1,3,6,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr4", CPENC (2,1,3,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr5", CPENC (2,1,3,10,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr6", CPENC (2,1,3,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidcvr7", CPENC (2,1,3,14,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccidr0", CPENC (2,1,7,12,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trccidr1", CPENC (2,1,7,13,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trccidr2", CPENC (2,1,7,14,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trccidr3", CPENC (2,1,7,15,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcclaimclr", CPENC (2,1,7,9,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcclaimset", CPENC (2,1,7,8,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntctlr0", CPENC (2,1,0,4,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntctlr1", CPENC (2,1,0,5,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntctlr2", CPENC (2,1,0,6,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntctlr3", CPENC (2,1,0,7,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntrldvr0", CPENC (2,1,0,0,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntrldvr1", CPENC (2,1,0,1,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntrldvr2", CPENC (2,1,0,2,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntrldvr3", CPENC (2,1,0,3,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntvr0", CPENC (2,1,0,8,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntvr1", CPENC (2,1,0,9,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntvr2", CPENC (2,1,0,10,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trccntvr3", CPENC (2,1,0,11,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcconfigr", CPENC (2,1,0,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdevaff0", CPENC (2,1,7,10,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcdevaff1", CPENC (2,1,7,11,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcdevarch", CPENC (2,1,7,15,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcdevid", CPENC (2,1,7,2,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcdevtype", CPENC (2,1,7,3,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr0", CPENC (2,1,2,0,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr1", CPENC (2,1,2,4,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr2", CPENC (2,1,2,8,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr3", CPENC (2,1,2,12,6), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr4", CPENC (2,1,2,0,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr5", CPENC (2,1,2,4,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr6", CPENC (2,1,2,8,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcmr7", CPENC (2,1,2,12,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr0", CPENC (2,1,2,0,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr1", CPENC (2,1,2,4,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr2", CPENC (2,1,2,8,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr3", CPENC (2,1,2,12,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr4", CPENC (2,1,2,0,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr5", CPENC (2,1,2,4,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr6", CPENC (2,1,2,8,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcdvcvr7", CPENC (2,1,2,12,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trceventctl0r", CPENC (2,1,0,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trceventctl1r", CPENC (2,1,0,9,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcextinselr", CPENC (2,1,0,8,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcextinselr0", CPENC (2,1,0,8,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcextinselr1", CPENC (2,1,0,9,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcextinselr2", CPENC (2,1,0,10,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcextinselr3", CPENC (2,1,0,11,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr0", CPENC (2,1,0,8,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr1", CPENC (2,1,0,9,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr10", CPENC (2,1,0,2,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr11", CPENC (2,1,0,3,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr12", CPENC (2,1,0,4,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr13", CPENC (2,1,0,5,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr2", CPENC (2,1,0,10,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr3", CPENC (2,1,0,11,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr4", CPENC (2,1,0,12,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr5", CPENC (2,1,0,13,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr6", CPENC (2,1,0,14,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr7", CPENC (2,1,0,15,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr8", CPENC (2,1,0,0,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcidr9", CPENC (2,1,0,1,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec0", CPENC (2,1,0,0,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec1", CPENC (2,1,0,1,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec2", CPENC (2,1,0,2,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec3", CPENC (2,1,0,3,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec4", CPENC (2,1,0,4,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec5", CPENC (2,1,0,5,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec6", CPENC (2,1,0,6,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcimspec7", CPENC (2,1,0,7,7), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcitctrl", CPENC (2,1,7,0,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trclar", CPENC (2,1,7,12,6), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("trclsr", CPENC (2,1,7,13,6), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcoslar", CPENC (2,1,1,0,4), F_REG_WRITE, ARCH (1, FEAT (CORE))) + SYSREG ("trcoslsr", CPENC (2,1,1,1,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpdcr", CPENC (2,1,1,4,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcpdsr", CPENC (2,1,1,5,4), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr0", CPENC (2,1,7,8,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr1", CPENC (2,1,7,9,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr2", CPENC (2,1,7,10,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr3", CPENC (2,1,7,11,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr4", CPENC (2,1,7,4,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr5", CPENC (2,1,7,5,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr6", CPENC (2,1,7,6,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcpidr7", CPENC (2,1,7,7,7), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcprgctlr", CPENC (2,1,0,1,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcprocselr", CPENC (2,1,0,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcqctlr", CPENC (2,1,0,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr10", CPENC (2,1,1,10,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr11", CPENC (2,1,1,11,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr12", CPENC (2,1,1,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr13", CPENC (2,1,1,13,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr14", CPENC (2,1,1,14,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr15", CPENC (2,1,1,15,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr16", CPENC (2,1,1,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr17", CPENC (2,1,1,1,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr18", CPENC (2,1,1,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr19", CPENC (2,1,1,3,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr2", CPENC (2,1,1,2,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr20", CPENC (2,1,1,4,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr21", CPENC (2,1,1,5,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr22", CPENC (2,1,1,6,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr23", CPENC (2,1,1,7,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr24", CPENC (2,1,1,8,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr25", CPENC (2,1,1,9,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr26", CPENC (2,1,1,10,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr27", CPENC (2,1,1,11,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr28", CPENC (2,1,1,12,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr29", CPENC (2,1,1,13,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr3", CPENC (2,1,1,3,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr30", CPENC (2,1,1,14,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr31", CPENC (2,1,1,15,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr4", CPENC (2,1,1,4,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr5", CPENC (2,1,1,5,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr6", CPENC (2,1,1,6,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr7", CPENC (2,1,1,7,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr8", CPENC (2,1,1,8,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsctlr9", CPENC (2,1,1,9,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcrsr", CPENC (2,1,0,10,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcseqevr0", CPENC (2,1,0,0,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcseqevr1", CPENC (2,1,0,1,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcseqevr2", CPENC (2,1,0,2,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcseqrstevr", CPENC (2,1,0,6,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcseqstr", CPENC (2,1,0,7,4), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr0", CPENC (2,1,1,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr1", CPENC (2,1,1,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr2", CPENC (2,1,1,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr3", CPENC (2,1,1,3,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr4", CPENC (2,1,1,4,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr5", CPENC (2,1,1,5,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr6", CPENC (2,1,1,6,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcssccr7", CPENC (2,1,1,7,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr0", CPENC (2,1,1,8,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr1", CPENC (2,1,1,9,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr2", CPENC (2,1,1,10,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr3", CPENC (2,1,1,11,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr4", CPENC (2,1,1,12,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr5", CPENC (2,1,1,13,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr6", CPENC (2,1,1,14,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsscsr7", CPENC (2,1,1,15,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr0", CPENC (2,1,1,0,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr1", CPENC (2,1,1,1,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr2", CPENC (2,1,1,2,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr3", CPENC (2,1,1,3,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr4", CPENC (2,1,1,4,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr5", CPENC (2,1,1,5,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr6", CPENC (2,1,1,6,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcsspcicr7", CPENC (2,1,1,7,3), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcstallctlr", CPENC (2,1,0,11,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcstatr", CPENC (2,1,0,3,0), F_REG_READ, ARCH (1, FEAT (CORE))) + SYSREG ("trcsyncpr", CPENC (2,1,0,13,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trctraceidr", CPENC (2,1,0,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trctsctlr", CPENC (2,1,0,12,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvdarcctlr", CPENC (2,1,0,10,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvdctlr", CPENC (2,1,0,8,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvdsacctlr", CPENC (2,1,0,9,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvictlr", CPENC (2,1,0,0,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcviiectlr", CPENC (2,1,0,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvipcssctlr", CPENC (2,1,0,3,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvissctlr", CPENC (2,1,0,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcctlr0", CPENC (2,1,3,2,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcctlr1", CPENC (2,1,3,3,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr0", CPENC (2,1,3,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr1", CPENC (2,1,3,2,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr2", CPENC (2,1,3,4,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr3", CPENC (2,1,3,6,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr4", CPENC (2,1,3,8,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr5", CPENC (2,1,3,10,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr6", CPENC (2,1,3,12,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trcvmidcvr7", CPENC (2,1,3,14,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("trfcr_el1", CPENC (3,0,1,2,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("trfcr_el12", CPENC (3,5,1,2,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("trfcr_el2", CPENC (3,4,1,2,1), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("ttbr0_el1", CPENC (3,0,2,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ttbr0_el12", CPENC (3,5,2,0,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("ttbr0_el2", CPENC (3,4,2,0,0), F_ARCHEXT, ARCH (1, FEAT (V8A))) + SYSREG ("ttbr0_el3", CPENC (3,6,2,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ttbr1_el1", CPENC (3,0,2,0,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("ttbr1_el12", CPENC (3,5,2,0,1), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("ttbr1_el2", CPENC (3,4,2,0,1), F_ARCHEXT, ARCH (2, FEAT (V8A), FEAT (V8_1A))) + SYSREG ("uao", CPENC (3,0,4,2,4), F_ARCHEXT, ARCH (1, FEAT (V8_2A))) + SYSREG ("vbar_el1", CPENC (3,0,12,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vbar_el12", CPENC (3,5,12,0,0), F_ARCHEXT, ARCH (1, FEAT (V8_1A))) + SYSREG ("vbar_el2", CPENC (3,4,12,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vbar_el3", CPENC (3,6,12,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vdisr_el2", CPENC (3,4,12,1,1), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("vmecid_a_el2", CPENC (3,4,10,9,1), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vmecid_p_el2", CPENC (3,4,10,9,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vmpidr_el2", CPENC (3,4,0,0,5), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vncr_el2", CPENC (3,4,2,2,0), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("vpidr_el2", CPENC (3,4,0,0,0), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vsctlr_el2", CPENC (3,4,2,0,0), F_ARCHEXT, ARCH (1, FEAT (V8R))) + SYSREG ("vsesr_el2", CPENC (3,4,5,2,3), F_ARCHEXT, ARCH (1, FEAT (RAS))) + SYSREG ("vstcr_el2", CPENC (3,4,2,6,2), F_ARCHEXT, ARCH (1, FEAT (V8_4A))) + SYSREG ("vsttbr_el2", CPENC (3,4,2,6,0), F_ARCHEXT, ARCH (2, FEAT (V8A), FEAT (V8_4A))) + SYSREG ("vtcr_el2", CPENC (3,4,2,1,2), 0, ARCH (1, FEAT (CORE))) + SYSREG ("vttbr_el2", CPENC (3,4,2,1,0), F_ARCHEXT, ARCH (1, FEAT (V8A))) + SYSREG ("zcr_el1", CPENC (3,0,1,2,0), F_ARCHEXT, ARCH (1, FEAT (SVE))) + SYSREG ("zcr_el12", CPENC (3,5,1,2,0), F_ARCHEXT, ARCH (1, FEAT (SVE))) + SYSREG ("zcr_el2", CPENC (3,4,1,2,0), F_ARCHEXT, ARCH (1, FEAT (SVE))) + SYSREG ("zcr_el3", CPENC (3,6,1,2,0), F_ARCHEXT, ARCH (1, FEAT (SVE)))