[1/5] x86: re-work EVEX-z-without-masking check
Checks
Commit Message
Rather than corrupting disassmbly altogether, flag EVEX.z set as bad
when masking isn't in effect in the first place at the time the
destination operand is actually processed.
@@ -15,8 +15,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 62 f2 55 1f 3b f4 vpminud \{rn-bad\},%zmm4,%zmm5,%zmm6\{%k7\}
[ ]*[a-f0-9]+: 62 f2 7e 48 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)
[ ]*[a-f0-9]+: 62 f2 7e 58 31 72 7f vpmovdb %zmm6,0x7f0\(%edx\)\{bad\}
-[ ]*[a-f0-9]+: 62 f1 7c 88 58 \(bad\)
-[ ]*[a-f0-9]+: c3 ret
+[ ]*[a-f0-9]+: 62 f1 7c 88 58 c3 (\{evex\} )?vaddps %xmm3,%xmm0,%xmm0\{bad\}
[ ]*[a-f0-9]+: 62 f2 7d 4f 92 01 vgatherdps \(bad\),%zmm0\{%k7\}
[ ]*[a-f0-9]+: 67 62 f2 7d 4f 92 01 addr16 vgatherdps \(bad\),%zmm0\{%k7\}
[ ]*[a-f0-9]+: 62 f2 7d cf 92 04 08 vgatherdps \(%eax,%zmm1(,1)?\),%zmm0\{%k7\}\{z\}/\(bad\)
@@ -9905,9 +9905,15 @@ print_insn (bfd_vma pc, disassemble_info
oappend (&ins, "{");
oappend_register (&ins, reg_name);
oappend (&ins, "}");
+
+ if (ins.vex.zeroing)
+ oappend (&ins, "{z}");
+ }
+ else if (ins.vex.zeroing)
+ {
+ oappend (&ins, "{bad}");
+ continue;
}
- if (ins.vex.zeroing)
- oappend (&ins, "{z}");
/* S/G insns require a mask and don't allow
zeroing-masking. */
@@ -9982,14 +9988,6 @@ print_insn (bfd_vma pc, disassemble_info
{
i386_dis_printf (info, dis_style_text, "(bad)");
ret = ins.end_codep - priv.the_buffer;
- goto out;
- }
-
- /* If EVEX.z is set, there must be an actual mask register in use. */
- if (ins.vex.zeroing && ins.vex.mask_register_specifier == 0)
- {
- i386_dis_printf (info, dis_style_text, "(bad)");
- ret = ins.end_codep - priv.the_buffer;
goto out;
}