diff mbox series

[14/40] sim/frv: Add explicit casts

Message ID e1baa1be3601612266dc6ae0bdde8426ff2a42c8.1666257885.git.research_trasio@irq.a4lg.com
State Accepted
Headers
Series sim+gdb: Suppress warnings if built with Clang (big batch 1) |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Tsukasa OI Oct. 20, 2022, 9:26 a.m. UTC 
  Clang generates a warning if there is an enum value with a mismatching type
without an explicit cast ("-Wenum-conversion").
On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

This commit adds explicit casts on the FR-V instruction decoder.

Note:
This commit touches CGEN-generated files directly.
Modifying CGEN is the best way to prevent this issue from happening again
but there is another known regression in CGEN to resolve.
---
 sim/frv/decode.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)
diff mbox series

Patch

diff --git a/sim/frv/decode.c b/sim/frv/decode.c
index 307b593e148..9c4a97833ad 100644
--- a/sim/frv/decode.c
+++ b/sim/frv/decode.c
@@ -39,12 +39,12 @@  static IDESC frvbf_insn_data[FRVBF_INSN__MAX];
 
 static const struct insn_sem frvbf_insn_sem[] =
 {
-  { VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY },
-  { VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_AFTER, FRVBF_INSN_X_AFTER, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEFORE, FRVBF_INSN_X_BEFORE, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CTI_CHAIN, FRVBF_INSN_X_CTI_CHAIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_CHAIN, FRVBF_INSN_X_CHAIN, FRVBF_SFMT_EMPTY },
+  { (CGEN_INSN_TYPE) VIRTUAL_INSN_X_BEGIN, FRVBF_INSN_X_BEGIN, FRVBF_SFMT_EMPTY },
   { FRV_INSN_ADD, FRVBF_INSN_ADD, FRVBF_SFMT_ADD },
   { FRV_INSN_SUB, FRVBF_INSN_SUB, FRVBF_SFMT_ADD },
   { FRV_INSN_AND, FRVBF_INSN_AND, FRVBF_SFMT_ADD },
@@ -792,7 +792,7 @@  static const struct insn_sem frvbf_insn_sem[] =
 
 static const struct insn_sem frvbf_insn_sem_invalid =
 {
-  VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY
+  (CGEN_INSN_TYPE) VIRTUAL_INSN_X_INVALID, FRVBF_INSN_X_INVALID, FRVBF_SFMT_EMPTY
 };
 
 /* Initialize an IDESC from the compile-time computable parts.  */