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[8.43.85.97]) by mx.google.com with ESMTPS id hr22-20020a1709073f9600b00787b9cd2fe3si9927656ejc.844.2022.11.14.20.33.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 20:33:53 -0800 (PST) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) client-ip=8.43.85.97; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=vRpBA8+i; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 8.43.85.97 as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 5FBB13830B15 for ; Tue, 15 Nov 2022 04:33:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5FBB13830B15 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1668486801; bh=gXdsvKCB4R4ep1ZbkNFHHAb3m0Zce9OzoOSd+tYhdu8=; h=To:Cc:Subject:Date:In-Reply-To:References:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=vRpBA8+iV6UgA1LvK3srXuXVJg7faZtkjDzhcEuDy4qCm4ysncd6ywVpSo2xPWzY4 QasOTbHML7e5az4aRhzQm6VhZ1TBK1PqxJFrf3ho1gI2yhfyzTTWrthZ6T0k2sUWZ6 aElxsjc2fZ8+sNMguYVn82F3TvHj8cqxpJB5nrDo= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 199723834692 for ; Tue, 15 Nov 2022 04:32:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 199723834692 Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id 5B2A9300089; Tue, 15 Nov 2022 04:32:27 +0000 (UTC) To: Tsukasa OI , Nelson Chu , Kito Cheng , Palmer Dabbelt Cc: binutils@sourceware.org Subject: [PATCH v3 5/8] RISC-V: Complete tidying up with SCALL and SBREAK Date: Tue, 15 Nov 2022 04:31:26 +0000 Message-Id: In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tsukasa OI via Binutils From: Tsukasa OI Reply-To: Tsukasa OI Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1747122134306333001?= X-GMAIL-MSGID: =?utf-8?q?1749535250041869185?= This commit removes SCALL and SBREAK-related references except alias opcode entries because they are renamed to ECALL and EBREAK (respectively) in the RISC-V ISA, version 2.1. Note that related GDBsim part is addressed on the commit b9593cb70533 ("sim/riscv: Complete tidying up with SBREAK"). include/ChangeLog: * opcode/riscv-opc.h (MATCH_SCALL, MASK_SCALL, MATCH_SBREAK, MASK_SBREAK): Remove. Also remove corresponding DECLARE_INSN declarations. opcodes/ChangeLog: * riscv-opc.c (riscv_opcodes): Use "ebreak" instead of "sbreak". --- include/opcode/riscv-opc.h | 6 ------ opcodes/riscv-opc.c | 4 ++-- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index a30a21fe596..949f04d49e0 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -49,10 +49,6 @@ #define MASK_RDTIMEH 0xfffff07f #define MATCH_RDINSTRETH 0xc8202073 #define MASK_RDINSTRETH 0xfffff07f -#define MATCH_SCALL 0x73 -#define MASK_SCALL 0xffffffff -#define MATCH_SBREAK 0x100073 -#define MASK_SBREAK 0xffffffff #define MATCH_BEQ 0x63 #define MASK_BEQ 0x707f #define MATCH_BNE 0x1063 @@ -2727,8 +2723,6 @@ DECLARE_INSN(rdinstret, MATCH_RDINSTRET, MASK_RDINSTRET) DECLARE_INSN(rdcycleh, MATCH_RDCYCLEH, MASK_RDCYCLEH) DECLARE_INSN(rdtimeh, MATCH_RDTIMEH, MASK_RDTIMEH) DECLARE_INSN(rdinstreth, MATCH_RDINSTRETH, MASK_RDINSTRETH) -DECLARE_INSN(scall, MATCH_SCALL, MASK_SCALL) -DECLARE_INSN(sbreak, MATCH_SBREAK, MASK_SBREAK) DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ) DECLARE_INSN(bne, MATCH_BNE, MASK_BNE) DECLARE_INSN(blt, MATCH_BLT, MASK_BLT) diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index e01fb49564b..9593964f023 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -474,8 +474,8 @@ const struct riscv_opcode riscv_opcodes[] = {"rdcycleh", 32, INSN_CLASS_I, "d", MATCH_RDCYCLEH, MASK_RDCYCLEH, match_opcode, INSN_ALIAS }, {"rdinstreth", 32, INSN_CLASS_I, "d", MATCH_RDINSTRETH, MASK_RDINSTRETH, match_opcode, INSN_ALIAS }, {"rdtimeh", 32, INSN_CLASS_I, "d", MATCH_RDTIMEH, MASK_RDTIMEH, match_opcode, INSN_ALIAS }, -{"ecall", 0, INSN_CLASS_I, "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, -{"scall", 0, INSN_CLASS_I, "", MATCH_SCALL, MASK_SCALL, match_opcode, 0 }, +{"ecall", 0, INSN_CLASS_I, "", MATCH_ECALL, MASK_ECALL, match_opcode, 0 }, +{"scall", 0, INSN_CLASS_I, "", MATCH_ECALL, MASK_ECALL, match_opcode, 0 }, {"xor", 0, INSN_CLASS_I, "d,s,j", MATCH_XORI, MASK_XORI, match_opcode, INSN_ALIAS }, {"xor", 0, INSN_CLASS_C, "Cs,Cw,Ct", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS }, {"xor", 0, INSN_CLASS_C, "Cs,Ct,Cw", MATCH_C_XOR, MASK_C_XOR, match_opcode, INSN_ALIAS },