diff mbox series

[2/3] x86: consolidate VAES tests

Message ID a032d61c-63a0-23d1-331f-619a2b8bbde3@suse.com
State Accepted
Headers
Series x86: optionally emit {evex} prefix / testsuite tidying |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Jan Beulich Oct. 20, 2022, 10:26 a.m. UTC 
  There's little point in having Intel syntax disassembler tests when the
purpose of a test is assembler functionality: Drop all
*avx512*_vaes-wig1-intel.

For *avx512*_vaes-wig1 share source with *avx512*_vaes. This in
particular makes sure that the 32-bit VL test actually tests any EVEX
encodings in the first place.

Finally put in place similar tests for -mvexwig=1.
diff mbox series

Patch

--- a/gas/testsuite/gas/i386/avx512f_vaes-wig.s
+++ /dev/null
@@ -1,37 +0,0 @@ 
-# Check 32bit AVX512F,VAES WIG instructions
-
-	.allow_index_reg
-	.text
-_start:
-	vaesdec	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
-	vaesdec	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
-	vaesdec	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-
-	vaesdeclast	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
-	vaesdeclast	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
-	vaesdeclast	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-
-	vaesenc	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
-	vaesenc	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
-	vaesenc	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-
-	vaesenclast	%zmm4, %zmm5, %zmm6	 # AVX512F,VAES
-	vaesenclast	-123456(%esp,%esi,8), %zmm5, %zmm6	 # AVX512F,VAES
-	vaesenclast	8128(%edx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-
-	.intel_syntax noprefix
-	vaesdec	zmm6, zmm5, zmm4	 # AVX512F,VAES
-	vaesdec	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
-	vaesdec	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
-
-	vaesdeclast	zmm6, zmm5, zmm4	 # AVX512F,VAES
-	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
-	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
-
-	vaesenc	zmm6, zmm5, zmm4	 # AVX512F,VAES
-	vaesenc	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
-	vaesenc	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
-
-	vaesenclast	zmm6, zmm5, zmm4	 # AVX512F,VAES
-	vaesenclast	zmm6, zmm5, ZMMWORD PTR [esp+esi*8-123456]	 # AVX512F,VAES
-	vaesenclast	zmm6, zmm5, ZMMWORD PTR [edx+8128]	 # AVX512F,VAES Disp8
--- a/gas/testsuite/gas/i386/avx512f_vaes-wig1.d
+++ b/gas/testsuite/gas/i386/avx512f_vaes-wig1.d
@@ -1,7 +1,7 @@ 
 #as: -mevexwig=1
 #objdump: -dw
 #name: i386 AVX512F/VAES wig insns
-#source: avx512f_vaes-wig.s
+#source: avx512f_vaes.s
 
 .*: +file format .*
 
--- a/gas/testsuite/gas/i386/avx512f_vaes-wig1-intel.d
+++ /dev/null
@@ -1,36 +0,0 @@ 
-#as: -mevexwig=1
-#objdump: -dw -Mintel
-#name: i386 AVX512F/VAES wig insns (Intel disassembly)
-#source: avx512f_vaes-wig.s
-
-.*: +file format .*
-
-
-Disassembly of section \.text:
-
-00000000 <_start>:
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de f4[ 	]*vaesdec zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de 72 7f[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df f4[ 	]*vaesdeclast zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df 72 7f[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc f4[ 	]*vaesenc zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc 72 7f[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd f4[ 	]*vaesenclast zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd 72 7f[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de f4[ 	]*vaesdec zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de b4 f4 c0 1d fe ff[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de 72 7f[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df f4[ 	]*vaesdeclast zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df 72 7f[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc f4[ 	]*vaesenc zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc b4 f4 c0 1d fe ff[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc 72 7f[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd f4[ 	]*vaesenclast zmm6,zmm5,zmm4
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd 72 7f[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[edx\+0x1fc0\]
-#pass
--- a/gas/testsuite/gas/i386/avx512vl_vaes-wig.s
+++ /dev/null
@@ -1,45 +0,0 @@ 
-# Check 32bit AVX512VL,VAES WIG instructions
-
-	.allow_index_reg
-	.text
-_start:
-	vaesdec	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesdec	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesdec	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
-	vaesdec	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
-
-	vaesdeclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesdeclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesdeclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
-	vaesdeclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
-
-	vaesenc	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesenc	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesenc	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
-	vaesenc	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
-
-	vaesenclast	%xmm4, %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesenclast	-123456(%esp,%esi,8), %xmm5, %xmm6	 # AVX512VL,VAES
-	vaesenclast	%ymm4, %ymm5, %ymm6	 # AVX512VL,VAES
-	vaesenclast	-123456(%esp,%esi,8), %ymm5, %ymm6	 # AVX512VL,VAES
-
-	.intel_syntax noprefix
-	vaesdec	xmm6, xmm5, xmm4	 # AVX512VL,VAES
-	vaesdec	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-	vaesdec	ymm6, ymm5, ymm4	 # AVX512VL,VAES
-	vaesdec	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-
-	vaesdeclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
-	vaesdeclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-	vaesdeclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
-	vaesdeclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-
-	vaesenc	xmm6, xmm5, xmm4	 # AVX512VL,VAES
-	vaesenc	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-	vaesenc	ymm6, ymm5, ymm4	 # AVX512VL,VAES
-	vaesenc	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-
-	vaesenclast	xmm6, xmm5, xmm4	 # AVX512VL,VAES
-	vaesenclast	xmm6, xmm5, XMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
-	vaesenclast	ymm6, ymm5, ymm4	 # AVX512VL,VAES
-	vaesenclast	ymm6, ymm5, YMMWORD PTR [esp+esi*8-123456]	 # AVX512VL,VAES
--- a/gas/testsuite/gas/i386/avx512vl_vaes-wig1.d
+++ b/gas/testsuite/gas/i386/avx512vl_vaes-wig1.d
@@ -1,7 +1,7 @@ 
 #as: -mevexwig=1
 #objdump: -dw
 #name: i386 AVX512VL/VAES wig insns
-#source: avx512vl_vaes-wig.s
+#source: avx512vl_vaes.s
 
 .*: +file format .*
 
@@ -11,34 +11,98 @@  Disassembly of section \.text:
 00000000 <_start>:
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 de f4[ 	]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 de 72 7f[ 	]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 de f4[ 	]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 de 72 7f[ 	]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 df f4[ 	]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 df 72 7f[ 	]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 df f4[ 	]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 df 72 7f[ 	]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dc f4[ 	]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dc 72 7f[ 	]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dc f4[ 	]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dc 72 7f[ 	]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dd f4[ 	]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dd 72 7f[ 	]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dd f4[ 	]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dd 72 7f[ 	]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 de f4[ 	]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 de 72 7f[ 	]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 de f4[ 	]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 de 72 7f[ 	]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 df f4[ 	]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 df 72 7f[ 	]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 df f4[ 	]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 df 72 7f[ 	]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dc f4[ 	]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dc 72 7f[ 	]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dc f4[ 	]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dc 72 7f[ 	]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dd f4[ 	]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 08 dd 72 7f[ 	]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dd f4[ 	]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 28 dd 72 7f[ 	]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
 #pass
--- a/gas/testsuite/gas/i386/avx512vl_vaes-wig1-intel.d
+++ /dev/null
@@ -1,44 +0,0 @@ 
-#as: -mevexwig=1
-#objdump: -dw -Mintel
-#name: i386 AVX512VL/VAES wig insns (Intel disassembly)
-#source: avx512vl_vaes-wig.s
-
-.*: +file format .*
-
-
-Disassembly of section \.text:
-
-00000000 <_start>:
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de f4[ 	]*vaesdec xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 de b4 f4 c0 1d fe ff[ 	]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de f4[ 	]*vaesdec ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 de b4 f4 c0 1d fe ff[ 	]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df f4[ 	]*vaesdeclast xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df f4[ 	]*vaesdeclast ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc f4[ 	]*vaesenc xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dc b4 f4 c0 1d fe ff[ 	]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc f4[ 	]*vaesenc ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dc b4 f4 c0 1d fe ff[ 	]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd f4[ 	]*vaesenclast xmm6,xmm5,xmm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 51 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\]
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd f4[ 	]*vaesenclast ymm6,ymm5,ymm4
-[ 	]*[a-f0-9]+:[ 	]*c4 e2 55 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\]
-#pass
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -452,11 +452,9 @@  if [gas_32_check] then {
     run_dump_test "avx512f_vaes"
     run_dump_test "avx512f_vaes-intel"
     run_dump_test "avx512f_vaes-wig1"
-    run_dump_test "avx512f_vaes-wig1-intel"
     run_dump_test "avx512vl_vaes"
     run_dump_test "avx512vl_vaes-intel"
     run_dump_test "avx512vl_vaes-wig1"
-    run_dump_test "avx512vl_vaes-wig1-intel"
     run_dump_test "avx512f_vpclmulqdq"
     run_dump_test "avx512f_vpclmulqdq-intel"
     run_dump_test "avx512f_vpclmulqdq-wig1"
@@ -495,6 +493,7 @@  if [gas_32_check] then {
     run_dump_test "gfni-intel"
     run_dump_test "vaes"
     run_dump_test "vaes-intel"
+    run_dump_test "vaes-wig1"
     run_dump_test "vpclmulqdq"
     run_dump_test "vpclmulqdq-intel"
     run_dump_test "wbnoinvd"
@@ -1119,11 +1118,9 @@  if [gas_64_check] then {
     run_dump_test "x86-64-avx512f_vaes"
     run_dump_test "x86-64-avx512f_vaes-intel"
     run_dump_test "x86-64-avx512f_vaes-wig1"
-    run_dump_test "x86-64-avx512f_vaes-wig1-intel"
     run_dump_test "x86-64-avx512vl_vaes"
     run_dump_test "x86-64-avx512vl_vaes-intel"
     run_dump_test "x86-64-avx512vl_vaes-wig1"
-    run_dump_test "x86-64-avx512vl_vaes-wig1-intel"
     run_dump_test "x86-64-avx512f_vpclmulqdq"
     run_dump_test "x86-64-avx512f_vpclmulqdq-intel"
     run_dump_test "x86-64-avx512f_vpclmulqdq-wig1"
@@ -1157,6 +1154,7 @@  if [gas_64_check] then {
     run_dump_test "x86-64-gfni-intel"
     run_dump_test "x86-64-vaes"
     run_dump_test "x86-64-vaes-intel"
+    run_dump_test "x86-64-vaes-wig1"
     run_dump_test "x86-64-vpclmulqdq"
     run_dump_test "x86-64-vpclmulqdq-intel"
     run_dump_test "x86-64-wbnoinvd"
--- /dev/null
+++ b/gas/testsuite/gas/i386/vaes-wig1.d
@@ -0,0 +1,108 @@ 
+#as: -mvexwig=1
+#objdump: -dw
+#name: i386 AVX/VAES wig insns
+#source: avx512vl_vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+00000000 <_start>:
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de 72 7f[ 	]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de 72 7f[ 	]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df 72 7f[ 	]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df 72 7f[ 	]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc 72 7f[ 	]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc 72 7f[ 	]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd 72 7f[ 	]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd 72 7f[ 	]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de f4[ 	]*vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 de b2 f0 07 00 00[ 	]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de f4[ 	]*vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b4 f4 c0 1d fe ff[ 	]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 de b2 e0 0f 00 00[ 	]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df f4[ 	]*vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 df b2 f0 07 00 00[ 	]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df f4[ 	]*vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b4 f4 c0 1d fe ff[ 	]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 df b2 e0 0f 00 00[ 	]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc f4[ 	]*vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dc b2 f0 07 00 00[ 	]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc f4[ 	]*vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b4 f4 c0 1d fe ff[ 	]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dc b2 e0 0f 00 00[ 	]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd f4[ 	]*vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d1 dd b2 f0 07 00 00[ 	]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd f4[ 	]*vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b4 f4 c0 1d fe ff[ 	]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*c4 e2 d5 dd b2 e0 0f 00 00[ 	]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de f4[ 	]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 de 72 7f[ 	]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de f4[ 	]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 de 72 7f[ 	]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df f4[ 	]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 df 72 7f[ 	]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df f4[ 	]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 df 72 7f[ 	]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc f4[ 	]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dc 72 7f[ 	]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc f4[ 	]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dc 72 7f[ 	]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd f4[ 	]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 08 dd 72 7f[ 	]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd f4[ 	]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ 	]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ 	]*[a-f0-9]+:[ 	]*62 f2 55 28 dd 72 7f[ 	]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+#pass
--- a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig.s
+++ /dev/null
@@ -1,31 +0,0 @@ 
-# Check 64bit AVX512F,VAES WIG instructions
-
-	.allow_index_reg
-	.text
-_start:
-	vaesdec	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
-	vaesdec	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
-	vaesdec	8128(%rdx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-	vaesdeclast	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
-	vaesdeclast	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
-	vaesdeclast	8128(%rdx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-	vaesenc	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
-	vaesenc	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
-	vaesenc	8128(%rdx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-	vaesenclast	%zmm28, %zmm29, %zmm30	 # AVX512F,VAES
-	vaesenclast	0x123(%rax,%r14,8), %zmm29, %zmm30	 # AVX512F,VAES
-	vaesenclast	8128(%rdx), %zmm5, %zmm6	 # AVX512F,VAES Disp8
-
-	.intel_syntax noprefix
-	vaesdec	zmm30, zmm29, zmm28	 # AVX512F,VAES
-	vaesdec	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
-	vaesdec	zmm6, zmm5, ZMMWORD PTR [rdx+8128]	 # AVX512F,VAES Disp8
-	vaesdeclast	zmm30, zmm29, zmm28	 # AVX512F,VAES
-	vaesdeclast	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
-	vaesdeclast	zmm6, zmm5, ZMMWORD PTR [rdx+8128]	 # AVX512F,VAES Disp8
-	vaesenc	zmm30, zmm29, zmm28	 # AVX512F,VAES
-	vaesenc	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
-	vaesenc	zmm6, zmm5, ZMMWORD PTR [rdx+8128]	 # AVX512F,VAES Disp8
-	vaesenclast	zmm30, zmm29, zmm28	 # AVX512F,VAES
-	vaesenclast	zmm30, zmm29, ZMMWORD PTR [rax+r14*8+0x1234]	 # AVX512F,VAES
-	vaesenclast	zmm6, zmm5, ZMMWORD PTR [rdx+8128]	 # AVX512F,VAES Disp8
--- a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1.d
@@ -1,7 +1,7 @@ 
 #as: -mevexwig=1
 #objdump: -dw
 #name: x86_64 AVX512F/VAES wig insns
-#source: x86-64-avx512f_vaes-wig.s
+#source: x86-64-avx512f_vaes.s
 
 .*: +file format .*
 
--- a/gas/testsuite/gas/i386/x86-64-avx512f_vaes-wig1-intel.d
+++ /dev/null
@@ -1,36 +0,0 @@ 
-#as: -mevexwig=1
-#objdump: -dw -Mintel
-#name: x86_64 AVX512F/VAES wig insns (Intel disassembly)
-#source: x86-64-avx512f_vaes-wig.s
-
-.*: +file format .*
-
-
-Disassembly of section \.text:
-
-0+ <_start>:
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 de f4[ 	]*vaesdec zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 de b4 f0 23 01 00 00[ 	]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de 72 7f[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 df f4[ 	]*vaesdeclast zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 df b4 f0 23 01 00 00[ 	]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df 72 7f[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dc f4[ 	]*vaesenc zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dc b4 f0 23 01 00 00[ 	]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc 72 7f[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dd f4[ 	]*vaesenclast zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dd b4 f0 23 01 00 00[ 	]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd 72 7f[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 de f4[ 	]*vaesdec zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 de b4 f0 34 12 00 00[ 	]*vaesdec zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 de 72 7f[ 	]*vaesdec zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 df f4[ 	]*vaesdeclast zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 df b4 f0 34 12 00 00[ 	]*vaesdeclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 df 72 7f[ 	]*vaesdeclast zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dc f4[ 	]*vaesenc zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dc b4 f0 34 12 00 00[ 	]*vaesenc zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dc 72 7f[ 	]*vaesenc zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 40 dd f4[ 	]*vaesenclast zmm30,zmm29,zmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 40 dd b4 f0 34 12 00 00[ 	]*vaesenclast zmm30,zmm29,ZMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 f2 d5 48 dd 72 7f[ 	]*vaesenclast zmm6,zmm5,ZMMWORD PTR \[rdx\+0x1fc0\]
-#pass
--- a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig.s
+++ /dev/null
@@ -1,55 +0,0 @@ 
-# Check 64bit AVX512VL,VAES WIG instructions
-
-	.allow_index_reg
-	.text
-_start:
-	vaesdec	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesdec	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesdec	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
-	vaesdec	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesdec	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesdec	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
-	vaesdeclast	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesdeclast	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesdeclast	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
-	vaesdeclast	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesdeclast	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesdeclast	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
-	vaesenc	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesenc	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesenc	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
-	vaesenc	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesenc	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesenc	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
-	vaesenclast	%xmm28, %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesenclast	0x123(%rax,%r14,8), %xmm29, %xmm30	 # AVX512VL,VAES
-	vaesenclast	2032(%rdx), %xmm29, %xmm30	 # AVX512VL,VAES Disp8
-	vaesenclast	%ymm28, %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesenclast	0x123(%rax,%r14,8), %ymm29, %ymm30	 # AVX512VL,VAES
-	vaesenclast	4064(%rdx), %ymm29, %ymm30	 # AVX512VL,VAES Disp8
-
-	.intel_syntax noprefix
-	vaesdec	xmm30, xmm29, xmm28	 # AVX512VL,VAES
-	vaesdec	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesdec	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
-	vaesdec	ymm30, ymm29, ymm28	 # AVX512VL,VAES
-	vaesdec	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesdec	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
-	vaesdeclast	xmm30, xmm29, xmm28	 # AVX512VL,VAES
-	vaesdeclast	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesdeclast	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
-	vaesdeclast	ymm30, ymm29, ymm28	 # AVX512VL,VAES
-	vaesdeclast	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesdeclast	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
-	vaesenc	xmm30, xmm29, xmm28	 # AVX512VL,VAES
-	vaesenc	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesenc	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
-	vaesenc	ymm30, ymm29, ymm28	 # AVX512VL,VAES
-	vaesenc	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesenc	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
-	vaesenclast	xmm30, xmm29, xmm28	 # AVX512VL,VAES
-	vaesenclast	xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesenclast	xmm30, xmm29, XMMWORD PTR [rdx+2032]	 # AVX512VL,VAES Disp8
-	vaesenclast	ymm30, ymm29, ymm28	 # AVX512VL,VAES
-	vaesenclast	ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234]	 # AVX512VL,VAES
-	vaesenclast	ymm30, ymm29, YMMWORD PTR [rdx+4064]	 # AVX512VL,VAES Disp8
--- a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d
+++ b/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1.d
@@ -1,7 +1,7 @@ 
 #as: -mevexwig=1
 #objdump: -dw
 #name: x86_64 AVX512VL/VAES wig insns
-#source: x86-64-avx512vl_vaes-wig.s
+#source: x86-64-avx512vl_vaes.s
 
 .*: +file format .*
 
@@ -13,6 +13,7 @@  Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%xmm29,%xmm30
 [ 	]*[a-f0-9]+:[ 	]*62 62 95 00 de 72 7f[ 	]*vaesdec 0x7f0\(%rdx\),%xmm29,%xmm30
 [ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec %ymm28,%ymm29,%ymm30
+[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 de 31[ 	]*vaesdec \(%rcx\),%ymm29,%ymm30
 [ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 23 01 00 00[ 	]*vaesdec 0x123\(%rax,%r14,8\),%ymm29,%ymm30
 [ 	]*[a-f0-9]+:[ 	]*62 62 95 20 de 72 7f[ 	]*vaesdec 0xfe0\(%rdx\),%ymm29,%ymm30
 [ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast %xmm28,%xmm29,%xmm30
--- a/gas/testsuite/gas/i386/x86-64-avx512vl_vaes-wig1-intel.d
+++ /dev/null
@@ -1,60 +0,0 @@ 
-#as: -mevexwig=1
-#objdump: -dw -Mintel
-#name: x86_64 AVX512VL/VAES wig insns (Intel disassembly)
-#source: x86-64-avx512vl_vaes-wig.s
-
-.*: +file format .*
-
-
-Disassembly of section \.text:
-
-0+ <_start>:
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 de f4[ 	]*vaesdec xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 23 01 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 de 72 7f[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 23 01 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 de 72 7f[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 df b4 f0 23 01 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 df 72 7f[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 df f4[ 	]*vaesdeclast ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 df b4 f0 23 01 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 df 72 7f[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dc f4[ 	]*vaesenc xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dc b4 f0 23 01 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 dc 72 7f[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dc f4[ 	]*vaesenc ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dc b4 f0 23 01 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 dc 72 7f[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dd f4[ 	]*vaesenclast xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dd b4 f0 23 01 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 dd 72 7f[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dd f4[ 	]*vaesenclast ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dd b4 f0 23 01 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x123\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 dd 72 7f[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 de f4[ 	]*vaesdec xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 de b4 f0 34 12 00 00[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 de 72 7f[ 	]*vaesdec xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 de f4[ 	]*vaesdec ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 de b4 f0 34 12 00 00[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 de 72 7f[ 	]*vaesdec ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 df f4[ 	]*vaesdeclast xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 df b4 f0 34 12 00 00[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 df 72 7f[ 	]*vaesdeclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 df f4[ 	]*vaesdeclast ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 df b4 f0 34 12 00 00[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 df 72 7f[ 	]*vaesdeclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dc f4[ 	]*vaesenc xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dc b4 f0 34 12 00 00[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 dc 72 7f[ 	]*vaesenc xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dc f4[ 	]*vaesenc ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dc b4 f0 34 12 00 00[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 dc 72 7f[ 	]*vaesenc ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 00 dd f4[ 	]*vaesenclast xmm30,xmm29,xmm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 00 dd b4 f0 34 12 00 00[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 00 dd 72 7f[ 	]*vaesenclast xmm30,xmm29,XMMWORD PTR \[rdx\+0x7f0\]
-[ 	]*[a-f0-9]+:[ 	]*62 02 95 20 dd f4[ 	]*vaesenclast ymm30,ymm29,ymm28
-[ 	]*[a-f0-9]+:[ 	]*62 22 95 20 dd b4 f0 34 12 00 00[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rax\+r14\*8\+0x1234\]
-[ 	]*[a-f0-9]+:[ 	]*62 62 95 20 dd 72 7f[ 	]*vaesenclast ymm30,ymm29,YMMWORD PTR \[rdx\+0xfe0\]
-#pass
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-vaes-wig1.d
@@ -0,0 +1,32 @@ 
+#as: -mvexwig=1
+#objdump: -dw
+#name: x86_64 AVX/VAES wig insns
+#source: x86-64-vaes.s
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <_start>:
+[ 	]*[a-f0-9]+:	c4 e2 cd dc d4       	vaesenc %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd dc 39       	vaesenc \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd dd 39       	vaesenclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd de d4       	vaesdec %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd de 39       	vaesdec \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd df 39       	vaesdeclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd dc d4       	vaesenc %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd dc 39       	vaesenc \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd dc 39       	vaesenc \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd dd d4       	vaesenclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd dd 39       	vaesenclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd dd 39       	vaesenclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd de d4       	vaesdec %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd de 39       	vaesdec \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd de 39       	vaesdec \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd df d4       	vaesdeclast %ymm4,%ymm6,%ymm2
+[ 	]*[a-f0-9]+:	c4 e2 cd df 39       	vaesdeclast \(%rcx\),%ymm6,%ymm7
+[ 	]*[a-f0-9]+:	c4 e2 cd df 39       	vaesdeclast \(%rcx\),%ymm6,%ymm7
+#pass