diff mbox series

gas 32-bit host compile warnings

Message ID ZLc+98Th9pmqLTGc@squeak.grove.modra.org
State Accepted
Headers
Series gas 32-bit host compile warnings |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Alan Modra July 19, 2023, 1:40 a.m. UTC 
  * config/tc-d10v.c (find_opcode): Correct format specifier vs.
	arg mismatch.
	* config/tc-m68hc11.c (fixup8, fixup16, fixup24, fixup8_xg): Likewise.
	* config/tc-vax.c (md_assemble): Likewise.
	* config/tc-xtensa.c (dump_litpools): Likewise.
	* config/tc-z80.c (emit_data_val, emit_byte): Likewise.
diff mbox series

Patch

diff --git a/gas/config/tc-d10v.c b/gas/config/tc-d10v.c
index b09bbe156b6..7ca3b2c85cf 100644
--- a/gas/config/tc-d10v.c
+++ b/gas/config/tc-d10v.c
@@ -1391,8 +1391,8 @@  find_opcode (struct d10v_opcode *opcode, expressionS myops[])
 	      || myops[i].X_add_number == OPERAND_CONTROL + 12
 	      || myops[i].X_add_number == OPERAND_CONTROL + 13
 	      || myops[i].X_add_number == OPERAND_CONTROL + 15))
-	as_warn (_("cr%ld is a reserved control register"),
-		 myops[i].X_add_number - OPERAND_CONTROL);
+	as_warn (_("cr%d is a reserved control register"),
+		 (int) myops[i].X_add_number - OPERAND_CONTROL);
     }
   return opcode;
 }
diff --git a/gas/config/tc-m68hc11.c b/gas/config/tc-m68hc11.c
index 270ddf999ce..e1872310bd8 100644
--- a/gas/config/tc-m68hc11.c
+++ b/gas/config/tc-m68hc11.c
@@ -1574,7 +1574,8 @@  fixup8 (expressionS *oper, int mode, int opmode)
 	{
 	  static char trap_id_warn_once = 0;
 
-	  as_bad (_("Trap id `%ld' is out of range."), oper->X_add_number);
+	  as_bad (_("Trap id `%" PRId64 "' is out of range."),
+		  (int64_t) oper->X_add_number);
 	  if (trap_id_warn_once == 0)
 	    {
 	      trap_id_warn_once = 1;
@@ -1585,7 +1586,8 @@  fixup8 (expressionS *oper, int mode, int opmode)
       if (!(mode & M6812_OP_TRAP_ID)
 	  && !check_range (oper->X_add_number, mode))
 	{
-	  as_bad (_("Operand out of 8-bit range: `%ld'."), oper->X_add_number);
+	  as_bad (_("Operand out of 8-bit range: `%" PRId64 "'."),
+		  (int64_t) oper->X_add_number);
 	}
       number_to_chars_bigendian (f, oper->X_add_number & 0x0FF, 1);
     }
@@ -1641,8 +1643,8 @@  fixup16 (expressionS *oper, int mode, int opmode ATTRIBUTE_UNUSED)
     {
       if (!check_range (oper->X_add_number, mode))
 	{
-	  as_bad (_("Operand out of 16-bit range: `%ld'."),
-		  oper->X_add_number);
+	  as_bad (_("Operand out of 16-bit range: `%" PRId64 "'."),
+		  (int64_t) oper->X_add_number);
 	}
       number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFF, 2);
     }
@@ -1689,8 +1691,8 @@  fixup24 (expressionS *oper, int mode, int opmode ATTRIBUTE_UNUSED)
     {
       if (!check_range (oper->X_add_number, mode))
 	{
-	  as_bad (_("Operand out of 16-bit range: `%ld'."),
-		  oper->X_add_number);
+	  as_bad (_("Operand out of 16-bit range: `%" PRId64 "'."),
+		  (int64_t) oper->X_add_number);
 	}
       number_to_chars_bigendian (f, oper->X_add_number & 0x0FFFFFF, 3);
     }
@@ -1736,8 +1738,8 @@  fixup8_xg (expressionS *oper, int mode, int opmode)
      else
         {
 	  if (!(check_range (oper->X_add_number, mode)))
-	    as_bad (_("Operand out of 8-bit range: `%ld'."),
-		    oper->X_add_number);
+	    as_bad (_("Operand out of 8-bit range: `%" PRId64 "'."),
+		    (int64_t) oper->X_add_number);
           number_to_chars_bigendian (f, oper->X_add_number & 0x0FF, 1);
         }
     }
diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c
index 36defe4765c..50adf532a15 100644
--- a/gas/config/tc-vax.c
+++ b/gas/config/tc-vax.c
@@ -2683,8 +2683,9 @@  md_assemble (char *instruction_string)
 		}
 	      else
 		{
-		  as_warn (_("A bignum/flonum may not be a displacement: 0x%lx used"),
-			   (expP->X_add_number = 0x80000000L));
+		  as_warn (_("A bignum/flonum may not be a displacement: 0x%"
+			     PRIx64 " used"),
+			   (uint64_t) (expP->X_add_number = 0x80000000L));
 		  /* Chosen so luser gets the most offset bits to patch later.  */
 		}
 	      expP->X_add_number = floatP->low[0]
diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c
index 550c8256e3f..fd3ed067659 100644
--- a/gas/config/tc-xtensa.c
+++ b/gas/config/tc-xtensa.c
@@ -7869,8 +7869,9 @@  dump_litpools (void)
 		count++;
 	      litfrag = litfrag->fr_next;
 	    }
-	  printf("   %ld <%d:%d> (%d) [%d]: ",
-		 lpf->addr, lpf->priority, lpf->original_priority,
+	  printf("   %" PRId64 " <%d:%d> (%d) [%d]: ",
+		 (int64_t) lpf->addr,
+		 lpf->priority, lpf->original_priority,
 		 lpf->fragP->fr_line, count);
 	  /* dump_frag(lpf->fragP);  */
 	}
diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c
index 577c58479da..398c7f31c57 100644
--- a/gas/config/tc-z80.c
+++ b/gas/config/tc-z80.c
@@ -1143,10 +1143,11 @@  emit_data_val (expressionS * val, int size)
 	  but it does help to maintain compatibility with earlier versions
 	  of the assembler.  */
       if (! val->X_extrabit
-	  && is_overflow (val->X_add_number, size*8))
-	as_warn ( _("%d-bit overflow (%+ld)"), size*8, val->X_add_number);
+	  && is_overflow (val->X_add_number, size * 8))
+	as_warn ( _("%d-bit overflow (%+" PRId64 ")"), size * 8,
+		  (int64_t) val->X_add_number);
       for (i = 0; i < size; ++i)
-	p[i] = (char)(val->X_add_number >> (i*8));
+	p[i] = (val->X_add_number >> (i * 8)) & 0xff;
       return;
     }
 
@@ -1250,9 +1251,11 @@  emit_byte (expressionS * val, bfd_reloc_code_real_type r_type)
       if ((val->X_add_number < -128) || (val->X_add_number >= 128))
 	{
 	  if (r_type == BFD_RELOC_Z80_DISP8)
-	    as_bad (_("index overflow (%+ld)"), val->X_add_number);
+	    as_bad (_("index overflow (%+" PRId64 ")"),
+		    (int64_t) val->X_add_number);
 	  else
-	    as_bad (_("offset overflow (%+ld)"), val->X_add_number);
+	    as_bad (_("offset overflow (%+" PRId64 ")"),
+		    (int64_t) val->X_add_number);
 	}
     }
   else