| Message ID | 780449c2-d1bf-cd70-d585-02d06db1c1be@arm.com |
|---|---|
| State | Corrupt patch |
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Subject: [PATCH][GAS] aarch64: Enable Cortex-A520 CPU
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From: Richard Ball via Binutils <binutils@sourceware.org>
Reply-To: Richard Ball <richard.ball@arm.com>
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|
| Series |
[GAS] aarch64: Enable Cortex-A520 CPU
|
|
Checks
| Context | Check | Description |
|---|---|---|
| snail/binutils-gdb-check | warning | Git am fail log |
Commit Message
Richard Ball
Aug. 8, 2023, 1:09 p.m. UTC
This patch adds support for the Cortex-A520 CPU to gas.
No regressions on aarch64-none-elf.
Ok for binutils-master?
Could this patch please be committed on my behalf,
as I do not have write access yet?
gas/ChangeLog:
* NEWS: Update docs.
* config/tc-aarch64.c: Add Cortex-A520.
* doc/c-aarch64.texi: Update docs.
####################################
@code{exynos-m1},
Comments
Richard Ball <richard.ball@arm.com> writes: > This patch adds support for the Cortex-A520 CPU to gas. > > No regressions on aarch64-none-elf. > > Ok for binutils-master? > > Could this patch please be committed on my behalf, > as I do not have write access yet? > > gas/ChangeLog: > > * NEWS: Update docs. > * config/tc-aarch64.c: Add Cortex-A520. > * doc/c-aarch64.texi: Update docs. OK, thanks. Richard > #################################### > > > diff --git a/gas/NEWS b/gas/NEWS > index > 1ed043511eb67aadc96549a775a87bc50c2b5ab8..07ba75661052842554a478ee612b9c7a087cec1b > 100644 > --- a/gas/NEWS > +++ b/gas/NEWS > @@ -10,6 +10,8 @@ > > * Add support for Intel AVX-VNNI-INT16 instructions. > > +* Add support for Cortex-A520 for AArch64. > + > Changes in 2.41: > > * Add support for Intel FRED instructions. > diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c > index > 99fb5de267960cac694128357bf7f6cf3576b96c..e692161105a5c75fab92f707a114c20c9531f18f > 100644 > --- a/gas/config/tc-aarch64.c > +++ b/gas/config/tc-aarch64.c > @@ -10227,6 +10227,10 @@ static const struct aarch64_cpu_option_table > aarch64_cpus[] = { > | AARCH64_FEATURE_MEMTAG > | AARCH64_FEATURE_SVE2_BITPERM), > "Cortex-A510"}, > + {"cortex-a520", AARCH64_FEATURE (AARCH64_ARCH_V9_2, > + AARCH64_FEATURE_MEMTAG > + | AARCH64_FEATURE_SVE2_BITPERM), > + "Cortex-A520"}, > {"cortex-a710", AARCH64_FEATURE (AARCH64_ARCH_V9, > AARCH64_FEATURE_BFLOAT16 > | AARCH64_FEATURE_I8MM > diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi > index > acde4a77dd25f20398c41222ce66bbc64cc99bbd..ed6b46e042290d806d98728d725b62520644e246 > 100644 > --- a/gas/doc/c-aarch64.texi > +++ b/gas/doc/c-aarch64.texi > @@ -72,6 +72,7 @@ on the target processor. The following processor > names are recognized: > @code{cortex-a78ae}, > @code{cortex-a78c}, > @code{cortex-a510}, > +@code{cortex-a520}, > @code{cortex-a710}, > @code{ares}, > @code{exynos-m1},
diff --git a/gas/NEWS b/gas/NEWS index 1ed043511eb67aadc96549a775a87bc50c2b5ab8..07ba75661052842554a478ee612b9c7a087cec1b 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -10,6 +10,8 @@ * Add support for Intel AVX-VNNI-INT16 instructions. +* Add support for Cortex-A520 for AArch64. + Changes in 2.41: * Add support for Intel FRED instructions. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 99fb5de267960cac694128357bf7f6cf3576b96c..e692161105a5c75fab92f707a114c20c9531f18f 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10227,6 +10227,10 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = { | AARCH64_FEATURE_MEMTAG | AARCH64_FEATURE_SVE2_BITPERM), "Cortex-A510"}, + {"cortex-a520", AARCH64_FEATURE (AARCH64_ARCH_V9_2, + AARCH64_FEATURE_MEMTAG + | AARCH64_FEATURE_SVE2_BITPERM), + "Cortex-A520"}, {"cortex-a710", AARCH64_FEATURE (AARCH64_ARCH_V9, AARCH64_FEATURE_BFLOAT16 | AARCH64_FEATURE_I8MM diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index acde4a77dd25f20398c41222ce66bbc64cc99bbd..ed6b46e042290d806d98728d725b62520644e246 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -72,6 +72,7 @@ on the target processor. The following processor names are recognized: @code{cortex-a78ae}, @code{cortex-a78c}, @code{cortex-a510}, +@code{cortex-a520}, @code{cortex-a710}, @code{ares},