diff mbox series

[15/40] sim/h8300: Add "+ 0x0" to avoid self-assignments

Message ID 5ab303a5bdfc1da7832f8fa22f57678c9ef1a5fa.1666257885.git.research_trasio@irq.a4lg.com
State Accepted
Headers
Series sim+gdb: Suppress warnings if built with Clang (big batch 1) |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Tsukasa OI Oct. 20, 2022, 9:26 a.m. UTC 
  Clang generates a warning if there is a redundant self-assignment
("-Wself-assign").  On the default configuration, it causes a build failure
(unless "--disable-werror" is specified).

However, removing self-assignments in step_once function makes the code less
readable.  Instead, this commit inserts dummy addition to match the comments
"Value added == 0".  This is redundant but will suppress warnings and
matches with other branches better.  It will be also optimized away so we
can ignore performance impact on this.
---
 sim/h8300/compile.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Jeff Law Oct. 25, 2022, 1:54 p.m. UTC | #1 
On 10/20/22 03:26, Tsukasa OI via Binutils wrote:
> Clang generates a warning if there is a redundant self-assignment
> ("-Wself-assign").  On the default configuration, it causes a build failure
> (unless "--disable-werror" is specified).
>
> However, removing self-assignments in step_once function makes the code less
> readable.  Instead, this commit inserts dummy addition to match the comments
> "Value added == 0".  This is redundant but will suppress warnings and
> matches with other branches better.  It will be also optimized away so we
> can ignore performance impact on this.
> ---
>   sim/h8300/compile.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

OK.

jeff
diff mbox series

Patch

diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index 9be7dd565a9..f7d8d590b69 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -4141,7 +4141,7 @@  step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  res = GET_B_REG (code->src.reg);	/* FIXME fetch? */
 	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
 	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
-	    res = res;		/* Value added == 0.  */
+	    res = res + 0x0;		/* Value added == 0.  */
 	  else if (!c && (0  <= (res >>  4) && (res >>  4) <=  8) && 
 		   !h && (10 <= (res & 0xf) && (res & 0xf) <= 15))
 	    res = res + 0x6;		/* Value added == 6.  */
@@ -4174,7 +4174,7 @@  step_once (SIM_DESC sd, SIM_CPU *cpu)
 	  res = GET_B_REG (code->src.reg); /* FIXME fetch, fetch2... */
 	  if (!c && (0 <= (res >>  4) && (res >>  4) <= 9) && 
 	      !h && (0 <= (res & 0xf) && (res & 0xf) <= 9))
-	    res = res;		/* Value added == 0.  */
+	    res = res + 0x0;		/* Value added == 0.  */
 	  else if (!c && (0 <= (res >>  4) && (res >>  4) <=  8) && 
 		    h && (6 <= (res & 0xf) && (res & 0xf) <= 15))
 	    res = res + 0xfa;		/* Value added == 0xfa.  */