diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 63c649a2fad29d198a822ec145fb6d20f11f57c5..df71e67a5a68047d70abe65d8f178fdfae114306 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10286,6 +10286,7 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
 			AARCH64_FEATURES (2, F16, SIMD)},
   {"jscvt",		AARCH64_FEATURE (JSCVT), AARCH64_FEATURE (FP)},
   {"rcpc",		AARCH64_FEATURE (RCPC), AARCH64_NO_FEATURES},
+  {"rcpc2",		AARCH64_FEATURE (RCPC2), AARCH64_FEATURE (RCPC)},
   {"dotprod",		AARCH64_FEATURE (DOTPROD), AARCH64_FEATURE (SIMD)},
   {"sha2",		AARCH64_FEATURE (SHA2), AARCH64_FEATURE (FP)},
   {"frintts",		AARCH64_FEATURE (FRINTTS), AARCH64_FEATURE (SIMD)},
diff --git a/gas/testsuite/gas/aarch64/armv8_4-a.d b/gas/testsuite/gas/aarch64/armv8_4-a.d
index 4b1a4e37757b63755903b61b2ef3e194ffd54994..ae0a27f0b4bc4b7682a59fe078e04464adcc17fd 100644
--- a/gas/testsuite/gas/aarch64/armv8_4-a.d
+++ b/gas/testsuite/gas/aarch64/armv8_4-a.d
@@ -2202,4 +2202,4 @@ Disassembly of section \.text:
 [^:]+:\s+998033fe 	ldapursw	x30, \[sp, #3\]
 [^:]+:\s+998523fe 	ldapursw	x30, \[sp, #82\]
 [^:]+:\s+9980d3fe 	ldapursw	x30, \[sp, #13\]
-[^:]+:\s+d500401f 	cfinv
\ No newline at end of file
+[^:]+:\s+d500401f 	cfinv
diff --git a/gas/testsuite/gas/aarch64/rcpc2.d b/gas/testsuite/gas/aarch64/rcpc2.d
new file mode 100644
index 0000000000000000000000000000000000000000..3de4be7b347ad91001b7138cab0ffd34f3c42f39
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc2.d
@@ -0,0 +1,2088 @@
+#as: -march=armv8-a+rcpc2
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+[^:]+:\s+19000060 	stlurb	w0, \[x3\]
+[^:]+:\s+19000160 	stlurb	w0, \[x11\]
+[^:]+:\s+190001e0 	stlurb	w0, \[x15\]
+[^:]+:\s+19000068 	stlurb	w8, \[x3\]
+[^:]+:\s+19000168 	stlurb	w8, \[x11\]
+[^:]+:\s+190001e8 	stlurb	w8, \[x15\]
+[^:]+:\s+1900006c 	stlurb	w12, \[x3\]
+[^:]+:\s+1900016c 	stlurb	w12, \[x11\]
+[^:]+:\s+190001ec 	stlurb	w12, \[x15\]
+[^:]+:\s+19000060 	stlurb	w0, \[x3\]
+[^:]+:\s+19000160 	stlurb	w0, \[x11\]
+[^:]+:\s+190001e0 	stlurb	w0, \[x15\]
+[^:]+:\s+19000068 	stlurb	w8, \[x3\]
+[^:]+:\s+19000168 	stlurb	w8, \[x11\]
+[^:]+:\s+190001e8 	stlurb	w8, \[x15\]
+[^:]+:\s+1900006c 	stlurb	w12, \[x3\]
+[^:]+:\s+1900016c 	stlurb	w12, \[x11\]
+[^:]+:\s+190001ec 	stlurb	w12, \[x15\]
+[^:]+:\s+19000060 	stlurb	w0, \[x3\]
+[^:]+:\s+19000160 	stlurb	w0, \[x11\]
+[^:]+:\s+190001e0 	stlurb	w0, \[x15\]
+[^:]+:\s+19000068 	stlurb	w8, \[x3\]
+[^:]+:\s+19000168 	stlurb	w8, \[x11\]
+[^:]+:\s+190001e8 	stlurb	w8, \[x15\]
+[^:]+:\s+1900006c 	stlurb	w12, \[x3\]
+[^:]+:\s+1900016c 	stlurb	w12, \[x11\]
+[^:]+:\s+190001ec 	stlurb	w12, \[x15\]
+[^:]+:\s+19000060 	stlurb	w0, \[x3\]
+[^:]+:\s+19000160 	stlurb	w0, \[x11\]
+[^:]+:\s+190001e0 	stlurb	w0, \[x15\]
+[^:]+:\s+19000068 	stlurb	w8, \[x3\]
+[^:]+:\s+19000168 	stlurb	w8, \[x11\]
+[^:]+:\s+190001e8 	stlurb	w8, \[x15\]
+[^:]+:\s+1900006c 	stlurb	w12, \[x3\]
+[^:]+:\s+1900016c 	stlurb	w12, \[x11\]
+[^:]+:\s+190001ec 	stlurb	w12, \[x15\]
+[^:]+:\s+190003e0 	stlurb	w0, \[sp\]
+[^:]+:\s+190003e7 	stlurb	w7, \[sp\]
+[^:]+:\s+190003f0 	stlurb	w16, \[sp\]
+[^:]+:\s+190003fe 	stlurb	w30, \[sp\]
+[^:]+:\s+19003002 	stlurb	w2, \[x0, #3\]
+[^:]+:\s+1900b002 	stlurb	w2, \[x0, #11\]
+[^:]+:\s+1900f002 	stlurb	w2, \[x0, #15\]
+[^:]+:\s+19003102 	stlurb	w2, \[x8, #3\]
+[^:]+:\s+1900b102 	stlurb	w2, \[x8, #11\]
+[^:]+:\s+1900f102 	stlurb	w2, \[x8, #15\]
+[^:]+:\s+19003182 	stlurb	w2, \[x12, #3\]
+[^:]+:\s+1900b182 	stlurb	w2, \[x12, #11\]
+[^:]+:\s+1900f182 	stlurb	w2, \[x12, #15\]
+[^:]+:\s+1900300f 	stlurb	w15, \[x0, #3\]
+[^:]+:\s+1900b00f 	stlurb	w15, \[x0, #11\]
+[^:]+:\s+1900f00f 	stlurb	w15, \[x0, #15\]
+[^:]+:\s+1900310f 	stlurb	w15, \[x8, #3\]
+[^:]+:\s+1900b10f 	stlurb	w15, \[x8, #11\]
+[^:]+:\s+1900f10f 	stlurb	w15, \[x8, #15\]
+[^:]+:\s+1900318f 	stlurb	w15, \[x12, #3\]
+[^:]+:\s+1900b18f 	stlurb	w15, \[x12, #11\]
+[^:]+:\s+1900f18f 	stlurb	w15, \[x12, #15\]
+[^:]+:\s+1900301e 	stlurb	w30, \[x0, #3\]
+[^:]+:\s+1900b01e 	stlurb	w30, \[x0, #11\]
+[^:]+:\s+1900f01e 	stlurb	w30, \[x0, #15\]
+[^:]+:\s+1900311e 	stlurb	w30, \[x8, #3\]
+[^:]+:\s+1900b11e 	stlurb	w30, \[x8, #11\]
+[^:]+:\s+1900f11e 	stlurb	w30, \[x8, #15\]
+[^:]+:\s+1900319e 	stlurb	w30, \[x12, #3\]
+[^:]+:\s+1900b19e 	stlurb	w30, \[x12, #11\]
+[^:]+:\s+1900f19e 	stlurb	w30, \[x12, #15\]
+[^:]+:\s+19003002 	stlurb	w2, \[x0, #3\]
+[^:]+:\s+1900b002 	stlurb	w2, \[x0, #11\]
+[^:]+:\s+1900f002 	stlurb	w2, \[x0, #15\]
+[^:]+:\s+19003102 	stlurb	w2, \[x8, #3\]
+[^:]+:\s+1900b102 	stlurb	w2, \[x8, #11\]
+[^:]+:\s+1900f102 	stlurb	w2, \[x8, #15\]
+[^:]+:\s+19003182 	stlurb	w2, \[x12, #3\]
+[^:]+:\s+1900b182 	stlurb	w2, \[x12, #11\]
+[^:]+:\s+1900f182 	stlurb	w2, \[x12, #15\]
+[^:]+:\s+1900300f 	stlurb	w15, \[x0, #3\]
+[^:]+:\s+1900b00f 	stlurb	w15, \[x0, #11\]
+[^:]+:\s+1900f00f 	stlurb	w15, \[x0, #15\]
+[^:]+:\s+1900310f 	stlurb	w15, \[x8, #3\]
+[^:]+:\s+1900b10f 	stlurb	w15, \[x8, #11\]
+[^:]+:\s+1900f10f 	stlurb	w15, \[x8, #15\]
+[^:]+:\s+1900318f 	stlurb	w15, \[x12, #3\]
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+[^:]+:\s+1900f18f 	stlurb	w15, \[x12, #15\]
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+[^:]+:\s+1900b01e 	stlurb	w30, \[x0, #11\]
+[^:]+:\s+1900f01e 	stlurb	w30, \[x0, #15\]
+[^:]+:\s+1900311e 	stlurb	w30, \[x8, #3\]
+[^:]+:\s+1900b11e 	stlurb	w30, \[x8, #11\]
+[^:]+:\s+1900f11e 	stlurb	w30, \[x8, #15\]
+[^:]+:\s+1900319e 	stlurb	w30, \[x12, #3\]
+[^:]+:\s+1900b19e 	stlurb	w30, \[x12, #11\]
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+[^:]+:\s+19003102 	stlurb	w2, \[x8, #3\]
+[^:]+:\s+1900b102 	stlurb	w2, \[x8, #11\]
+[^:]+:\s+1900f102 	stlurb	w2, \[x8, #15\]
+[^:]+:\s+19003182 	stlurb	w2, \[x12, #3\]
+[^:]+:\s+1900b182 	stlurb	w2, \[x12, #11\]
+[^:]+:\s+1900f182 	stlurb	w2, \[x12, #15\]
+[^:]+:\s+1900300f 	stlurb	w15, \[x0, #3\]
+[^:]+:\s+1900b00f 	stlurb	w15, \[x0, #11\]
+[^:]+:\s+1900f00f 	stlurb	w15, \[x0, #15\]
+[^:]+:\s+1900310f 	stlurb	w15, \[x8, #3\]
+[^:]+:\s+1900b10f 	stlurb	w15, \[x8, #11\]
+[^:]+:\s+1900f10f 	stlurb	w15, \[x8, #15\]
+[^:]+:\s+1900318f 	stlurb	w15, \[x12, #3\]
+[^:]+:\s+1900b18f 	stlurb	w15, \[x12, #11\]
+[^:]+:\s+1900f18f 	stlurb	w15, \[x12, #15\]
+[^:]+:\s+1900301e 	stlurb	w30, \[x0, #3\]
+[^:]+:\s+1900b01e 	stlurb	w30, \[x0, #11\]
+[^:]+:\s+1900f01e 	stlurb	w30, \[x0, #15\]
+[^:]+:\s+1900311e 	stlurb	w30, \[x8, #3\]
+[^:]+:\s+1900b11e 	stlurb	w30, \[x8, #11\]
+[^:]+:\s+1900f11e 	stlurb	w30, \[x8, #15\]
+[^:]+:\s+1900319e 	stlurb	w30, \[x12, #3\]
+[^:]+:\s+1900b19e 	stlurb	w30, \[x12, #11\]
+[^:]+:\s+1900f19e 	stlurb	w30, \[x12, #15\]
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+[^:]+:\s+19003102 	stlurb	w2, \[x8, #3\]
+[^:]+:\s+1900b102 	stlurb	w2, \[x8, #11\]
+[^:]+:\s+1900f102 	stlurb	w2, \[x8, #15\]
+[^:]+:\s+19003182 	stlurb	w2, \[x12, #3\]
+[^:]+:\s+1900b182 	stlurb	w2, \[x12, #11\]
+[^:]+:\s+1900f182 	stlurb	w2, \[x12, #15\]
+[^:]+:\s+1900300f 	stlurb	w15, \[x0, #3\]
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+[^:]+:\s+1900b10f 	stlurb	w15, \[x8, #11\]
+[^:]+:\s+1900f10f 	stlurb	w15, \[x8, #15\]
+[^:]+:\s+1900318f 	stlurb	w15, \[x12, #3\]
+[^:]+:\s+1900b18f 	stlurb	w15, \[x12, #11\]
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+[^:]+:\s+1900311e 	stlurb	w30, \[x8, #3\]
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+[^:]+:\s+1900b19e 	stlurb	w30, \[x12, #11\]
+[^:]+:\s+1900f19e 	stlurb	w30, \[x12, #15\]
+[^:]+:\s+190033e0 	stlurb	w0, \[sp, #3\]
+[^:]+:\s+190523e0 	stlurb	w0, \[sp, #82\]
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+[^:]+:\s+190033e7 	stlurb	w7, \[sp, #3\]
+[^:]+:\s+190523e7 	stlurb	w7, \[sp, #82\]
+[^:]+:\s+1900d3e7 	stlurb	w7, \[sp, #13\]
+[^:]+:\s+190033f0 	stlurb	w16, \[sp, #3\]
+[^:]+:\s+190523f0 	stlurb	w16, \[sp, #82\]
+[^:]+:\s+1900d3f0 	stlurb	w16, \[sp, #13\]
+[^:]+:\s+190033fe 	stlurb	w30, \[sp, #3\]
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+[^:]+:\s+1900d3fe 	stlurb	w30, \[sp, #13\]
+[^:]+:\s+19400060 	ldapurb	w0, \[x3\]
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+[^:]+:\s+194001e0 	ldapurb	w0, \[x15\]
+[^:]+:\s+19400068 	ldapurb	w8, \[x3\]
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+[^:]+:\s+194001e8 	ldapurb	w8, \[x15\]
+[^:]+:\s+1940006c 	ldapurb	w12, \[x3\]
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+[^:]+:\s+194001ec 	ldapurb	w12, \[x15\]
+[^:]+:\s+19400060 	ldapurb	w0, \[x3\]
+[^:]+:\s+19400160 	ldapurb	w0, \[x11\]
+[^:]+:\s+194001e0 	ldapurb	w0, \[x15\]
+[^:]+:\s+19400068 	ldapurb	w8, \[x3\]
+[^:]+:\s+19400168 	ldapurb	w8, \[x11\]
+[^:]+:\s+194001e8 	ldapurb	w8, \[x15\]
+[^:]+:\s+1940006c 	ldapurb	w12, \[x3\]
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+[^:]+:\s+194001e8 	ldapurb	w8, \[x15\]
+[^:]+:\s+1940006c 	ldapurb	w12, \[x3\]
+[^:]+:\s+1940016c 	ldapurb	w12, \[x11\]
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+[^:]+:\s+19400060 	ldapurb	w0, \[x3\]
+[^:]+:\s+19400160 	ldapurb	w0, \[x11\]
+[^:]+:\s+194001e0 	ldapurb	w0, \[x15\]
+[^:]+:\s+19400068 	ldapurb	w8, \[x3\]
+[^:]+:\s+19400168 	ldapurb	w8, \[x11\]
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+[^:]+:\s+1940016c 	ldapurb	w12, \[x11\]
+[^:]+:\s+194001ec 	ldapurb	w12, \[x15\]
+[^:]+:\s+194003e0 	ldapurb	w0, \[sp\]
+[^:]+:\s+194003e7 	ldapurb	w7, \[sp\]
+[^:]+:\s+194003f0 	ldapurb	w16, \[sp\]
+[^:]+:\s+194003fe 	ldapurb	w30, \[sp\]
+[^:]+:\s+19403002 	ldapurb	w2, \[x0, #3\]
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+[^:]+:\s+19403102 	ldapurb	w2, \[x8, #3\]
+[^:]+:\s+1940b102 	ldapurb	w2, \[x8, #11\]
+[^:]+:\s+1940f102 	ldapurb	w2, \[x8, #15\]
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+[^:]+:\s+1940b182 	ldapurb	w2, \[x12, #11\]
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+[^:]+:\s+1940f10f 	ldapurb	w15, \[x8, #15\]
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+[^:]+:\s+1940b18f 	ldapurb	w15, \[x12, #11\]
+[^:]+:\s+1940f18f 	ldapurb	w15, \[x12, #15\]
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+[^:]+:\s+1940311e 	ldapurb	w30, \[x8, #3\]
+[^:]+:\s+1940b11e 	ldapurb	w30, \[x8, #11\]
+[^:]+:\s+1940f11e 	ldapurb	w30, \[x8, #15\]
+[^:]+:\s+1940319e 	ldapurb	w30, \[x12, #3\]
+[^:]+:\s+1940b19e 	ldapurb	w30, \[x12, #11\]
+[^:]+:\s+1940f19e 	ldapurb	w30, \[x12, #15\]
+[^:]+:\s+19403002 	ldapurb	w2, \[x0, #3\]
+[^:]+:\s+1940b002 	ldapurb	w2, \[x0, #11\]
+[^:]+:\s+1940f002 	ldapurb	w2, \[x0, #15\]
+[^:]+:\s+19403102 	ldapurb	w2, \[x8, #3\]
+[^:]+:\s+1940b102 	ldapurb	w2, \[x8, #11\]
+[^:]+:\s+1940f102 	ldapurb	w2, \[x8, #15\]
+[^:]+:\s+19403182 	ldapurb	w2, \[x12, #3\]
+[^:]+:\s+1940b182 	ldapurb	w2, \[x12, #11\]
+[^:]+:\s+1940f182 	ldapurb	w2, \[x12, #15\]
+[^:]+:\s+1940300f 	ldapurb	w15, \[x0, #3\]
+[^:]+:\s+1940b00f 	ldapurb	w15, \[x0, #11\]
+[^:]+:\s+1940f00f 	ldapurb	w15, \[x0, #15\]
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+[^:]+:\s+1940b10f 	ldapurb	w15, \[x8, #11\]
+[^:]+:\s+1940f10f 	ldapurb	w15, \[x8, #15\]
+[^:]+:\s+1940318f 	ldapurb	w15, \[x12, #3\]
+[^:]+:\s+1940b18f 	ldapurb	w15, \[x12, #11\]
+[^:]+:\s+1940f18f 	ldapurb	w15, \[x12, #15\]
+[^:]+:\s+1940301e 	ldapurb	w30, \[x0, #3\]
+[^:]+:\s+1940b01e 	ldapurb	w30, \[x0, #11\]
+[^:]+:\s+1940f01e 	ldapurb	w30, \[x0, #15\]
+[^:]+:\s+1940311e 	ldapurb	w30, \[x8, #3\]
+[^:]+:\s+1940b11e 	ldapurb	w30, \[x8, #11\]
+[^:]+:\s+1940f11e 	ldapurb	w30, \[x8, #15\]
+[^:]+:\s+1940319e 	ldapurb	w30, \[x12, #3\]
+[^:]+:\s+1940b19e 	ldapurb	w30, \[x12, #11\]
+[^:]+:\s+1940f19e 	ldapurb	w30, \[x12, #15\]
+[^:]+:\s+19403002 	ldapurb	w2, \[x0, #3\]
+[^:]+:\s+1940b002 	ldapurb	w2, \[x0, #11\]
+[^:]+:\s+1940f002 	ldapurb	w2, \[x0, #15\]
+[^:]+:\s+19403102 	ldapurb	w2, \[x8, #3\]
+[^:]+:\s+1940b102 	ldapurb	w2, \[x8, #11\]
+[^:]+:\s+1940f102 	ldapurb	w2, \[x8, #15\]
+[^:]+:\s+19403182 	ldapurb	w2, \[x12, #3\]
+[^:]+:\s+1940b182 	ldapurb	w2, \[x12, #11\]
+[^:]+:\s+1940f182 	ldapurb	w2, \[x12, #15\]
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+[^:]+:\s+9900b002 	stlur	w2, \[x0, #11\]
+[^:]+:\s+9900f002 	stlur	w2, \[x0, #15\]
+[^:]+:\s+99003102 	stlur	w2, \[x8, #3\]
+[^:]+:\s+9900b102 	stlur	w2, \[x8, #11\]
+[^:]+:\s+9900f102 	stlur	w2, \[x8, #15\]
+[^:]+:\s+99003182 	stlur	w2, \[x12, #3\]
+[^:]+:\s+9900b182 	stlur	w2, \[x12, #11\]
+[^:]+:\s+9900f182 	stlur	w2, \[x12, #15\]
+[^:]+:\s+9900300f 	stlur	w15, \[x0, #3\]
+[^:]+:\s+9900b00f 	stlur	w15, \[x0, #11\]
+[^:]+:\s+9900f00f 	stlur	w15, \[x0, #15\]
+[^:]+:\s+9900310f 	stlur	w15, \[x8, #3\]
+[^:]+:\s+9900b10f 	stlur	w15, \[x8, #11\]
+[^:]+:\s+9900f10f 	stlur	w15, \[x8, #15\]
+[^:]+:\s+9900318f 	stlur	w15, \[x12, #3\]
+[^:]+:\s+9900b18f 	stlur	w15, \[x12, #11\]
+[^:]+:\s+9900f18f 	stlur	w15, \[x12, #15\]
+[^:]+:\s+9900301e 	stlur	w30, \[x0, #3\]
+[^:]+:\s+9900b01e 	stlur	w30, \[x0, #11\]
+[^:]+:\s+9900f01e 	stlur	w30, \[x0, #15\]
+[^:]+:\s+9900311e 	stlur	w30, \[x8, #3\]
+[^:]+:\s+9900b11e 	stlur	w30, \[x8, #11\]
+[^:]+:\s+9900f11e 	stlur	w30, \[x8, #15\]
+[^:]+:\s+9900319e 	stlur	w30, \[x12, #3\]
+[^:]+:\s+9900b19e 	stlur	w30, \[x12, #11\]
+[^:]+:\s+9900f19e 	stlur	w30, \[x12, #15\]
+[^:]+:\s+99003002 	stlur	w2, \[x0, #3\]
+[^:]+:\s+9900b002 	stlur	w2, \[x0, #11\]
+[^:]+:\s+9900f002 	stlur	w2, \[x0, #15\]
+[^:]+:\s+99003102 	stlur	w2, \[x8, #3\]
+[^:]+:\s+9900b102 	stlur	w2, \[x8, #11\]
+[^:]+:\s+9900f102 	stlur	w2, \[x8, #15\]
+[^:]+:\s+99003182 	stlur	w2, \[x12, #3\]
+[^:]+:\s+9900b182 	stlur	w2, \[x12, #11\]
+[^:]+:\s+9900f182 	stlur	w2, \[x12, #15\]
+[^:]+:\s+9900300f 	stlur	w15, \[x0, #3\]
+[^:]+:\s+9900b00f 	stlur	w15, \[x0, #11\]
+[^:]+:\s+9900f00f 	stlur	w15, \[x0, #15\]
+[^:]+:\s+9900310f 	stlur	w15, \[x8, #3\]
+[^:]+:\s+9900b10f 	stlur	w15, \[x8, #11\]
+[^:]+:\s+9900f10f 	stlur	w15, \[x8, #15\]
+[^:]+:\s+9900318f 	stlur	w15, \[x12, #3\]
+[^:]+:\s+9900b18f 	stlur	w15, \[x12, #11\]
+[^:]+:\s+9900f18f 	stlur	w15, \[x12, #15\]
+[^:]+:\s+9900301e 	stlur	w30, \[x0, #3\]
+[^:]+:\s+9900b01e 	stlur	w30, \[x0, #11\]
+[^:]+:\s+9900f01e 	stlur	w30, \[x0, #15\]
+[^:]+:\s+9900311e 	stlur	w30, \[x8, #3\]
+[^:]+:\s+9900b11e 	stlur	w30, \[x8, #11\]
+[^:]+:\s+9900f11e 	stlur	w30, \[x8, #15\]
+[^:]+:\s+9900319e 	stlur	w30, \[x12, #3\]
+[^:]+:\s+9900b19e 	stlur	w30, \[x12, #11\]
+[^:]+:\s+9900f19e 	stlur	w30, \[x12, #15\]
+[^:]+:\s+990033e0 	stlur	w0, \[sp, #3\]
+[^:]+:\s+990523e0 	stlur	w0, \[sp, #82\]
+[^:]+:\s+9900d3e0 	stlur	w0, \[sp, #13\]
+[^:]+:\s+990033e7 	stlur	w7, \[sp, #3\]
+[^:]+:\s+990523e7 	stlur	w7, \[sp, #82\]
+[^:]+:\s+9900d3e7 	stlur	w7, \[sp, #13\]
+[^:]+:\s+990033f0 	stlur	w16, \[sp, #3\]
+[^:]+:\s+990523f0 	stlur	w16, \[sp, #82\]
+[^:]+:\s+9900d3f0 	stlur	w16, \[sp, #13\]
+[^:]+:\s+990033fe 	stlur	w30, \[sp, #3\]
+[^:]+:\s+990523fe 	stlur	w30, \[sp, #82\]
+[^:]+:\s+9900d3fe 	stlur	w30, \[sp, #13\]
+[^:]+:\s+d9000060 	stlur	x0, \[x3\]
+[^:]+:\s+d9000160 	stlur	x0, \[x11\]
+[^:]+:\s+d90001e0 	stlur	x0, \[x15\]
+[^:]+:\s+d9000068 	stlur	x8, \[x3\]
+[^:]+:\s+d9000168 	stlur	x8, \[x11\]
+[^:]+:\s+d90001e8 	stlur	x8, \[x15\]
+[^:]+:\s+d900006c 	stlur	x12, \[x3\]
+[^:]+:\s+d900016c 	stlur	x12, \[x11\]
+[^:]+:\s+d90001ec 	stlur	x12, \[x15\]
+[^:]+:\s+d9000060 	stlur	x0, \[x3\]
+[^:]+:\s+d9000160 	stlur	x0, \[x11\]
+[^:]+:\s+d90001e0 	stlur	x0, \[x15\]
+[^:]+:\s+d9000068 	stlur	x8, \[x3\]
+[^:]+:\s+d9000168 	stlur	x8, \[x11\]
+[^:]+:\s+d90001e8 	stlur	x8, \[x15\]
+[^:]+:\s+d900006c 	stlur	x12, \[x3\]
+[^:]+:\s+d900016c 	stlur	x12, \[x11\]
+[^:]+:\s+d90001ec 	stlur	x12, \[x15\]
+[^:]+:\s+d9000060 	stlur	x0, \[x3\]
+[^:]+:\s+d9000160 	stlur	x0, \[x11\]
+[^:]+:\s+d90001e0 	stlur	x0, \[x15\]
+[^:]+:\s+d9000068 	stlur	x8, \[x3\]
+[^:]+:\s+d9000168 	stlur	x8, \[x11\]
+[^:]+:\s+d90001e8 	stlur	x8, \[x15\]
+[^:]+:\s+d900006c 	stlur	x12, \[x3\]
+[^:]+:\s+d900016c 	stlur	x12, \[x11\]
+[^:]+:\s+d90001ec 	stlur	x12, \[x15\]
+[^:]+:\s+d9000060 	stlur	x0, \[x3\]
+[^:]+:\s+d9000160 	stlur	x0, \[x11\]
+[^:]+:\s+d90001e0 	stlur	x0, \[x15\]
+[^:]+:\s+d9000068 	stlur	x8, \[x3\]
+[^:]+:\s+d9000168 	stlur	x8, \[x11\]
+[^:]+:\s+d90001e8 	stlur	x8, \[x15\]
+[^:]+:\s+d900006c 	stlur	x12, \[x3\]
+[^:]+:\s+d900016c 	stlur	x12, \[x11\]
+[^:]+:\s+d90001ec 	stlur	x12, \[x15\]
+[^:]+:\s+d90003e0 	stlur	x0, \[sp\]
+[^:]+:\s+d90003e7 	stlur	x7, \[sp\]
+[^:]+:\s+d90003f0 	stlur	x16, \[sp\]
+[^:]+:\s+d90003fe 	stlur	x30, \[sp\]
+[^:]+:\s+d9003002 	stlur	x2, \[x0, #3\]
+[^:]+:\s+d900b002 	stlur	x2, \[x0, #11\]
+[^:]+:\s+d900f002 	stlur	x2, \[x0, #15\]
+[^:]+:\s+d9003102 	stlur	x2, \[x8, #3\]
+[^:]+:\s+d900b102 	stlur	x2, \[x8, #11\]
+[^:]+:\s+d900f102 	stlur	x2, \[x8, #15\]
+[^:]+:\s+d9003182 	stlur	x2, \[x12, #3\]
+[^:]+:\s+d900b182 	stlur	x2, \[x12, #11\]
+[^:]+:\s+d900f182 	stlur	x2, \[x12, #15\]
+[^:]+:\s+d900300f 	stlur	x15, \[x0, #3\]
+[^:]+:\s+d900b00f 	stlur	x15, \[x0, #11\]
+[^:]+:\s+d900f00f 	stlur	x15, \[x0, #15\]
+[^:]+:\s+d900310f 	stlur	x15, \[x8, #3\]
+[^:]+:\s+d900b10f 	stlur	x15, \[x8, #11\]
+[^:]+:\s+d900f10f 	stlur	x15, \[x8, #15\]
+[^:]+:\s+d900318f 	stlur	x15, \[x12, #3\]
+[^:]+:\s+d900b18f 	stlur	x15, \[x12, #11\]
+[^:]+:\s+d900f18f 	stlur	x15, \[x12, #15\]
+[^:]+:\s+d900301e 	stlur	x30, \[x0, #3\]
+[^:]+:\s+d900b01e 	stlur	x30, \[x0, #11\]
+[^:]+:\s+d900f01e 	stlur	x30, \[x0, #15\]
+[^:]+:\s+d900311e 	stlur	x30, \[x8, #3\]
+[^:]+:\s+d900b11e 	stlur	x30, \[x8, #11\]
+[^:]+:\s+d900f11e 	stlur	x30, \[x8, #15\]
+[^:]+:\s+d900319e 	stlur	x30, \[x12, #3\]
+[^:]+:\s+d900b19e 	stlur	x30, \[x12, #11\]
+[^:]+:\s+d900f19e 	stlur	x30, \[x12, #15\]
+[^:]+:\s+d9003002 	stlur	x2, \[x0, #3\]
+[^:]+:\s+d900b002 	stlur	x2, \[x0, #11\]
+[^:]+:\s+d900f002 	stlur	x2, \[x0, #15\]
+[^:]+:\s+d9003102 	stlur	x2, \[x8, #3\]
+[^:]+:\s+d900b102 	stlur	x2, \[x8, #11\]
+[^:]+:\s+d900f102 	stlur	x2, \[x8, #15\]
+[^:]+:\s+d9003182 	stlur	x2, \[x12, #3\]
+[^:]+:\s+d900b182 	stlur	x2, \[x12, #11\]
+[^:]+:\s+d900f182 	stlur	x2, \[x12, #15\]
+[^:]+:\s+d900300f 	stlur	x15, \[x0, #3\]
+[^:]+:\s+d900b00f 	stlur	x15, \[x0, #11\]
+[^:]+:\s+d900f00f 	stlur	x15, \[x0, #15\]
+[^:]+:\s+d900310f 	stlur	x15, \[x8, #3\]
+[^:]+:\s+d900b10f 	stlur	x15, \[x8, #11\]
+[^:]+:\s+d900f10f 	stlur	x15, \[x8, #15\]
+[^:]+:\s+d900318f 	stlur	x15, \[x12, #3\]
+[^:]+:\s+d900b18f 	stlur	x15, \[x12, #11\]
+[^:]+:\s+d900f18f 	stlur	x15, \[x12, #15\]
+[^:]+:\s+d900301e 	stlur	x30, \[x0, #3\]
+[^:]+:\s+d900b01e 	stlur	x30, \[x0, #11\]
+[^:]+:\s+d900f01e 	stlur	x30, \[x0, #15\]
+[^:]+:\s+d900311e 	stlur	x30, \[x8, #3\]
+[^:]+:\s+d900b11e 	stlur	x30, \[x8, #11\]
+[^:]+:\s+d900f11e 	stlur	x30, \[x8, #15\]
+[^:]+:\s+d900319e 	stlur	x30, \[x12, #3\]
+[^:]+:\s+d900b19e 	stlur	x30, \[x12, #11\]
+[^:]+:\s+d900f19e 	stlur	x30, \[x12, #15\]
+[^:]+:\s+d9003002 	stlur	x2, \[x0, #3\]
+[^:]+:\s+d900b002 	stlur	x2, \[x0, #11\]
+[^:]+:\s+d900f002 	stlur	x2, \[x0, #15\]
+[^:]+:\s+d9003102 	stlur	x2, \[x8, #3\]
+[^:]+:\s+d900b102 	stlur	x2, \[x8, #11\]
+[^:]+:\s+d900f102 	stlur	x2, \[x8, #15\]
+[^:]+:\s+d9003182 	stlur	x2, \[x12, #3\]
+[^:]+:\s+d900b182 	stlur	x2, \[x12, #11\]
+[^:]+:\s+d900f182 	stlur	x2, \[x12, #15\]
+[^:]+:\s+d900300f 	stlur	x15, \[x0, #3\]
+[^:]+:\s+d900b00f 	stlur	x15, \[x0, #11\]
+[^:]+:\s+d900f00f 	stlur	x15, \[x0, #15\]
+[^:]+:\s+d900310f 	stlur	x15, \[x8, #3\]
+[^:]+:\s+d900b10f 	stlur	x15, \[x8, #11\]
+[^:]+:\s+d900f10f 	stlur	x15, \[x8, #15\]
+[^:]+:\s+d900318f 	stlur	x15, \[x12, #3\]
+[^:]+:\s+d900b18f 	stlur	x15, \[x12, #11\]
+[^:]+:\s+d900f18f 	stlur	x15, \[x12, #15\]
+[^:]+:\s+d900301e 	stlur	x30, \[x0, #3\]
+[^:]+:\s+d900b01e 	stlur	x30, \[x0, #11\]
+[^:]+:\s+d900f01e 	stlur	x30, \[x0, #15\]
+[^:]+:\s+d900311e 	stlur	x30, \[x8, #3\]
+[^:]+:\s+d900b11e 	stlur	x30, \[x8, #11\]
+[^:]+:\s+d900f11e 	stlur	x30, \[x8, #15\]
+[^:]+:\s+d900319e 	stlur	x30, \[x12, #3\]
+[^:]+:\s+d900b19e 	stlur	x30, \[x12, #11\]
+[^:]+:\s+d900f19e 	stlur	x30, \[x12, #15\]
+[^:]+:\s+d9003002 	stlur	x2, \[x0, #3\]
+[^:]+:\s+d900b002 	stlur	x2, \[x0, #11\]
+[^:]+:\s+d900f002 	stlur	x2, \[x0, #15\]
+[^:]+:\s+d9003102 	stlur	x2, \[x8, #3\]
+[^:]+:\s+d900b102 	stlur	x2, \[x8, #11\]
+[^:]+:\s+d900f102 	stlur	x2, \[x8, #15\]
+[^:]+:\s+d9003182 	stlur	x2, \[x12, #3\]
+[^:]+:\s+d900b182 	stlur	x2, \[x12, #11\]
+[^:]+:\s+d900f182 	stlur	x2, \[x12, #15\]
+[^:]+:\s+d900300f 	stlur	x15, \[x0, #3\]
+[^:]+:\s+d900b00f 	stlur	x15, \[x0, #11\]
+[^:]+:\s+d900f00f 	stlur	x15, \[x0, #15\]
+[^:]+:\s+d900310f 	stlur	x15, \[x8, #3\]
+[^:]+:\s+d900b10f 	stlur	x15, \[x8, #11\]
+[^:]+:\s+d900f10f 	stlur	x15, \[x8, #15\]
+[^:]+:\s+d900318f 	stlur	x15, \[x12, #3\]
+[^:]+:\s+d900b18f 	stlur	x15, \[x12, #11\]
+[^:]+:\s+d900f18f 	stlur	x15, \[x12, #15\]
+[^:]+:\s+d900301e 	stlur	x30, \[x0, #3\]
+[^:]+:\s+d900b01e 	stlur	x30, \[x0, #11\]
+[^:]+:\s+d900f01e 	stlur	x30, \[x0, #15\]
+[^:]+:\s+d900311e 	stlur	x30, \[x8, #3\]
+[^:]+:\s+d900b11e 	stlur	x30, \[x8, #11\]
+[^:]+:\s+d900f11e 	stlur	x30, \[x8, #15\]
+[^:]+:\s+d900319e 	stlur	x30, \[x12, #3\]
+[^:]+:\s+d900b19e 	stlur	x30, \[x12, #11\]
+[^:]+:\s+d900f19e 	stlur	x30, \[x12, #15\]
+[^:]+:\s+d90033e0 	stlur	x0, \[sp, #3\]
+[^:]+:\s+d90523e0 	stlur	x0, \[sp, #82\]
+[^:]+:\s+d900d3e0 	stlur	x0, \[sp, #13\]
+[^:]+:\s+d90033e7 	stlur	x7, \[sp, #3\]
+[^:]+:\s+d90523e7 	stlur	x7, \[sp, #82\]
+[^:]+:\s+d900d3e7 	stlur	x7, \[sp, #13\]
+[^:]+:\s+d90033f0 	stlur	x16, \[sp, #3\]
+[^:]+:\s+d90523f0 	stlur	x16, \[sp, #82\]
+[^:]+:\s+d900d3f0 	stlur	x16, \[sp, #13\]
+[^:]+:\s+d90033fe 	stlur	x30, \[sp, #3\]
+[^:]+:\s+d90523fe 	stlur	x30, \[sp, #82\]
+[^:]+:\s+d900d3fe 	stlur	x30, \[sp, #13\]
+[^:]+:\s+99400060 	ldapur	w0, \[x3\]
+[^:]+:\s+99400160 	ldapur	w0, \[x11\]
+[^:]+:\s+994001e0 	ldapur	w0, \[x15\]
+[^:]+:\s+99400068 	ldapur	w8, \[x3\]
+[^:]+:\s+99400168 	ldapur	w8, \[x11\]
+[^:]+:\s+994001e8 	ldapur	w8, \[x15\]
+[^:]+:\s+9940006c 	ldapur	w12, \[x3\]
+[^:]+:\s+9940016c 	ldapur	w12, \[x11\]
+[^:]+:\s+994001ec 	ldapur	w12, \[x15\]
+[^:]+:\s+99400060 	ldapur	w0, \[x3\]
+[^:]+:\s+99400160 	ldapur	w0, \[x11\]
+[^:]+:\s+994001e0 	ldapur	w0, \[x15\]
+[^:]+:\s+99400068 	ldapur	w8, \[x3\]
+[^:]+:\s+99400168 	ldapur	w8, \[x11\]
+[^:]+:\s+994001e8 	ldapur	w8, \[x15\]
+[^:]+:\s+9940006c 	ldapur	w12, \[x3\]
+[^:]+:\s+9940016c 	ldapur	w12, \[x11\]
+[^:]+:\s+994001ec 	ldapur	w12, \[x15\]
+[^:]+:\s+99400060 	ldapur	w0, \[x3\]
+[^:]+:\s+99400160 	ldapur	w0, \[x11\]
+[^:]+:\s+994001e0 	ldapur	w0, \[x15\]
+[^:]+:\s+99400068 	ldapur	w8, \[x3\]
+[^:]+:\s+99400168 	ldapur	w8, \[x11\]
+[^:]+:\s+994001e8 	ldapur	w8, \[x15\]
+[^:]+:\s+9940006c 	ldapur	w12, \[x3\]
+[^:]+:\s+9940016c 	ldapur	w12, \[x11\]
+[^:]+:\s+994001ec 	ldapur	w12, \[x15\]
+[^:]+:\s+99400060 	ldapur	w0, \[x3\]
+[^:]+:\s+99400160 	ldapur	w0, \[x11\]
+[^:]+:\s+994001e0 	ldapur	w0, \[x15\]
+[^:]+:\s+99400068 	ldapur	w8, \[x3\]
+[^:]+:\s+99400168 	ldapur	w8, \[x11\]
+[^:]+:\s+994001e8 	ldapur	w8, \[x15\]
+[^:]+:\s+9940006c 	ldapur	w12, \[x3\]
+[^:]+:\s+9940016c 	ldapur	w12, \[x11\]
+[^:]+:\s+994001ec 	ldapur	w12, \[x15\]
+[^:]+:\s+994003e0 	ldapur	w0, \[sp\]
+[^:]+:\s+994003e7 	ldapur	w7, \[sp\]
+[^:]+:\s+994003f0 	ldapur	w16, \[sp\]
+[^:]+:\s+994003fe 	ldapur	w30, \[sp\]
+[^:]+:\s+99403002 	ldapur	w2, \[x0, #3\]
+[^:]+:\s+9940b002 	ldapur	w2, \[x0, #11\]
+[^:]+:\s+9940f002 	ldapur	w2, \[x0, #15\]
+[^:]+:\s+99403102 	ldapur	w2, \[x8, #3\]
+[^:]+:\s+9940b102 	ldapur	w2, \[x8, #11\]
+[^:]+:\s+9940f102 	ldapur	w2, \[x8, #15\]
+[^:]+:\s+99403182 	ldapur	w2, \[x12, #3\]
+[^:]+:\s+9940b182 	ldapur	w2, \[x12, #11\]
+[^:]+:\s+9940f182 	ldapur	w2, \[x12, #15\]
+[^:]+:\s+9940300f 	ldapur	w15, \[x0, #3\]
+[^:]+:\s+9940b00f 	ldapur	w15, \[x0, #11\]
+[^:]+:\s+9940f00f 	ldapur	w15, \[x0, #15\]
+[^:]+:\s+9940310f 	ldapur	w15, \[x8, #3\]
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+[^:]+:\s+9940f10f 	ldapur	w15, \[x8, #15\]
+[^:]+:\s+9940318f 	ldapur	w15, \[x12, #3\]
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+[^:]+:\s+9940f18f 	ldapur	w15, \[x12, #15\]
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+[^:]+:\s+99800068 	ldapursw	x8, \[x3\]
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+[^:]+:\s+998001e8 	ldapursw	x8, \[x15\]
+[^:]+:\s+9980006c 	ldapursw	x12, \[x3\]
+[^:]+:\s+9980016c 	ldapursw	x12, \[x11\]
+[^:]+:\s+998001ec 	ldapursw	x12, \[x15\]
+[^:]+:\s+99800060 	ldapursw	x0, \[x3\]
+[^:]+:\s+99800160 	ldapursw	x0, \[x11\]
+[^:]+:\s+998001e0 	ldapursw	x0, \[x15\]
+[^:]+:\s+99800068 	ldapursw	x8, \[x3\]
+[^:]+:\s+99800168 	ldapursw	x8, \[x11\]
+[^:]+:\s+998001e8 	ldapursw	x8, \[x15\]
+[^:]+:\s+9980006c 	ldapursw	x12, \[x3\]
+[^:]+:\s+9980016c 	ldapursw	x12, \[x11\]
+[^:]+:\s+998001ec 	ldapursw	x12, \[x15\]
+[^:]+:\s+998003e0 	ldapursw	x0, \[sp\]
+[^:]+:\s+998003e7 	ldapursw	x7, \[sp\]
+[^:]+:\s+998003f0 	ldapursw	x16, \[sp\]
+[^:]+:\s+998003fe 	ldapursw	x30, \[sp\]
+[^:]+:\s+99803002 	ldapursw	x2, \[x0, #3\]
+[^:]+:\s+9980b002 	ldapursw	x2, \[x0, #11\]
+[^:]+:\s+9980f002 	ldapursw	x2, \[x0, #15\]
+[^:]+:\s+99803102 	ldapursw	x2, \[x8, #3\]
+[^:]+:\s+9980b102 	ldapursw	x2, \[x8, #11\]
+[^:]+:\s+9980f102 	ldapursw	x2, \[x8, #15\]
+[^:]+:\s+99803182 	ldapursw	x2, \[x12, #3\]
+[^:]+:\s+9980b182 	ldapursw	x2, \[x12, #11\]
+[^:]+:\s+9980f182 	ldapursw	x2, \[x12, #15\]
+[^:]+:\s+9980300f 	ldapursw	x15, \[x0, #3\]
+[^:]+:\s+9980b00f 	ldapursw	x15, \[x0, #11\]
+[^:]+:\s+9980f00f 	ldapursw	x15, \[x0, #15\]
+[^:]+:\s+9980310f 	ldapursw	x15, \[x8, #3\]
+[^:]+:\s+9980b10f 	ldapursw	x15, \[x8, #11\]
+[^:]+:\s+9980f10f 	ldapursw	x15, \[x8, #15\]
+[^:]+:\s+9980318f 	ldapursw	x15, \[x12, #3\]
+[^:]+:\s+9980b18f 	ldapursw	x15, \[x12, #11\]
+[^:]+:\s+9980f18f 	ldapursw	x15, \[x12, #15\]
+[^:]+:\s+9980301e 	ldapursw	x30, \[x0, #3\]
+[^:]+:\s+9980b01e 	ldapursw	x30, \[x0, #11\]
+[^:]+:\s+9980f01e 	ldapursw	x30, \[x0, #15\]
+[^:]+:\s+9980311e 	ldapursw	x30, \[x8, #3\]
+[^:]+:\s+9980b11e 	ldapursw	x30, \[x8, #11\]
+[^:]+:\s+9980f11e 	ldapursw	x30, \[x8, #15\]
+[^:]+:\s+9980319e 	ldapursw	x30, \[x12, #3\]
+[^:]+:\s+9980b19e 	ldapursw	x30, \[x12, #11\]
+[^:]+:\s+9980f19e 	ldapursw	x30, \[x12, #15\]
+[^:]+:\s+99803002 	ldapursw	x2, \[x0, #3\]
+[^:]+:\s+9980b002 	ldapursw	x2, \[x0, #11\]
+[^:]+:\s+9980f002 	ldapursw	x2, \[x0, #15\]
+[^:]+:\s+99803102 	ldapursw	x2, \[x8, #3\]
+[^:]+:\s+9980b102 	ldapursw	x2, \[x8, #11\]
+[^:]+:\s+9980f102 	ldapursw	x2, \[x8, #15\]
+[^:]+:\s+99803182 	ldapursw	x2, \[x12, #3\]
+[^:]+:\s+9980b182 	ldapursw	x2, \[x12, #11\]
+[^:]+:\s+9980f182 	ldapursw	x2, \[x12, #15\]
+[^:]+:\s+9980300f 	ldapursw	x15, \[x0, #3\]
+[^:]+:\s+9980b00f 	ldapursw	x15, \[x0, #11\]
+[^:]+:\s+9980f00f 	ldapursw	x15, \[x0, #15\]
+[^:]+:\s+9980310f 	ldapursw	x15, \[x8, #3\]
+[^:]+:\s+9980b10f 	ldapursw	x15, \[x8, #11\]
+[^:]+:\s+9980f10f 	ldapursw	x15, \[x8, #15\]
+[^:]+:\s+9980318f 	ldapursw	x15, \[x12, #3\]
+[^:]+:\s+9980b18f 	ldapursw	x15, \[x12, #11\]
+[^:]+:\s+9980f18f 	ldapursw	x15, \[x12, #15\]
+[^:]+:\s+9980301e 	ldapursw	x30, \[x0, #3\]
+[^:]+:\s+9980b01e 	ldapursw	x30, \[x0, #11\]
+[^:]+:\s+9980f01e 	ldapursw	x30, \[x0, #15\]
+[^:]+:\s+9980311e 	ldapursw	x30, \[x8, #3\]
+[^:]+:\s+9980b11e 	ldapursw	x30, \[x8, #11\]
+[^:]+:\s+9980f11e 	ldapursw	x30, \[x8, #15\]
+[^:]+:\s+9980319e 	ldapursw	x30, \[x12, #3\]
+[^:]+:\s+9980b19e 	ldapursw	x30, \[x12, #11\]
+[^:]+:\s+9980f19e 	ldapursw	x30, \[x12, #15\]
+[^:]+:\s+99803002 	ldapursw	x2, \[x0, #3\]
+[^:]+:\s+9980b002 	ldapursw	x2, \[x0, #11\]
+[^:]+:\s+9980f002 	ldapursw	x2, \[x0, #15\]
+[^:]+:\s+99803102 	ldapursw	x2, \[x8, #3\]
+[^:]+:\s+9980b102 	ldapursw	x2, \[x8, #11\]
+[^:]+:\s+9980f102 	ldapursw	x2, \[x8, #15\]
+[^:]+:\s+99803182 	ldapursw	x2, \[x12, #3\]
+[^:]+:\s+9980b182 	ldapursw	x2, \[x12, #11\]
+[^:]+:\s+9980f182 	ldapursw	x2, \[x12, #15\]
+[^:]+:\s+9980300f 	ldapursw	x15, \[x0, #3\]
+[^:]+:\s+9980b00f 	ldapursw	x15, \[x0, #11\]
+[^:]+:\s+9980f00f 	ldapursw	x15, \[x0, #15\]
+[^:]+:\s+9980310f 	ldapursw	x15, \[x8, #3\]
+[^:]+:\s+9980b10f 	ldapursw	x15, \[x8, #11\]
+[^:]+:\s+9980f10f 	ldapursw	x15, \[x8, #15\]
+[^:]+:\s+9980318f 	ldapursw	x15, \[x12, #3\]
+[^:]+:\s+9980b18f 	ldapursw	x15, \[x12, #11\]
+[^:]+:\s+9980f18f 	ldapursw	x15, \[x12, #15\]
+[^:]+:\s+9980301e 	ldapursw	x30, \[x0, #3\]
+[^:]+:\s+9980b01e 	ldapursw	x30, \[x0, #11\]
+[^:]+:\s+9980f01e 	ldapursw	x30, \[x0, #15\]
+[^:]+:\s+9980311e 	ldapursw	x30, \[x8, #3\]
+[^:]+:\s+9980b11e 	ldapursw	x30, \[x8, #11\]
+[^:]+:\s+9980f11e 	ldapursw	x30, \[x8, #15\]
+[^:]+:\s+9980319e 	ldapursw	x30, \[x12, #3\]
+[^:]+:\s+9980b19e 	ldapursw	x30, \[x12, #11\]
+[^:]+:\s+9980f19e 	ldapursw	x30, \[x12, #15\]
+[^:]+:\s+99803002 	ldapursw	x2, \[x0, #3\]
+[^:]+:\s+9980b002 	ldapursw	x2, \[x0, #11\]
+[^:]+:\s+9980f002 	ldapursw	x2, \[x0, #15\]
+[^:]+:\s+99803102 	ldapursw	x2, \[x8, #3\]
+[^:]+:\s+9980b102 	ldapursw	x2, \[x8, #11\]
+[^:]+:\s+9980f102 	ldapursw	x2, \[x8, #15\]
+[^:]+:\s+99803182 	ldapursw	x2, \[x12, #3\]
+[^:]+:\s+9980b182 	ldapursw	x2, \[x12, #11\]
+[^:]+:\s+9980f182 	ldapursw	x2, \[x12, #15\]
+[^:]+:\s+9980300f 	ldapursw	x15, \[x0, #3\]
+[^:]+:\s+9980b00f 	ldapursw	x15, \[x0, #11\]
+[^:]+:\s+9980f00f 	ldapursw	x15, \[x0, #15\]
+[^:]+:\s+9980310f 	ldapursw	x15, \[x8, #3\]
+[^:]+:\s+9980b10f 	ldapursw	x15, \[x8, #11\]
+[^:]+:\s+9980f10f 	ldapursw	x15, \[x8, #15\]
+[^:]+:\s+9980318f 	ldapursw	x15, \[x12, #3\]
+[^:]+:\s+9980b18f 	ldapursw	x15, \[x12, #11\]
+[^:]+:\s+9980f18f 	ldapursw	x15, \[x12, #15\]
+[^:]+:\s+9980301e 	ldapursw	x30, \[x0, #3\]
+[^:]+:\s+9980b01e 	ldapursw	x30, \[x0, #11\]
+[^:]+:\s+9980f01e 	ldapursw	x30, \[x0, #15\]
+[^:]+:\s+9980311e 	ldapursw	x30, \[x8, #3\]
+[^:]+:\s+9980b11e 	ldapursw	x30, \[x8, #11\]
+[^:]+:\s+9980f11e 	ldapursw	x30, \[x8, #15\]
+[^:]+:\s+9980319e 	ldapursw	x30, \[x12, #3\]
+[^:]+:\s+9980b19e 	ldapursw	x30, \[x12, #11\]
+[^:]+:\s+9980f19e 	ldapursw	x30, \[x12, #15\]
+[^:]+:\s+998033e0 	ldapursw	x0, \[sp, #3\]
+[^:]+:\s+998523e0 	ldapursw	x0, \[sp, #82\]
+[^:]+:\s+9980d3e0 	ldapursw	x0, \[sp, #13\]
+[^:]+:\s+998033e7 	ldapursw	x7, \[sp, #3\]
+[^:]+:\s+998523e7 	ldapursw	x7, \[sp, #82\]
+[^:]+:\s+9980d3e7 	ldapursw	x7, \[sp, #13\]
+[^:]+:\s+998033f0 	ldapursw	x16, \[sp, #3\]
+[^:]+:\s+998523f0 	ldapursw	x16, \[sp, #82\]
+[^:]+:\s+9980d3f0 	ldapursw	x16, \[sp, #13\]
+[^:]+:\s+998033fe 	ldapursw	x30, \[sp, #3\]
+[^:]+:\s+998523fe 	ldapursw	x30, \[sp, #82\]
+[^:]+:\s+9980d3fe 	ldapursw	x30, \[sp, #13\]
diff --git a/gas/testsuite/gas/aarch64/rcpc2.s b/gas/testsuite/gas/aarch64/rcpc2.s
new file mode 100644
index 0000000000000000000000000000000000000000..8496dbe19877301503bc68961e683ea623571017
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc2.s
@@ -0,0 +1,143 @@
+	# Print a 4 operand instruction
+	.macro print_gen4reg op, d, pd1=, pd2=, n, pn1=, pn2=, m, pm1=, pm2=, w	, pw1=, pw2=
+	.ifnb \d
+		\op \pd1\d\()\pd2, \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
+	.else
+	.ifnb \n
+		\op \pn1\n\()\pn2, \pm1\m\()\pm2, \pw1\w\()\pw2
+	.else
+		\op \pm1\m\()\pm2, \pw1\w\()\pw2
+	.endif
+	.endif
+	.endm
+
+	.macro gen4reg_iter_d_offset op, d, pd1=, pd2=, r
+	.irp m, 03, 82, 13
+		\op \pd1\d\()\pd2, [\r, \m]
+	.endr
+	.endm
+
+	.macro gen4reg_iter_d_n_w op, d, pd1=, pd2=, n, pn1=, pn2=, m, pm1=, pm2=, pw1=, pw2=
+	.irp w, 3, 11, 15
+		print_gen4reg \op, \d, \pd1, \pd2, \n, \pn1, \pn2, \m, \pm1, \pm2, \w, \pw1, \pw2
+	.endr
+	.endm
+
+	.macro gen4reg_iter_d_n op, d, pd1=, pd2=, n, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=
+	.irp m, 0, 8, 12
+		gen4reg_iter_d_n_w \op, \d, \pd1, \pd2, \n, \pn1, \pn2, \m, \pm1, \pm2, \pw1, \pw2
+	.endr
+	.endm
+
+	.macro gen4reg_iter_d op, d, pd1=, pd2=, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=
+	.irp n, 2, 15, 30
+		gen4reg_iter_d_n \op, \d, \pd1, \pd2, \n, \pn1, \pn2, \pm1, \pm2, \pw1, \pw2
+	.endr
+	.endm
+
+	.macro gen4reg_iter op, pd1=, pd2=, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=
+	.irp d, 0, 7, 16, 30
+		gen4reg_iter_d \op, \d, \pd1, \pd2, \pn1, \pn2, \pm1, \pm2, \pw1, \pw2
+	.endr
+	.endm
+
+	# Print a 3 operand instruction
+	.macro gen3reg_iter op, pd1=, pd2=, pn1=, pn2=, pm1=, pm2=
+	.irp d, 0, 7, 16, 30
+		gen4reg_iter_d \op,,, \d, \pd1, \pd2, \pn1, \pn2, \pm1, \pm2
+	.endr
+	.endm
+
+	.macro gen3reg_iter_lane op, pn1=, pn2=, pm1=, pm2=, pw1=, pw2=, x:vararg
+	.irp l, \x
+		gen4reg_iter_d \op,,,, \pn1, \pn2, \pm1, \pm2, \pw1, \pw2[\l]
+	.endr
+	.endm
+
+	# Print a 2 operand instruction
+	.macro gen2reg_iter op, pd1=, pd2=, pn1=, pn2=
+	.irp d, 0, 7, 16, 30
+		gen4reg_iter_d_n \op,,,,,, \d, \pd1, \pd2, \pn1, \pn2
+	.endr
+	.endm
+
+	.macro gen2reg_iter_offset op, pd1=, pd2=, r
+	.irp d, 0, 7, 16, 30
+		gen4reg_iter_d_offset \op, \d, \pd1, \pd2, \r,
+	.endr
+	.endm
+
+	# Print a 1 operand instruction
+	.macro gen1reg_iter op, pd1=, pd2=
+	.irp d, 0, 7, 16, 30
+		\op \pd1\d\()\pd2
+	.endr
+	.endm
+
+	.text
+func:
+	gen2reg_iter stlurb w,,[x,]
+	gen1reg_iter stlurb w,", [sp]"
+	gen3reg_iter stlurb w,, [x,,,]
+	gen2reg_iter_offset stlurb w,,sp
+
+	gen2reg_iter ldapurb w,,[x,]
+	gen1reg_iter ldapurb w,", [sp]"
+	gen3reg_iter ldapurb w,, [x,,,]
+	gen2reg_iter_offset ldapurb w,,sp
+
+	gen2reg_iter ldapursb w,,[x,]
+	gen1reg_iter ldapursb w,", [sp]"
+	gen3reg_iter ldapursb w,, [x,,,]
+	gen2reg_iter_offset ldapursb w,,sp
+
+	gen2reg_iter ldapursb x,,[x,]
+	gen1reg_iter ldapursb x,", [sp]"
+	gen3reg_iter ldapursb x,, [x,,,]
+	gen2reg_iter_offset ldapursb x,,sp
+
+	gen2reg_iter stlurh w,,[x,]
+	gen1reg_iter stlurh w,", [sp]"
+	gen3reg_iter stlurh w,, [x,,,]
+	gen2reg_iter_offset stlurh w,,sp
+
+	gen2reg_iter ldapurh w,,[x,]
+	gen1reg_iter ldapurh w,", [sp]"
+	gen3reg_iter ldapurh w,, [x,,,]
+	gen2reg_iter_offset ldapurh w,,sp
+
+	gen2reg_iter ldapursh w,,[x,]
+	gen1reg_iter ldapursh w,", [sp]"
+	gen3reg_iter ldapursh w,, [x,,,]
+	gen2reg_iter_offset ldapursh w,,sp
+
+	gen2reg_iter ldapursh x,,[x,]
+	gen1reg_iter ldapursh x,", [sp]"
+	gen3reg_iter ldapursh x,, [x,,,]
+	gen2reg_iter_offset ldapursh x,,sp
+
+	gen2reg_iter stlur w,,[x,]
+	gen1reg_iter stlur w,", [sp]"
+	gen3reg_iter stlur w,, [x,,,]
+	gen2reg_iter_offset stlur w,,sp
+
+	gen2reg_iter stlur x,,[x,]
+	gen1reg_iter stlur x,", [sp]"
+	gen3reg_iter stlur x,, [x,,,]
+	gen2reg_iter_offset stlur x,,sp
+
+	gen2reg_iter ldapur w,,[x,]
+	gen1reg_iter ldapur w,", [sp]"
+	gen3reg_iter ldapur w,, [x,,,]
+	gen2reg_iter_offset ldapur w,,sp
+
+	gen2reg_iter ldapur x,,[x,]
+	gen1reg_iter ldapur x,", [sp]"
+	gen3reg_iter ldapur x,, [x,,,]
+	gen2reg_iter_offset ldapur x,,sp
+
+	gen2reg_iter ldapursw x,,[x,]
+	gen1reg_iter ldapursw x,", [sp]"
+	gen3reg_iter ldapursw x,, [x,,,]
+	gen2reg_iter_offset ldapursw x,,sp
+
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index eb42b87a00263cfa633e4bd6c35fd912941a15a8..6674f34ab29d06df2e26dc2e62e0365c067c9e82 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -97,6 +97,8 @@ enum aarch64_feature_bit {
   AARCH64_FEATURE_SVE,
   /* RCPC instructions.  */
   AARCH64_FEATURE_RCPC,
+  /* RCPC2 instructions.  */
+  AARCH64_FEATURE_RCPC2,
   /* Complex # instructions.  */
   AARCH64_FEATURE_COMPNUM,
   /* JavaScript conversion instructions.  */
@@ -251,6 +253,7 @@ enum aarch64_feature_bit {
 					 | AARCH64_FEATBIT (X, COMPNUM) \
 					 | AARCH64_FEATBIT (X, JSCVT))
 #define AARCH64_ARCH_V8_4A_FEATURES(X)	(AARCH64_FEATBIT (X, V8_4A)	\
+					 | AARCH64_FEATBIT (X, RCPC2)	\
 					 | AARCH64_FEATBIT (X, DOTPROD)	\
 					 | AARCH64_FEATBIT (X, FLAGM)	\
 					 | AARCH64_FEATBIT (X, F16_FML))
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 007bf018af89c4bc74e59bc70e8560caacb3eac7..1838f99a960c7348c1d36e50c0b9aba5e87b5196 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2522,6 +2522,8 @@ static const aarch64_feature_set aarch64_feature_jscvt =
   AARCH64_FEATURE (JSCVT);
 static const aarch64_feature_set aarch64_feature_rcpc =
   AARCH64_FEATURE (RCPC);
+static const aarch64_feature_set aarch64_feature_rcpc2 =
+  AARCH64_FEATURE (RCPC2);
 static const aarch64_feature_set aarch64_feature_dotprod =
   AARCH64_FEATURE (DOTPROD);
 static const aarch64_feature_set aarch64_feature_sha2 =
@@ -2635,6 +2637,7 @@ static const aarch64_feature_set aarch64_feature_d128_the =
 #define COMPNUM		&aarch64_feature_compnum
 #define JSCVT		&aarch64_feature_jscvt
 #define RCPC		&aarch64_feature_rcpc
+#define RCPC2		&aarch64_feature_rcpc2
 #define SHA2		&aarch64_feature_sha2
 #define AES		&aarch64_feature_aes
 #define ARMV8_4A	&aarch64_feature_v8_4a
@@ -2724,6 +2727,8 @@ static const aarch64_feature_set aarch64_feature_d128_the =
   { NAME, OPCODE, MASK, CLASS, 0, JSCVT, OPS, QUALS, FLAGS, 0, 0, NULL }
 #define RCPC_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, 0, RCPC, OPS, QUALS, FLAGS, 0, 0, NULL }
+#define RCPC2_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
+  { NAME, OPCODE, MASK, CLASS, 0, RCPC2, OPS, QUALS, FLAGS, 0, 0, NULL }
 #define SHA2_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, 0, SHA2, OPS, QUALS, FLAGS, 0, 0, NULL }
 #define AES_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
@@ -6040,19 +6045,19 @@ const struct aarch64_opcode aarch64_opcode_table[] =
   FLAGM_INSN ("setf8",  0x3a00080d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
   FLAGM_INSN ("setf16", 0x3a00480d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
   /* Memory access instructions ARMv8.4-a.  */
-  V8_4A_INSN ("stlurb" ,  0x19000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapurb",  0x19400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapursb", 0x19c00000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapursb", 0x19800000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
-  V8_4A_INSN ("stlurh",   0x59000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapurh",  0x59400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapursh", 0x59c00000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapursh", 0x59800000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
-  V8_4A_INSN ("stlur",    0x99000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapur",   0x99400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
-  V8_4A_INSN ("ldapursw", 0x99800000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
-  V8_4A_INSN ("stlur",    0xd9000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
-  V8_4A_INSN ("ldapur",   0xd9400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
+  RCPC2_INSN ("stlurb" ,  0x19000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapurb",  0x19400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapursb", 0x19c00000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapursb", 0x19800000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
+  RCPC2_INSN ("stlurh",   0x59000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapurh",  0x59400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapursh", 0x59c00000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapursh", 0x59800000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
+  RCPC2_INSN ("stlur",    0x99000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapur",   0x99400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
+  RCPC2_INSN ("ldapursw", 0x99800000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
+  RCPC2_INSN ("stlur",    0xd9000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
+  RCPC2_INSN ("ldapur",   0xd9400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLX, 0),
 
   /* Matrix Multiply instructions.  */
   INT8MATMUL_SVE_INSNC ("smmla",  0x45009800, 0xffe0fc00, sve_misc, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_SBB, 0, C_SCAN_MOVPRFX, 0),
