diff mbox series

RISC-V: Remove RV32EF conflict

Message ID 345c5c3b3a53eab04a1e6e91197de2642095c94f.1666185237.git.research_trasio@irq.a4lg.com
State Accepted
Headers
Series RISC-V: Remove RV32EF conflict |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Tsukasa OI Oct. 19, 2022, 1:14 p.m. UTC 
  Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
versions beginning with the version 20190608-Base-Ratified removed this
restriction.  Because the 'E' extension is still a draft, the author chose
to *just* remove the conflict (not checking the ISA version).

Note that, because RV32E is only used with a soft-float calling convention,
there's no valid official ABI for RV32EF.  It means, even if we can assemble
a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
in an unmanaged state (outside ABI management).

The purpose of this commit is to suppress unnecessary errors while parsing
an ISA string and/or disassembling, not to allow hard-float with RVE.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
	because only older specifications disallowed it.

gas/ChangeLog:

	* testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
	prohibited.
	* testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
---
 bfd/elfxx-riscv.c                           | 7 -------
 gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
 gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
 3 files changed, 12 deletions(-)
 delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
 delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l


base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15

Comments

Kito Cheng Oct. 19, 2022, 1:23 p.m. UTC | #1 
The spec has been updated for a while, and this change only removes the
limitation from the old spec, so LGTM.

On Wed, Oct 19, 2022 at 9:14 PM Tsukasa OI <research_trasio@irq.a4lg.com>
wrote:

> Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
> versions beginning with the version 20190608-Base-Ratified removed this
> restriction.  Because the 'E' extension is still a draft, the author chose
> to *just* remove the conflict (not checking the ISA version).
>
> Note that, because RV32E is only used with a soft-float calling convention,
> there's no valid official ABI for RV32EF.  It means, even if we can
> assemble
> a program with -march=rv32ef -mabi=ilp32e, floating-point registers are
> kept
> in an unmanaged state (outside ABI management).
>
> The purpose of this commit is to suppress unnecessary errors while parsing
> an ISA string and/or disassembling, not to allow hard-float with RVE.
>
> bfd/ChangeLog:
>
>         * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
>         because only older specifications disallowed it.
>
> gas/ChangeLog:
>
>         * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
>         prohibited.
>         * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
> ---
>  bfd/elfxx-riscv.c                           | 7 -------
>  gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
>  gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
>  3 files changed, 12 deletions(-)
>  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
>  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
>
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index c89b1e53e92..334a63f0873 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t
> *rps)
>        rps->error_handler (_("rv%d does not support the `q' extension"),
> xlen);
>        no_conflict = false;
>      }
> -  if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> -      && riscv_lookup_subset (rps->subset_list, "f", &subset))
> -    {
> -      rps->error_handler
> -        (_("rv32e does not support the `f' extension"));
> -      no_conflict = false;
> -    }
>    if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
>        && riscv_lookup_subset (rps->subset_list, "f", &subset))
>      {
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> deleted file mode 100644
> index d7b51c3c17d..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> +++ /dev/null
> @@ -1,3 +0,0 @@
> -#as: -march=rv32ef
> -#source: empty.s
> -#error_output: march-fail-rv32ef.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> deleted file mode 100644
> index e6d93f28fa5..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> +++ /dev/null
> @@ -1,2 +0,0 @@
> -.*Assembler messages:
> -.*Error: .*rv32e does not support the `f' extension
>
> base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
> --
> 2.34.1
>
>
Tsukasa OI Nov. 5, 2022, 11:49 a.m. UTC | #2 
Ping.

c.f.: Original
<https://sourceware.org/pipermail/binutils/2022-October/123716.html>
c.f.: LGTM by Kito
<https://sourceware.org/pipermail/binutils/2022-October/123717.html>

Regards,
Tsukasa

On 2022/10/19 22:14, Tsukasa OI wrote:
> Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
> versions beginning with the version 20190608-Base-Ratified removed this
> restriction.  Because the 'E' extension is still a draft, the author chose
> to *just* remove the conflict (not checking the ISA version).
> 
> Note that, because RV32E is only used with a soft-float calling convention,
> there's no valid official ABI for RV32EF.  It means, even if we can assemble
> a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
> in an unmanaged state (outside ABI management).
> 
> The purpose of this commit is to suppress unnecessary errors while parsing
> an ISA string and/or disassembling, not to allow hard-float with RVE.
> 
> bfd/ChangeLog:
> 
> 	* elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
> 	because only older specifications disallowed it.
> 
> gas/ChangeLog:
> 
> 	* testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
> 	prohibited.
> 	* testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
> ---
>  bfd/elfxx-riscv.c                           | 7 -------
>  gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
>  gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
>  3 files changed, 12 deletions(-)
>  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
>  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
> 
> diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> index c89b1e53e92..334a63f0873 100644
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
>        rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
>        no_conflict = false;
>      }
> -  if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> -      && riscv_lookup_subset (rps->subset_list, "f", &subset))
> -    {
> -      rps->error_handler
> -        (_("rv32e does not support the `f' extension"));
> -      no_conflict = false;
> -    }
>    if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
>        && riscv_lookup_subset (rps->subset_list, "f", &subset))
>      {
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> deleted file mode 100644
> index d7b51c3c17d..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> +++ /dev/null
> @@ -1,3 +0,0 @@
> -#as: -march=rv32ef
> -#source: empty.s
> -#error_output: march-fail-rv32ef.l
> diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> deleted file mode 100644
> index e6d93f28fa5..00000000000
> --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> +++ /dev/null
> @@ -1,2 +0,0 @@
> -.*Assembler messages:
> -.*Error: .*rv32e does not support the `f' extension
> 
> base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
Nelson Chu Nov. 7, 2022, 3:48 a.m. UTC | #3 
OK, please commit since it looks good to Kito.

Thanks
Nelson

On Sat, Nov 5, 2022 at 7:50 PM Tsukasa OI <research_trasio@irq.a4lg.com> wrote:
>
> Ping.
>
> c.f.: Original
> <https://sourceware.org/pipermail/binutils/2022-October/123716.html>
> c.f.: LGTM by Kito
> <https://sourceware.org/pipermail/binutils/2022-October/123717.html>
>
> Regards,
> Tsukasa
>
> On 2022/10/19 22:14, Tsukasa OI wrote:
> > Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
> > versions beginning with the version 20190608-Base-Ratified removed this
> > restriction.  Because the 'E' extension is still a draft, the author chose
> > to *just* remove the conflict (not checking the ISA version).
> >
> > Note that, because RV32E is only used with a soft-float calling convention,
> > there's no valid official ABI for RV32EF.  It means, even if we can assemble
> > a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
> > in an unmanaged state (outside ABI management).
> >
> > The purpose of this commit is to suppress unnecessary errors while parsing
> > an ISA string and/or disassembling, not to allow hard-float with RVE.
> >
> > bfd/ChangeLog:
> >
> >       * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
> >       because only older specifications disallowed it.
> >
> > gas/ChangeLog:
> >
> >       * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
> >       prohibited.
> >       * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
> > ---
> >  bfd/elfxx-riscv.c                           | 7 -------
> >  gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 ---
> >  gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 --
> >  3 files changed, 12 deletions(-)
> >  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.d
> >  delete mode 100644 gas/testsuite/gas/riscv/march-fail-rv32ef.l
> >
> > diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
> > index c89b1e53e92..334a63f0873 100644
> > --- a/bfd/elfxx-riscv.c
> > +++ b/bfd/elfxx-riscv.c
> > @@ -1870,13 +1870,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
> >        rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
> >        no_conflict = false;
> >      }
> > -  if (riscv_lookup_subset (rps->subset_list, "e", &subset)
> > -      && riscv_lookup_subset (rps->subset_list, "f", &subset))
> > -    {
> > -      rps->error_handler
> > -        (_("rv32e does not support the `f' extension"));
> > -      no_conflict = false;
> > -    }
> >    if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
> >        && riscv_lookup_subset (rps->subset_list, "f", &subset))
> >      {
> > diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> > deleted file mode 100644
> > index d7b51c3c17d..00000000000
> > --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
> > +++ /dev/null
> > @@ -1,3 +0,0 @@
> > -#as: -march=rv32ef
> > -#source: empty.s
> > -#error_output: march-fail-rv32ef.l
> > diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> > deleted file mode 100644
> > index e6d93f28fa5..00000000000
> > --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
> > +++ /dev/null
> > @@ -1,2 +0,0 @@
> > -.*Assembler messages:
> > -.*Error: .*rv32e does not support the `f' extension
> >
> > base-commit: 2b06e59de0675c2cb526af2de6803dae29703d15
diff mbox series

Patch

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index c89b1e53e92..334a63f0873 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1870,13 +1870,6 @@  riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
       rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
       no_conflict = false;
     }
-  if (riscv_lookup_subset (rps->subset_list, "e", &subset)
-      && riscv_lookup_subset (rps->subset_list, "f", &subset))
-    {
-      rps->error_handler
-        (_("rv32e does not support the `f' extension"));
-      no_conflict = false;
-    }
   if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
       && riscv_lookup_subset (rps->subset_list, "f", &subset))
     {
diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
deleted file mode 100644
index d7b51c3c17d..00000000000
--- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d
+++ /dev/null
@@ -1,3 +0,0 @@ 
-#as: -march=rv32ef
-#source: empty.s
-#error_output: march-fail-rv32ef.l
diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l
deleted file mode 100644
index e6d93f28fa5..00000000000
--- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l
+++ /dev/null
@@ -1,2 +0,0 @@ 
-.*Assembler messages:
-.*Error: .*rv32e does not support the `f' extension