[v2,13/14] x86: convert testcases to use .insn

Message ID 2b0ca132-9d85-86a8-8b91-828fa66881b8@suse.com
State Accepted
Headers
Series x86: new .insn directive |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Jan Beulich March 10, 2023, 10:26 a.m. UTC
  This can't be done for all insns currently encoded with .byte. For one
outside of 64-bit mode unused (typically ignored) register encoding bits
in VEX/XOP/EVEX prefixes can't be set to their non-default values, since
the necessary registers cannot be specified (and some of these bits
can't even be used outside of 64-bit mode). And then there are odd tests
like the first one in bad-bcast.s: Its purpose is to illegaly set EVEX.b
together with EVEX.W (which could be expressed; note though EVEX.W set
is invalid on its own), but then it also clears EVEX.B and EVEX.R' plus
it sets EVEX.vvvv to other than 0xf (rendering the test ambiguous,
because that's another #UD reason).

In {,x86-64-}disassem.s many bogus encodings exist - some with ModR/M
byte but insufficient displacement bytes, some using SIB encoding with
the SIB byte actually being the supposed immediate. Some of these could
be expressed by .insn, but I don't want to introduce bogus examples.
These will all need adjustment anyway once the disassembler is improved
in the way it deals with unrecognized encodings.

Generally generated code is meant to remain the same. {,x86-64-}nops.d
are exceptions because insn prefixes are emitted in a different order.
opcode{,-intel,-suffix}.d are also adjusted (along with an according
correction to opcode.s) to cover an apparent typo in the original tests
(xor when or was meant).

Where necessary --divide is added as gas option, to allow for the use
of the extension opcode functionality.

Comments are being adjusted where obviously wrong/misleading.
---
v2: Add --divide as necessary.
  

Comments

Clément Chigot April 20, 2023, 8:56 a.m. UTC | #1
Hi Jan,

> --- a/gas/testsuite/gas/i386/x86-64-opcode.s
> +++ b/gas/testsuite/gas/i386/x86-64-opcode.s
> @@ -458,16 +458,16 @@
>         int3
>         int    $0x90
>
> -       .byte 0xf6, 0xc9, 0x01
> -       .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
> -       .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
> -       .byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
> -       .byte 0xc0, 0xf0, 0x02
> -       .byte 0xc1, 0xf0, 0x01
> -       .byte 0x48, 0xc1, 0xf0, 0x01
> -       .byte 0xd0, 0xf0
> -       .byte 0xd1, 0xf0
> -       .byte 0x48, 0xd1, 0xf0
> -       .byte 0xd2, 0xf0
> -       .byte 0xd3, 0xf0
> -       .byte 0x48, 0xd3, 0xf0
> +       .insn 0xf6/1, $1, %cl
> +       .insn 0xf7/1, $2{:u16}, %cx
> +       .insn 0xf7/1, $4{:u32}, %ecx
> +       .insn 0xf7/1, $8{:s32}, %rcx
> +       .insn 0xc0/6, $2, %al
> +       .insn 0xc1/6, $1, %eax
> +       .insn 0xc1/6, $1, %rax
> +       .insn 0xd0/6, %al
> +       .insn 0xd1/6, %eax
> +       .insn 0xd1/6, %rax
> +       .insn 0xd2/6, %al
> +       .insn 0xd3/6, %eax
> +       .insn 0xd3/6, %rax

The test is failing on my side when building with --target=x86_64-elf.
I'm not sure what's wrong yet but gas seems to ignore everything after "/":
  | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
  |  ...
  |  4ea: f6 f7                div    %bh
  |  4ec: f7 f7                div    %edi
  |  4ee: c0 c1 c1              rol    $0xc1,%cl
  |  4f1: d0 d1                rcl    %cl
  |  4f3: d1 d2                rcl    %edx
  |  4f5: d3 d3                rcl    %cl,%ebx

Thanks,
Clément
  
Jan Beulich April 20, 2023, 9:01 a.m. UTC | #2
On 20.04.2023 10:56, Clément Chigot wrote:
>> --- a/gas/testsuite/gas/i386/x86-64-opcode.s
>> +++ b/gas/testsuite/gas/i386/x86-64-opcode.s
>> @@ -458,16 +458,16 @@
>>         int3
>>         int    $0x90
>>
>> -       .byte 0xf6, 0xc9, 0x01
>> -       .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
>> -       .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
>> -       .byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
>> -       .byte 0xc0, 0xf0, 0x02
>> -       .byte 0xc1, 0xf0, 0x01
>> -       .byte 0x48, 0xc1, 0xf0, 0x01
>> -       .byte 0xd0, 0xf0
>> -       .byte 0xd1, 0xf0
>> -       .byte 0x48, 0xd1, 0xf0
>> -       .byte 0xd2, 0xf0
>> -       .byte 0xd3, 0xf0
>> -       .byte 0x48, 0xd3, 0xf0
>> +       .insn 0xf6/1, $1, %cl
>> +       .insn 0xf7/1, $2{:u16}, %cx
>> +       .insn 0xf7/1, $4{:u32}, %ecx
>> +       .insn 0xf7/1, $8{:s32}, %rcx
>> +       .insn 0xc0/6, $2, %al
>> +       .insn 0xc1/6, $1, %eax
>> +       .insn 0xc1/6, $1, %rax
>> +       .insn 0xd0/6, %al
>> +       .insn 0xd1/6, %eax
>> +       .insn 0xd1/6, %rax
>> +       .insn 0xd2/6, %al
>> +       .insn 0xd3/6, %eax
>> +       .insn 0xd3/6, %rax
> 
> The test is failing on my side when building with --target=x86_64-elf.
> I'm not sure what's wrong yet but gas seems to ignore everything after "/":
>   | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
>   |  ...
>   |  4ea: f6 f7                div    %bh
>   |  4ec: f7 f7                div    %edi
>   |  4ee: c0 c1 c1              rol    $0xc1,%cl
>   |  4f1: d0 d1                rcl    %cl
>   |  4f3: d1 d2                rcl    %edx
>   |  4f5: d3 d3                rcl    %cl,%ebx

Right, and I think I did address all of these issues (there were more than
just here) in what was committed (and in fact already in v2), by passing
--divide to as. Can you confirm --divide does not take the intended effect
in that case?

Jan
  
Clément Chigot April 20, 2023, 9:09 a.m. UTC | #3
On Thu, Apr 20, 2023 at 11:01 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 20.04.2023 10:56, Clément Chigot wrote:
> >> --- a/gas/testsuite/gas/i386/x86-64-opcode.s
> >> +++ b/gas/testsuite/gas/i386/x86-64-opcode.s
> >> @@ -458,16 +458,16 @@
> >>         int3
> >>         int    $0x90
> >>
> >> -       .byte 0xf6, 0xc9, 0x01
> >> -       .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
> >> -       .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
> >> -       .byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
> >> -       .byte 0xc0, 0xf0, 0x02
> >> -       .byte 0xc1, 0xf0, 0x01
> >> -       .byte 0x48, 0xc1, 0xf0, 0x01
> >> -       .byte 0xd0, 0xf0
> >> -       .byte 0xd1, 0xf0
> >> -       .byte 0x48, 0xd1, 0xf0
> >> -       .byte 0xd2, 0xf0
> >> -       .byte 0xd3, 0xf0
> >> -       .byte 0x48, 0xd3, 0xf0
> >> +       .insn 0xf6/1, $1, %cl
> >> +       .insn 0xf7/1, $2{:u16}, %cx
> >> +       .insn 0xf7/1, $4{:u32}, %ecx
> >> +       .insn 0xf7/1, $8{:s32}, %rcx
> >> +       .insn 0xc0/6, $2, %al
> >> +       .insn 0xc1/6, $1, %eax
> >> +       .insn 0xc1/6, $1, %rax
> >> +       .insn 0xd0/6, %al
> >> +       .insn 0xd1/6, %eax
> >> +       .insn 0xd1/6, %rax
> >> +       .insn 0xd2/6, %al
> >> +       .insn 0xd3/6, %eax
> >> +       .insn 0xd3/6, %rax
> >
> > The test is failing on my side when building with --target=x86_64-elf.
> > I'm not sure what's wrong yet but gas seems to ignore everything after "/":
> >   | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
> >   |  ...
> >   |  4ea: f6 f7                div    %bh
> >   |  4ec: f7 f7                div    %edi
> >   |  4ee: c0 c1 c1              rol    $0xc1,%cl
> >   |  4f1: d0 d1                rcl    %cl
> >   |  4f3: d1 d2                rcl    %edx
> >   |  4f5: d3 d3                rcl    %cl,%ebx
>
> Right, and I think I did address all of these issues (there were more than
> just here) in what was committed (and in fact already in v2), by passing
> --divide to as. Can you confirm --divide does not take the intended effect
> in that case?

--divide is not passed to x86_64-opcode test.
But adding it resolves the issue:
  | $ ../as-new  --x32 --divide -J  -o tmpdir/x86-64-opcode.o
.../x86-64-opcode.s
  | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
  |  4ea: f6 c9 01              test   $0x1,%cl
  |  4ed: 66 f7 c9 02 00        test   $0x2,%cx
  |  4f2: f7 c9 04 00 00 00    test   $0x4,%ecx
  |  4f8: 48 f7 c9 08 00 00 00 test   $0x8,%rcx
  |  4ff: c0 f0 02              shl    $0x2,%al
  |  502: c1 f0 01              shl    $0x1,%eax
  |  505: 48 c1 f0 01          shl    $0x1,%rax
  |  509: d0 f0                shl    %al
  |  50b: d1 f0                shl    %eax
  |  50d: 48 d1 f0              shl    %rax
  |  510: d2 f0                shl    %cl,%al
  |  512: d3 f0                shl    %cl,%eax
  |  514: 48 d3 f0              shl    %cl,%rax
  
Jan Beulich April 20, 2023, 9:19 a.m. UTC | #4
On 20.04.2023 11:09, Clément Chigot wrote:
> On Thu, Apr 20, 2023 at 11:01 AM Jan Beulich <jbeulich@suse.com> wrote:
>>
>> On 20.04.2023 10:56, Clément Chigot wrote:
>>>> --- a/gas/testsuite/gas/i386/x86-64-opcode.s
>>>> +++ b/gas/testsuite/gas/i386/x86-64-opcode.s
>>>> @@ -458,16 +458,16 @@
>>>>         int3
>>>>         int    $0x90
>>>>
>>>> -       .byte 0xf6, 0xc9, 0x01
>>>> -       .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
>>>> -       .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
>>>> -       .byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
>>>> -       .byte 0xc0, 0xf0, 0x02
>>>> -       .byte 0xc1, 0xf0, 0x01
>>>> -       .byte 0x48, 0xc1, 0xf0, 0x01
>>>> -       .byte 0xd0, 0xf0
>>>> -       .byte 0xd1, 0xf0
>>>> -       .byte 0x48, 0xd1, 0xf0
>>>> -       .byte 0xd2, 0xf0
>>>> -       .byte 0xd3, 0xf0
>>>> -       .byte 0x48, 0xd3, 0xf0
>>>> +       .insn 0xf6/1, $1, %cl
>>>> +       .insn 0xf7/1, $2{:u16}, %cx
>>>> +       .insn 0xf7/1, $4{:u32}, %ecx
>>>> +       .insn 0xf7/1, $8{:s32}, %rcx
>>>> +       .insn 0xc0/6, $2, %al
>>>> +       .insn 0xc1/6, $1, %eax
>>>> +       .insn 0xc1/6, $1, %rax
>>>> +       .insn 0xd0/6, %al
>>>> +       .insn 0xd1/6, %eax
>>>> +       .insn 0xd1/6, %rax
>>>> +       .insn 0xd2/6, %al
>>>> +       .insn 0xd3/6, %eax
>>>> +       .insn 0xd3/6, %rax
>>>
>>> The test is failing on my side when building with --target=x86_64-elf.
>>> I'm not sure what's wrong yet but gas seems to ignore everything after "/":
>>>   | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
>>>   |  ...
>>>   |  4ea: f6 f7                div    %bh
>>>   |  4ec: f7 f7                div    %edi
>>>   |  4ee: c0 c1 c1              rol    $0xc1,%cl
>>>   |  4f1: d0 d1                rcl    %cl
>>>   |  4f3: d1 d2                rcl    %edx
>>>   |  4f5: d3 d3                rcl    %cl,%ebx
>>
>> Right, and I think I did address all of these issues (there were more than
>> just here) in what was committed (and in fact already in v2), by passing
>> --divide to as. Can you confirm --divide does not take the intended effect
>> in that case?
> 
> --divide is not passed to x86_64-opcode test.

Well, you continue to supply ambiguous information up to here; it only
becomes clear ...

> But adding it resolves the issue:
>   | $ ../as-new  --x32 --divide -J  -o tmpdir/x86-64-opcode.o

... here that what you mean is the ilp32/x86-64-opcode test (which is a
clone of the x86-64-opcode one). So yes, I did overlook the need to add
--divide there as well.

Jan

> .../x86-64-opcode.s
>   | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
>   |  4ea: f6 c9 01              test   $0x1,%cl
>   |  4ed: 66 f7 c9 02 00        test   $0x2,%cx
>   |  4f2: f7 c9 04 00 00 00    test   $0x4,%ecx
>   |  4f8: 48 f7 c9 08 00 00 00 test   $0x8,%rcx
>   |  4ff: c0 f0 02              shl    $0x2,%al
>   |  502: c1 f0 01              shl    $0x1,%eax
>   |  505: 48 c1 f0 01          shl    $0x1,%rax
>   |  509: d0 f0                shl    %al
>   |  50b: d1 f0                shl    %eax
>   |  50d: 48 d1 f0              shl    %rax
>   |  510: d2 f0                shl    %cl,%al
>   |  512: d3 f0                shl    %cl,%eax
>   |  514: 48 d3 f0              shl    %cl,%rax
  
Clément Chigot April 20, 2023, 9:22 a.m. UTC | #5
On Thu, Apr 20, 2023 at 11:19 AM Jan Beulich <jbeulich@suse.com> wrote:
>
> On 20.04.2023 11:09, Clément Chigot wrote:
> > On Thu, Apr 20, 2023 at 11:01 AM Jan Beulich <jbeulich@suse.com> wrote:
> >>
> >> On 20.04.2023 10:56, Clément Chigot wrote:
> >>>> --- a/gas/testsuite/gas/i386/x86-64-opcode.s
> >>>> +++ b/gas/testsuite/gas/i386/x86-64-opcode.s
> >>>> @@ -458,16 +458,16 @@
> >>>>         int3
> >>>>         int    $0x90
> >>>>
> >>>> -       .byte 0xf6, 0xc9, 0x01
> >>>> -       .byte 0x66, 0xf7, 0xc9, 0x02, 0x00
> >>>> -       .byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
> >>>> -       .byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
> >>>> -       .byte 0xc0, 0xf0, 0x02
> >>>> -       .byte 0xc1, 0xf0, 0x01
> >>>> -       .byte 0x48, 0xc1, 0xf0, 0x01
> >>>> -       .byte 0xd0, 0xf0
> >>>> -       .byte 0xd1, 0xf0
> >>>> -       .byte 0x48, 0xd1, 0xf0
> >>>> -       .byte 0xd2, 0xf0
> >>>> -       .byte 0xd3, 0xf0
> >>>> -       .byte 0x48, 0xd3, 0xf0
> >>>> +       .insn 0xf6/1, $1, %cl
> >>>> +       .insn 0xf7/1, $2{:u16}, %cx
> >>>> +       .insn 0xf7/1, $4{:u32}, %ecx
> >>>> +       .insn 0xf7/1, $8{:s32}, %rcx
> >>>> +       .insn 0xc0/6, $2, %al
> >>>> +       .insn 0xc1/6, $1, %eax
> >>>> +       .insn 0xc1/6, $1, %rax
> >>>> +       .insn 0xd0/6, %al
> >>>> +       .insn 0xd1/6, %eax
> >>>> +       .insn 0xd1/6, %rax
> >>>> +       .insn 0xd2/6, %al
> >>>> +       .insn 0xd3/6, %eax
> >>>> +       .insn 0xd3/6, %rax
> >>>
> >>> The test is failing on my side when building with --target=x86_64-elf.
> >>> I'm not sure what's wrong yet but gas seems to ignore everything after "/":
> >>>   | $ ../../binutils/objdump  -drw tmpdir/x86-64-opcode.o
> >>>   |  ...
> >>>   |  4ea: f6 f7                div    %bh
> >>>   |  4ec: f7 f7                div    %edi
> >>>   |  4ee: c0 c1 c1              rol    $0xc1,%cl
> >>>   |  4f1: d0 d1                rcl    %cl
> >>>   |  4f3: d1 d2                rcl    %edx
> >>>   |  4f5: d3 d3                rcl    %cl,%ebx
> >>
> >> Right, and I think I did address all of these issues (there were more than
> >> just here) in what was committed (and in fact already in v2), by passing
> >> --divide to as. Can you confirm --divide does not take the intended effect
> >> in that case?
> >
> > --divide is not passed to x86_64-opcode test.
>
> Well, you continue to supply ambiguous information up to here; it only
> becomes clear ...
>
> > But adding it resolves the issue:
> >   | $ ../as-new  --x32 --divide -J  -o tmpdir/x86-64-opcode.o
>
> ... here that what you mean is the ilp32/x86-64-opcode test (which is a
> clone of the x86-64-opcode one). So yes, I did overlook the need to add
> --divide there as well.

Oh yeah my bad. This is indeed ilp32 version of the test:
 FAIL: x86-64 (ILP32) opcode

Sorry about the confusion by not stating it earlier :(
  

Patch

--- a/gas/testsuite/gas/i386/amd.s
+++ b/gas/testsuite/gas/i386/amd.s
@@ -32,4 +32,4 @@  foo:
 
 # This is a 3DNow! instruction, with a prefix, that isn't quite right
 # Everything's good bar the opcode suffix
-.byte 0x2e, 0x0f, 0x0f, 0x54, 0xc3, 0x07, 0xc3
+ .insn 0x0f0f, $0xc3, %cs:7(%ebx,%eax,8), %mm2
--- a/gas/testsuite/gas/i386/avx512f-nondef.s
+++ b/gas/testsuite/gas/i386/avx512f-nondef.s
@@ -1,27 +1,28 @@ 
 # Check if objdump works correctly when some bits in instruction
 # has non-default value
 
-# vrndscalesd	{sae}, $123, %xmm4, %xmm5, %xmm6{%k7}	 # with null RC
-.byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
+	 vrndscalesd	$123, {sae}, %xmm4, %xmm5, %xmm6{%k7} # with null RC
 # vrndscalesd	{sae}, $123, %xmm4, %xmm5, %xmm6{%k7}	 # with not-null RC
-.byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with 11 EVEX.{B,R'}
-.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
+	.insn EVEX.66.0f3a.W1 0x0b, $123, {ru-sae}, %xmm4, %xmm5, %xmm6{%k7}
+
+	 vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with 11 EVEX.{B,R'}
 # vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with not-11 EVEX.{B,R'}
 .byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
 # vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with set EVEX.b bit
-.byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
-# vpmovdb	%zmm6, 2032(%rdx)		# with unset EVEX.b bit
-.byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
-# vpmovdb	%zmm6, 2032(%rdx)		# with set EVEX.b bit - we should get (bad) operand
-.byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
+	.insn EVEX.66.0F38.W0 0x3b, {rn-sae}, %zmm4, %zmm5, %zmm6{%k7}
+
+	 vpmovdb	%zmm6, 2032(%edx)	# with unset EVEX.b bit
+# vpmovdb	%zmm6, 2032(%edx)		# with set EVEX.b bit - we should get (bad) operand
+	.insn EVEX.f3.0f38.W0 0x31, %zmm6, 2032(%edx){1to4}
+
 # vaddps xmm0, xmm0, xmm3 # with EVEX.z set
 .byte 0x62, 0xf1, 0x7c, 0x88, 0x58, 0xc3
+
 # vgatherdps (%ecx), %zmm0{%k7}			# without SIB / index register
-.byte 0x62, 0xf2, 0x7d, 0x4f, 0x92, 0x01
+	.insn EVEX.66.0F38.W0 0x92, (%ecx), %zmm0{%k7}
 # vgatherdps (%bx,%xmm?), %zmm0{%k7}		# with 16-bit addressing
-.byte 0x67, 0x62, 0xf2, 0x7d, 0x4f, 0x92, 0x01
+	.insn EVEX.66.0F38.W0 0x92, (%bx,%di), %zmm0{%k7}
 # vgatherdps (%eax,%zmm1), %zmm0{%k7}{z}	# with set EVEX.z
-.byte 0x62, 0xf2, 0x7d, 0xcf, 0x92, 0x04, 0x08
+	.insn EVEX.66.0F38.W0 0x92, (%eax,%zmm1), %zmm0{%k7}{z}
 # vgatherdps (%eax,%zmm1), %zmm0		# without actual mask register
-.byte 0x62, 0xf2, 0x7d, 0x48, 0x92, 0x04, 0x08
+	.insn EVEX.66.0F38.W0 0x92, (%eax,%zmm1), %zmm0
--- a/gas/testsuite/gas/i386/cdr.s
+++ b/gas/testsuite/gas/i386/cdr.s
@@ -1,14 +1,7 @@ 
 	.text
 start:
-	.byte 0x0f
-	.byte 0x22
-	.byte 0x1f
-	.byte 0x0f
-	.byte 0x20
-	.byte 0x1f
-	.byte 0x0f
-	.byte 0x21
-	.byte 0x1f
-	.byte 0x0f
-	.byte 0x23
-	.byte 0x1f
+	.code32
+	.insn 0x0f22, (%edi), %cr3
+	.insn 0x0f20, %cr3, (%edi)
+	.insn 0x0f21, %db3, (%edi)
+	.insn 0x0f23, (%edi), %db3
--- a/gas/testsuite/gas/i386/disassem.d
+++ b/gas/testsuite/gas/i386/disassem.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -drw
 #name: opcodes with invalid modrm byte
 
--- a/gas/testsuite/gas/i386/disassem.s
+++ b/gas/testsuite/gas/i386/disassem.s
@@ -1,124 +1,124 @@ 
 .text
-.byte 0xFF, 0xEF
-.byte 0xFF, 0xD8
+	.insn 0xFF/5, %edi
+	.insn 0xFF/3, %eax
 .fill 0x5, 0x1, 0x90
 .byte 0xC5, 0xEC, 0x4A, 0x9B
 .byte 0xC5, 0xEC, 0x4A, 0x6F
-.byte 0xC5, 0xEC, 0x4A, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x4a, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x4A, 0x9B
 .byte 0xC5, 0xED, 0x4A, 0x6F
-.byte 0xC5, 0xED, 0x4A, 0x3F
+	.insn VEX.L1.66.0f.W0 0x4a, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x4A, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x4a, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x4A, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x4A, 0x3F
+	.insn VEX.L1.66.0f.W1 0x4a, (%edi), %k2, %k7
 .byte 0xC5, 0xEC, 0x41, 0x9B
 .byte 0xC5, 0xEC, 0x41, 0x6F
-.byte 0xC5, 0xEC, 0x41, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x41, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x41, 0x9B
 .byte 0xC5, 0xED, 0x41, 0x6F
-.byte 0xC5, 0xED, 0x41, 0x3F
+	.insn VEX.L1.66.0f.W0 0x41, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x41, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x41, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x41, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x41, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x41, 0x3F
+	.insn VEX.L1.66.0f.W1 0x41, (%edi), %k2, %k7
 .byte 0xC5, 0xEC, 0x42, 0x9B
 .byte 0xC5, 0xEC, 0x42, 0x6F
-.byte 0xC5, 0xEC, 0x42, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x42, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x42, 0x9B
 .byte 0xC5, 0xED, 0x42, 0x6F
-.byte 0xC5, 0xED, 0x42, 0x3F
+	.insn VEX.L1.66.0f.W0 0x42, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x42, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x42, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x42, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x42, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x42, 0x3F
+	.insn VEX.L1.66.0f.W1 0x42, (%edi), %k2, %k7
 .byte 0xC5, 0xEC, 0x4B, 0x9B
 .byte 0xC5, 0xEC, 0x4B, 0x6F
-.byte 0xC5, 0xEC, 0x4B, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x4b, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x4B, 0x9B
 .byte 0xC5, 0xED, 0x4B, 0x6F
-.byte 0xC5, 0xED, 0x4B, 0x3F
+	.insn VEX.L1.66.0f.W0 0x4b, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x4B, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x4B, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x4b, (%edi), %k2, %k7
 .byte 0xC5, 0xF8, 0x44, 0x9B
 .byte 0xC5, 0xF8, 0x44, 0x6F
-.byte 0xC5, 0xF8, 0x44, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x44, (%edi), %k7
 .byte 0xC5, 0xF9, 0x44, 0x9B
 .byte 0xC5, 0xF9, 0x44, 0x6F
-.byte 0xC5, 0xF9, 0x44, 0x3F
+	.insn VEX.L0.66.0f.W0 0x44, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF8, 0x44, 0x9B
 .byte 0xC4, 0xE1, 0xF8, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x44, 0x3F
+	.insn VEX.L0.NP.0f.W1 0x44, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x44, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x44, 0x3F
+	.insn VEX.L0.66.0f.W1 0x44, (%edi), %k7
 .byte 0xC5, 0xEC, 0x45, 0x9B
 .byte 0xC5, 0xEC, 0x45, 0x6F
-.byte 0xC5, 0xEC, 0x45, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x45, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x45, 0x9B
 .byte 0xC5, 0xED, 0x45, 0x6F
-.byte 0xC5, 0xED, 0x45, 0x3F
+	.insn VEX.L1.66.0f.W0 0x45, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x45, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x45, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x45, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x45, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x45, 0x3F
+	.insn VEX.L1.66.0f.W1 0x45, (%edi), %k2, %k7
 .byte 0xC5, 0xF8, 0x98, 0x9B
 .byte 0xC5, 0xF8, 0x98, 0x6F
-.byte 0xC5, 0xF8, 0x98, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x98, (%edi), %k7
 .byte 0xC5, 0xF9, 0x98, 0x9B
 .byte 0xC5, 0xF9, 0x98, 0x6F
-.byte 0xC5, 0xF9, 0x98, 0x3F
+	.insn VEX.L0.66.0f.W0 0x98, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF8, 0x98, 0x9B
 .byte 0xC4, 0xE1, 0xF8, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x98, 0x3F
+	.insn VEX.L0.NP.0f.W1 0x98, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x98, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x98, 0x3F
+	.insn VEX.L0.66.0f.W1 0x98, (%edi), %k7
 .byte 0xC5, 0xEC, 0x46, 0x9B
 .byte 0xC5, 0xEC, 0x46, 0x6F
-.byte 0xC5, 0xEC, 0x46, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x46, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x46, 0x9B
 .byte 0xC5, 0xED, 0x46, 0x6F
-.byte 0xC5, 0xED, 0x46, 0x3F
+	.insn VEX.L1.66.0f.W0 0x46, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x46, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x46, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x46, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x46, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x46, 0x3F
+	.insn VEX.L1.66.0f.W1 0x46, (%edi), %k2, %k7
 .byte 0xC5, 0xEC, 0x47, 0x9B
 .byte 0xC5, 0xEC, 0x47, 0x6F
-.byte 0xC5, 0xEC, 0x47, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x47, (%edi), %k2, %k7
 .byte 0xC5, 0xED, 0x47, 0x9B
 .byte 0xC5, 0xED, 0x47, 0x6F
-.byte 0xC5, 0xED, 0x47, 0x3F
+	.insn VEX.L1.66.0f.W0 0x47, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x47, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x47, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x47, (%edi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x47, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x47, 0x3F
+	.insn VEX.L1.66.0f.W1 0x47, (%edi), %k2, %k7
 .byte 0xC5, 0xF8, 0x99, 0x9B
 .byte 0xC5, 0xF8, 0x99, 0x6F
-.byte 0xC5, 0xF8, 0x99, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x99, (%edi), %k7
 .byte 0xC5, 0xF9, 0x99, 0x9B
 .byte 0xC5, 0xF9, 0x99, 0x6F
-.byte 0xC5, 0xF9, 0x99, 0x3F
+	.insn VEX.L0.66.0f.W0 0x99, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF8, 0x99, 0x9B
 .byte 0xC4, 0xE1, 0xF8, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x99, 0x3F
+	.insn VEX.L0.NP.0f.W1 0x99, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x99, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x99, 0x3F
+	.insn VEX.L0.66.0f.W1 0x99, (%edi), %k7
 .byte 0xC4, 0xE3, 0xF9, 0x30, 0x8F, 0x01
 .byte 0xC4, 0xE3, 0xF9, 0x30, 0x6A, 0x01
 .byte 0xC4, 0xE3, 0xF9, 0x30, 0x04, 0x01
@@ -145,33 +145,34 @@ 
 .byte 0xC4, 0xE3, 0x79, 0x33, 0x04, 0x01
 .byte 0xC5, 0xF8, 0x92, 0x9B
 .byte 0xC5, 0xF8, 0x92, 0x6F
-.byte 0xC5, 0xF8, 0x92, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x92, (%edi), %k7
 .byte 0xC5, 0xF9, 0x92, 0x9B
 .byte 0xC5, 0xF9, 0x92, 0x6F
-.byte 0xC5, 0xF9, 0x92, 0x3F
+	.insn VEX.L0.66.0f.W0 0x92, (%edi), %k7
 .byte 0xC5, 0xFB, 0x92, 0x9B
 .byte 0xC5, 0xFB, 0x92, 0x6F
-.byte 0xC5, 0xFB, 0x92, 0x3F
+	.insn VEX.L0.f2.0f.W0 0x92, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x92, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x92, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x92, 0x3F
+	.insn VEX.L0.66.0f.W1 0x92, (%edi), %k7
 .byte 0xC5, 0xF8, 0x93, 0x9B
 .byte 0xC5, 0xF8, 0x93, 0x6F
-.byte 0xC5, 0xF8, 0x93, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x93, (%edi), %k7
 .byte 0xC5, 0xF9, 0x93, 0x9B
 .byte 0xC5, 0xF9, 0x93, 0x6F
-.byte 0xC5, 0xF9, 0x93, 0x3F
+	.insn VEX.L0.66.0f.W0 0x93, (%edi), %k7
 .byte 0xC5, 0xFB, 0x93, 0x9B
 .byte 0xC5, 0xFB, 0x93, 0x6F
-.byte 0xC5, 0xFB, 0x93, 0x3F
+	.insn VEX.L0.f2.0f.W0 0x93, (%edi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x93, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x93, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x93, 0x3F
+	.insn VEX.L0.66.0f.W1 0x93, (%edi), %k7
 .byte 0xc4, 0xe2, 0x1, 0x1c, 0x41, 0x37
 .byte 0x62, 0xf2, 0xad, 0x08, 0x1c, 0x01
 .byte 0x1
-.byte 0x62, 0xf3, 0x7d, 0x28, 0x1b, 0xc8, 0x25
+	.insn EVEX.66.0f3a.W0 0x1b, $0x25, %ymm0, %xmm1
 .byte 0x62, 0xf3
-.byte 0x62, 0xf3, 0x75, 0x08, 0x23, 0xc2, 0x25
+//.byte 0x62, 0xf3, 0x75, 0x08, 0x23, 0xc2, 0x25
+	.insn EVEX.66.0f3a.W0 0x23, $0x25, %xmm2, %xmm1, %xmm0
 .byte 0x62
-.byte 0x62, 0xf2, 0x7d, 0x28, 0x5b, 0x41, 0x37
+	.insn EVEX.66.0f38.W0 0x5b, 0x37(%ecx){:d1}, %ymm0
--- a/gas/testsuite/gas/i386/evex.s
+++ b/gas/testsuite/gas/i386/evex.s
@@ -3,14 +3,14 @@ 
 	.allow_index_reg
 	.text
 _start:
-	.byte 0x62, 0xf1, 0xd6, 0x38, 0x2a, 0xf0
-	.byte 0x62, 0xf1, 0x57, 0x38, 0x2a, 0xf0
-	.byte 0x62, 0xf1, 0xd7, 0x38, 0x2a, 0xf0
-	.byte 0x62, 0xf1, 0xd6, 0x08, 0x7b, 0xf0
-	.byte 0x62, 0xf1, 0x57, 0x08, 0x7b, 0xf0
-	.byte 0x62, 0xf1, 0xd7, 0x08, 0x7b, 0xf0
-	.byte 0x62, 0xf1, 0xd6, 0x38, 0x7b, 0xf0
-	.byte 0x62, 0xf1, 0x57, 0x38, 0x7b, 0xf0
-	.byte 0x62, 0xf1, 0xd7, 0x38, 0x7b, 0xf0
+	.insn EVEX.LIG.F3.0F.W1 0x2a, %eax,{rd-sae},%xmm5,%xmm6
+	.insn EVEX.LIG.F2.0F.W0 0x2a, %eax,{rd-sae},%xmm5,%xmm6
+	.insn EVEX.LIG.F2.0F.W1 0x2a, %eax,{rd-sae},%xmm5,%xmm6
+	.insn EVEX.LIG.F3.0F.W1 0x7b, %eax,%xmm5,%xmm6
+	.insn EVEX.LIG.F2.0F.W0 0x7b, %eax,%xmm5,%xmm6
+	.insn EVEX.LIG.F2.0F.W1 0x7b, %eax,%xmm5,%xmm6
+	.insn EVEX.LIG.F3.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
+	.insn EVEX.LIG.F2.0F.W0 0x7b, %eax,{rd-sae},%xmm5,%xmm6
+	.insn EVEX.LIG.F2.0F.W1 0x7b, %eax,{rd-sae},%xmm5,%xmm6
 	.byte 0x62, 0xe1, 0x7e, 0x08, 0x2d, 0xc0
 	.byte 0x62, 0xe1, 0x7c, 0x08, 0xc2, 0xc0, 0x00
--- a/gas/testsuite/gas/i386/fpu-bad.d
+++ b/gas/testsuite/gas/i386/fpu-bad.d
@@ -1,4 +1,4 @@ 
-#as: --32
+#as: --32 --divide
 #objdump: -dw
 #name: i386 fpu bad opcodes
 
--- a/gas/testsuite/gas/i386/fpu-bad.s
+++ b/gas/testsuite/gas/i386/fpu-bad.s
@@ -1,4 +1,3 @@ 
 	.text
 start:
-	.byte 0xdd
-	.byte 0xf0
+	.insn 0xdd/6, %st(0)
--- a/gas/testsuite/gas/i386/ilp32/x86-64-nops.d
+++ b/gas/testsuite/gas/i386/ilp32/x86-64-nops.d
@@ -1,63 +1,5 @@ 
 #source: ../x86-64-nops.s
+#as: --divide
 #objdump: -drw
 #name: x86-64 (ILP32) nops
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ 	]*[a-f0-9]+:	0f 1f 00             	nopl   \(%rax\)
-[ 	]*[a-f0-9]+:	0f 1f 40 00          	nopl   0x0\(%rax\)
-[ 	]*[a-f0-9]+:	0f 1f 44 00 00       	nopl   0x0\(%rax,%rax,1\)
-[ 	]*[a-f0-9]+:	66 0f 1f 44 00 00    	nopw   0x0\(%rax,%rax,1\)
-[ 	]*[a-f0-9]+:	0f 1f 80 00 00 00 00 	nopl   0x0\(%rax\)
-[ 	]*[a-f0-9]+:	0f 1f 84 00 00 00 00 00 	nopl   0x0\(%rax,%rax,1\)
-[ 	]*[a-f0-9]+:	66 0f 1f 84 00 00 00 00 00 	nopw   0x0\(%rax,%rax,1\)
-[ 	]*[a-f0-9]+:	66 2e 0f 1f 84 00 00 00 00 00 	cs nopw 0x0\(%rax,%rax,1\)
-[ 	]*[a-f0-9]+:	0f 19 ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 1a ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 1b ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 1c ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 1d ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 1e ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 1f ff             	nop    %edi
-[ 	]*[a-f0-9]+:	0f 19 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1c 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1d 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1e 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 1f 5a 22          	nopl   0x22\(%rdx\)
-[ 	]*[a-f0-9]+:	0f 19 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1c 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1d 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1e 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 1f 9c 1d 11 22 33 44 	nopl   0x44332211\(%rbp,%rbx,1\)
-[ 	]*[a-f0-9]+:	0f 19 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1c 0c 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1d 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1e 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 1f 04 60          	nopl   \(%rax,%riz,2\)
-[ 	]*[a-f0-9]+:	0f 19 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1c 0c 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1d 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1e 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	0f 1f 04 59          	nopl   \(%rcx,%rbx,2\)
-[ 	]*[a-f0-9]+:	48 0f 1f c0          	nop    %rax
-[ 	]*[a-f0-9]+:	0f 1f c0             	nop    %eax
-[ 	]*[a-f0-9]+:	66 0f 1f c0          	nop    %ax
-[ 	]*[a-f0-9]+:	48 0f 1f 00          	nopq   \(%rax\)
-[ 	]*[a-f0-9]+:	0f 1f 00             	nopl   \(%rax\)
-[ 	]*[a-f0-9]+:	66 0f 1f 00          	nopw   \(%rax\)
-[ 	]*[a-f0-9]+:	48 0f 1f c0          	nop    %rax
-[ 	]*[a-f0-9]+:	0f 1f c0             	nop    %eax
-[ 	]*[a-f0-9]+:	66 0f 1f c0          	nop    %ax
-[ 	]*[a-f0-9]+:	49 0f 1f c2          	nop    %r10
-[ 	]*[a-f0-9]+:	41 0f 1f c2          	nop    %r10d
-[ 	]*[a-f0-9]+:	66 41 0f 1f c2       	nop    %r10w
-[ 	]*[a-f0-9]+:	49 0f 1f 02          	nopq   \(%r10\)
-[ 	]*[a-f0-9]+:	41 0f 1f 02          	nopl   \(%r10\)
-[ 	]*[a-f0-9]+:	66 41 0f 1f 02       	nopw   \(%r10\)
-[ 	]*[a-f0-9]+:	49 0f 1f c2          	nop    %r10
-[ 	]*[a-f0-9]+:	41 0f 1f c2          	nop    %r10d
-[ 	]*[a-f0-9]+:	66 41 0f 1f c2       	nop    %r10w
-#pass
+#dump: ../x86-64-nops.d
--- a/gas/testsuite/gas/i386/katmai.d
+++ b/gas/testsuite/gas/i386/katmai.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -dw
 #name: i386 katmai
 
--- a/gas/testsuite/gas/i386/katmai.s
+++ b/gas/testsuite/gas/i386/katmai.s
@@ -158,6 +158,6 @@  foo:
  prefetcht2	(%ecx)
 
 # A bad sfence modrm byte
-.byte 0x65,0x0F,0xAE,0xff
+	.insn gs 0x0FAE/7, %edi
 # Pad out to good alignment
  .p2align 4,0
--- a/gas/testsuite/gas/i386/mpx.s
+++ b/gas/testsuite/gas/i386/mpx.s
@@ -158,14 +158,10 @@  start:
 
 foo:	bnd ret
 
+	.att_syntax prefix
 bad:
 	# bndldx (%eax),(bad)
-	.byte 0x0f
-	.byte 0x1a
-	.byte 0x30
+	.insn 0x0f1a, (%eax), %esi
 
 	# bndmov (bad),%bnd0
-	.byte 0x66
-	.byte 0x0f
-	.byte 0x1a
-	.byte 0xc4
+	.insn 0x660f1a, %k4, %bnd0
--- a/gas/testsuite/gas/i386/nops.d
+++ b/gas/testsuite/gas/i386/nops.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -drw
 #name: i386 nops
 
@@ -13,7 +14,7 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 1f 80 00 00 00 00 	nopl   0x0\(%eax\)
 [ 	]*[a-f0-9]+:	0f 1f 84 00 00 00 00 00 	nopl   0x0\(%eax,%eax,1\)
 [ 	]*[a-f0-9]+:	66 0f 1f 84 00 00 00 00 00 	nopw   0x0\(%eax,%eax,1\)
-[ 	]*[a-f0-9]+:	66 2e 0f 1f 84 00 00 00 00 00 	nopw   %cs:0x0\(%eax,%eax,1\)
+[ 	]*[a-f0-9]+:	2e 66 0f 1f 84 00 00 00 00 00 	nopw   %cs:0x0\(%eax,%eax,1\)
 [ 	]*[a-f0-9]+:	0f 19 ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1a ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1b ff             	nop    %edi
--- a/gas/testsuite/gas/i386/nops.s
+++ b/gas/testsuite/gas/i386/nops.s
@@ -1,48 +1,49 @@ 
 	.text
 
-	.byte 0x0f, 0x1f, 0x0	
-	.byte 0x0f, 0x1f, 0x40, 0x0	
-	.byte 0x0f, 0x1f, 0x44, 0x0,  0x0	
-	.byte 0x66, 0x0f, 0x1f, 0x44, 0x0,  0x0	
-	.byte 0x0f, 0x1f, 0x80, 0x0,  0x0,  0x0, 0x0	
-	.byte 0x0f, 0x1f, 0x84, 0x0,  0x0,  0x0, 0x0, 0x0
-	.byte 0x66, 0x0f, 0x1f, 0x84, 0x0,  0x0, 0x0, 0x0, 0x0
-	.byte 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+	.insn 0x0f1f/0, (%eax)
+	.insn {disp8} 0x0f1f/0, 0(%eax)
+	.insn {disp8} 0x0f1f/0, 0(%eax,%eax)
+	.insn {disp8} data16 0x0f1f/0, 0(%eax,%eax)
+	.insn {disp32} 0x0f1f/0, 0(%eax)
+	.insn {disp32} 0x0f1f/0, 0(%eax,%eax)
+	.insn {disp32} data16 0x0f1f/0, 0(%eax,%eax)
+	.insn {disp32} data16 0x0f1f/0, %cs:0(%eax,%eax)
 
 	# reg,reg
-	.byte 0x0f, 0x19, 0xff
-	.byte 0x0f, 0x1a, 0xff  
-	.byte 0x0f, 0x1b, 0xff
-	.byte 0x0f, 0x1c, 0xff  
-	.byte 0x0f, 0x1d, 0xff
-	.byte 0x0f, 0x1e, 0xff  
-	.byte 0x0f, 0x1f, 0xff
+	.insn 0x0f19, %edi, %edi
+	.insn 0x0f1a, %edi, %edi
+	.insn 0x0f1b, %edi, %edi
+	.insn 0x0f1c, %edi, %edi
+	.insn 0x0f1d, %edi, %edi
+	.insn 0x0f1e, %edi, %edi
+	.insn 0x0f1f, %edi, %edi
 
 	# with base and imm8
-	.byte 0x0f, 0x19, 0x5A, 0x22
-	.byte 0x0f, 0x1c, 0x5A, 0x22
-	.byte 0x0f, 0x1d, 0x5A, 0x22
-	.byte 0x0f, 0x1e, 0x5A, 0x22
-	.byte 0x0f, 0x1f, 0x5A, 0x22
+	.insn 0x0f19/3, 0x22(%edx)
+	.insn 0x0f1c/3, 0x22(%edx)
+	.insn 0x0f1d/3, 0x22(%edx)
+	.insn 0x0f1e/3, 0x22(%edx)
+	.insn 0x0f1f/3, 0x22(%edx)
 
 	# with sib and imm32
-	.byte 0x0f, 0x19, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1c, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1d, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1e, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-
-	.byte 0x0f, 0x19, 0x04, 0x60
-	.byte 0x0f, 0x1c, 0x0c, 0x60
-	.byte 0x0f, 0x1d, 0x04, 0x60
-	.byte 0x0f, 0x1e, 0x04, 0x60
-	.byte 0x0f, 0x1f, 0x04, 0x60
-
-	.byte 0x0f, 0x19, 0x04, 0x59
-	.byte 0x0f, 0x1c, 0x0c, 0x59
-	.byte 0x0f, 0x1d, 0x04, 0x59
-	.byte 0x0f, 0x1e, 0x04, 0x59
-	.byte 0x0f, 0x1f, 0x04, 0x59
+	.insn 0x0f19/3, 0x44332211(%ebp,%ebx)
+	.insn 0x0f1c/3, 0x44332211(%ebp,%ebx)
+	.insn 0x0f1d/3, 0x44332211(%ebp,%ebx)
+	.insn 0x0f1e/3, 0x44332211(%ebp,%ebx)
+	.insn 0x0f1f/3, 0x44332211(%ebp,%ebx)
+
+	.allow_index_reg
+	.insn 0x0f19/0, (%eax,%eiz,2)
+	.insn 0x0f1c/1, (%eax,%eiz,2)
+	.insn 0x0f1d/0, (%eax,%eiz,2)
+	.insn 0x0f1e/0, (%eax,%eiz,2)
+	.insn 0x0f1f/0, (%eax,%eiz,2)
+
+	.insn 0x0f19/0, (%ecx,%ebx,2)
+	.insn 0x0f1c/1, (%ecx,%ebx,2)
+	.insn 0x0f1d/0, (%ecx,%ebx,2)
+	.insn 0x0f1e/0, (%ecx,%ebx,2)
+	.insn 0x0f1f/0, (%ecx,%ebx,2)
 
 	nop %eax
 	nop %ax
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -1,4 +1,4 @@ 
-#as: -J
+#as: -J --divide
 #objdump: -dw
 #name: i386 opcodes
 
@@ -597,7 +597,7 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df 38                	fistpll \(%eax\)
 [ 	]*[a-f0-9]+:	df 38                	fistpll \(%eax\)
  +[a-f0-9]+:	82 c3 01             	add    \$0x1,%bl
- +[a-f0-9]+:	82 f3 01             	xor    \$0x1,%bl
+ +[a-f0-9]+:	82 cb 01             	or     \$0x1,%bl
  +[a-f0-9]+:	82 d3 01             	adc    \$0x1,%bl
  +[a-f0-9]+:	82 db 01             	sbb    \$0x1,%bl
  +[a-f0-9]+:	82 e3 01             	and    \$0x1,%bl
--- a/gas/testsuite/gas/i386/opcode.s
+++ b/gas/testsuite/gas/i386/opcode.s
@@ -597,23 +597,23 @@  foo:
  fistpq (%eax)
  fistpll (%eax)
 
-	.byte 0x82, 0xc3, 0x01
-	.byte 0x82, 0xf3, 0x01
-	.byte 0x82, 0xd3, 0x01
-	.byte 0x82, 0xdb, 0x01
-	.byte 0x82, 0xe3, 0x01
-	.byte 0x82, 0xeb, 0x01
-	.byte 0x82, 0xf3, 0x01
-	.byte 0x82, 0xfb, 0x01
+	.insn 0x82/0, $1, %bl
+	.insn 0x82/1, $1, %bl
+	.insn 0x82/2, $1, %bl
+	.insn 0x82/3, $1, %bl
+	.insn 0x82/4, $1, %bl
+	.insn 0x82/5, $1, %bl
+	.insn 0x82/6, $1, %bl
+	.insn 0x82/7, $1, %bl
 
 	{evex} {store} vpextrw $0xab, %xmm5, %eax
 
-	.byte 0xf6, 0xc9, 0x01
-	.byte 0x66, 0xf7, 0xc9, 0x02, 0x00
-	.byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
-	.byte 0xc0, 0xf0, 0x02
-	.byte 0xc1, 0xf0, 0x01
-	.byte 0xd0, 0xf0
-	.byte 0xd1, 0xf0
-	.byte 0xd2, 0xf0
-	.byte 0xd3, 0xf0
+	.insn 0xf6/1, $1, %cl
+	.insn 0xf7/1, $2{:u16}, %cx
+	.insn 0xf7/1, $4{:u32}, %ecx
+	.insn 0xc0/6, $2, %al
+	.insn 0xc1/6, $1, %eax
+	.insn 0xd0/6, %al
+	.insn 0xd1/6, %eax
+	.insn 0xd2/6, %al
+	.insn 0xd3/6, %eax
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -1,5 +1,5 @@ 
 #source: opcode.s
-#as: -J
+#as: -J --divide
 #objdump: -dwMintel
 #name: i386 opcodes (Intel disassembly)
 
@@ -598,7 +598,7 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df 38                	fistp  QWORD PTR \[eax\]
 [ 	]*[a-f0-9]+:	df 38                	fistp  QWORD PTR \[eax\]
  +[a-f0-9]+:	82 c3 01             	add    bl,0x1
- +[a-f0-9]+:	82 f3 01             	xor    bl,0x1
+ +[a-f0-9]+:	82 cb 01             	or     bl,0x1
  +[a-f0-9]+:	82 d3 01             	adc    bl,0x1
  +[a-f0-9]+:	82 db 01             	sbb    bl,0x1
  +[a-f0-9]+:	82 e3 01             	and    bl,0x1
--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -1,5 +1,5 @@ 
 #source: opcode.s
-#as: -J
+#as: -J --divide
 #objdump: -dwMsuffix
 #name: i386 opcodes (w/ suffix)
 
@@ -598,7 +598,7 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	df 38                	fistpll \(%eax\)
 [ 	]*[a-f0-9]+:	df 38                	fistpll \(%eax\)
  +[a-f0-9]+:	82 c3 01             	addb   \$0x1,%bl
- +[a-f0-9]+:	82 f3 01             	xorb   \$0x1,%bl
+ +[a-f0-9]+:	82 cb 01             	orb    \$0x1,%bl
  +[a-f0-9]+:	82 d3 01             	adcb   \$0x1,%bl
  +[a-f0-9]+:	82 db 01             	sbbb   \$0x1,%bl
  +[a-f0-9]+:	82 e3 01             	andb   \$0x1,%bl
--- a/gas/testsuite/gas/i386/pr29483.s
+++ b/gas/testsuite/gas/i386/pr29483.s
@@ -1,3 +1,3 @@ 
 	.text
 pr29483:
-	.byte 0x65,0x62,0x62,0x7d,0x97,0xa0,0x94,0xff,0x20,0x20,0x20,0xae
+	.insn EVEX.128.66.0f38.W0 0xa0, %gs:-0x51dfdfe0(%rdi,%xmm23,8){1to4}, %xmm26{%k7}{z}
--- a/gas/testsuite/gas/i386/prefetch.d
+++ b/gas/testsuite/gas/i386/prefetch.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -dw
 #name: i386 prefetch
 
--- a/gas/testsuite/gas/i386/prefetch.s
+++ b/gas/testsuite/gas/i386/prefetch.s
@@ -1,18 +1,20 @@ 
+	.code32
+
 .macro try opcode:vararg
-	.byte \opcode, 0x00
-	.byte \opcode, 0x08
-	.byte \opcode, 0x10
-	.byte \opcode, 0x18
-	.byte \opcode, 0x20
-	.byte \opcode, 0x28
-	.byte \opcode, 0x30
-	.byte \opcode, 0x38
+	.insn 0x0f\opcode/0, (%eax)
+	.insn 0x0f\opcode/1, (%eax)
+	.insn 0x0f\opcode/2, (%eax)
+	.insn 0x0f\opcode/3, (%eax)
+	.insn 0x0f\opcode/4, (%eax)
+	.insn 0x0f\opcode/5, (%eax)
+	.insn 0x0f\opcode/6, (%eax)
+	.insn 0x0f\opcode/7, (%eax)
 .endm
 
 .text
 
 amd_prefetch:
-	try 0x0f, 0x0d
+	try 0d
 
 intel_prefetch:
-	try 0x0f, 0x18
+	try 18
--- a/gas/testsuite/gas/i386/prefetch-intel.d
+++ b/gas/testsuite/gas/i386/prefetch-intel.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -dw -Mintel
 #name: i386 prefetch (Intel disassembly)
 #source: prefetch.s
--- a/gas/testsuite/gas/i386/prefix.s
+++ b/gas/testsuite/gas/i386/prefix.s
@@ -336,59 +336,32 @@ 
 	int $3
 
 # "repz" vmovaps %xmm7, %xmm7
-	.byte 0xc5
-	.byte 0xfa
-	.byte 0x28
-	.byte 0xff
+	.insn VEX.128.f3.0f.W0 0x28, %xmm7, %xmm7
 
 	int $3
 
 # "repnz" {vex3} vmovaps %xmm7, %xmm7
-	.byte 0xc4
-	.byte 0xe1
-	.byte 0x7b
-	.byte 0x28
-	.byte 0xff
+	.insn {vex3} VEX.128.f2.0f.W0 0x28, %xmm7, %xmm7
 
 	int $3
 
 # "EVEX.W1" vmovaps %xmm7, %xmm7
-	.byte 0x62
-	.byte 0xf1
-	.byte 0xfc
-	.byte 0x08
-	.byte 0x28
-	.byte 0xff
+	.insn EVEX.128.0f.W1 0x28, %xmm7, %xmm7
 
 	int $3
 
 # "repz" vmovaps %xmm7, %xmm7
-	.byte 0x62
-	.byte 0xf1
-	.byte 0x7e
-	.byte 0x08
-	.byte 0x28
-	.byte 0xff
+	.insn EVEX.128.f3.0f.W0 0x28, %xmm7, %xmm7
 
 	int $3
 
 # "EVEX.W0" vmovapd %xmm7, %xmm7
-	.byte 0x62
-	.byte 0xf1
-	.byte 0x7d
-	.byte 0x08
-	.byte 0x28
-	.byte 0xff
+	.insn EVEX.128.66.0f.W0 0x28, %xmm7, %xmm7
 
 	int $3
 
 # "repnz" vmovapd %xmm7, %xmm7
-	.byte 0x62
-	.byte 0xf1
-	.byte 0xff
-	.byte 0x08
-	.byte 0x28
-	.byte 0xff
+	.insn EVEX.128.f2.0f.W1 0x28, %xmm7, %xmm7
 
 	int $3
 
--- a/gas/testsuite/gas/i386/x86-64-amx-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-amx-bad.s
@@ -1,63 +1,32 @@ 
 .text
 	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0xd2
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.128.F3.0F38.W1 0x5c, %tmm4, %tmm5, %tmm3
 	.fill 0x05, 0x01, 0x90
+
 	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x56
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.256.F3.0F38.W0 0x5c, %tmm4, %tmm5, %tmm3
 	.fill 0x05, 0x01, 0x90
+
 	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
-	.byte 0xc4
-	.byte 0x62
-	.byte 0x52
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.128.F3.0F38.W0 0x5c, %xmm4, %xmm5, %xmm11
+
 	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
-	.byte 0xc4
-	.byte 0xc2
-	.byte 0x52
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.128.F3.0F38.W0 0x5c, %xmm12, %xmm5, %xmm3
+
 	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x32
-	.byte 0x5c
-	.byte 0xdc
-	#tileloadd (%rax),%tmm1 set R/M= 001 (illegal value) without SIB.
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x7b
-	.byte 0x4b
-	.byte 0x09
+	.insn VEX.128.F3.0F38.W0 0x5c, %xmm4, %xmm9, %xmm3
+
+	#tileloadd (%rcx),%tmm1 set R/M= 001 (illegal value) without SIB.
+	.insn VEX.128.F2.0F38.W0 0x4b, (%rcx), %xmm1
+
 	#tdpbuud %tmm1,%tmm1,%tmm1 All 3 TMM registers can't be identical.
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x70
-	.byte 0x5e
-	.byte 0xc9
+	.insn VEX.128.NP.0F38.W0 0x5e, %tmm1, %tmm1, %tmm1
+
 	#tdpbuud %tmm0,%tmm1,%tmm1 All 3 TMM registers can't be identical.
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x78
-	.byte 0x5e
-	.byte 0xc9
+	.insn VEX.128.NP.0F38.W0 0x5e, %tmm1, %tmm0, %tmm1
+
 	#tdpbuud %tmm1,%tmm0,%tmm1 All 3 TMM registers can't be identical.
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x70
-	.byte 0x5e
-	.byte 0xc8
+	.insn VEX.128.NP.0F38.W0 0x5e, %tmm0, %tmm1, %tmm1
+
 	#tdpbuud %tmm1,%tmm1,%tmm0 All 3 TMM registers can't be identical.
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x70
-	.byte 0x5e
-	.byte 0xc1
+	.insn VEX.128.NP.0F38.W0 0x5e, %tmm1, %tmm1, %tmm0
--- a/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-amx-fp16-bad.s
@@ -2,34 +2,18 @@ 
 
 .text
 	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.W = 1 (illegal value).
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0xd3
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.128.F2.0F38.W1 0x5c, %tmm4, %tmm5, %tmm3
 	.fill 0x05, 0x01, 0x90
+
 	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.L = 1 (illegal value).
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x57
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.256.F2.0F38.W0 0x5c, %tmm4, %tmm5, %tmm3
 	.fill 0x05, 0x01, 0x90
+
 	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.R = 0 (illegal value).
-	.byte 0xc4
-	.byte 0x62
-	.byte 0x53
-	.byte 0x5c
-	.byte 0xdc
-	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
-	.byte 0xc4
-	.byte 0xc2
-	.byte 0x53
-	.byte 0x5c
-	.byte 0xdc
-	#tdpbf16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
-	.byte 0xc4
-	.byte 0xe2
-	.byte 0x33
-	.byte 0x5c
-	.byte 0xdc
+	.insn VEX.128.F2.0F38.W0 0x5c, %xmm4, %xmm5, %xmm11
+
+	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.B = 0 (illegal value).
+	.insn VEX.128.F2.0F38.W0 0x5c, %xmm12, %xmm5, %xmm3
+
+	#tdpfp16ps %tmm5,%tmm4,%tmm3 set VEX.VVVV = 0110 (illegal value).
+	.insn VEX.128.F2.0F38.W0 0x5c, %xmm4, %xmm9, %xmm3
--- a/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512f-nondef.s
@@ -1,17 +1,15 @@ 
 # Check if objdump works correctly when some bits in instruction
 # has non-default value
 
-# vrndscalesd	{sae}, $123, %xmm4, %xmm5, %xmm6{%k7}	 # with null RC
-.byte 0x62, 0xf3, 0xd5, 0x1f, 0x0b, 0xf4, 0x7b
+	vrndscalesd	$123, {sae}, %xmm4, %xmm5, %xmm6{%k7} # with null RC
 # vrndscalesd	{sae}, $123, %xmm4, %xmm5, %xmm6{%k7}	 # with not-null RC
-.byte 0x62, 0xf3, 0xd5, 0x5f, 0x0b, 0xf4, 0x7b
-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with 11 EVEX.{B,R'}
-.byte 0x62, 0xf2, 0x55, 0x4f, 0x3b, 0xf4
-# vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with not-11 EVEX.{B,R'}
-.byte 0x62, 0xc2, 0x55, 0x4f, 0x3b, 0xf4
+	.insn EVEX.66.0f3a.W1 0x0b, $123, {ru-sae}, %xmm4, %xmm5, %xmm6{%k7}
+
+	vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with 11 EVEX.{B,R'}
+	vpminud	%zmm12, %zmm5, %zmm22{%k7}	# with not-11 EVEX.{B,R'}
 # vpminud	%zmm4, %zmm5, %zmm6{%k7}	# with set EVEX.b bit
-.byte 0x62, 0xf2, 0x55, 0x1f, 0x3b, 0xf4
-# vpmovdb	%zmm6, 2032(%rdx)		# with unset EVEX.b bit
-.byte 0x62, 0xf2, 0x7e, 0x48, 0x31, 0x72, 0x7f
+	.insn EVEX.66.0F38.W0 0x3b, {rn-sae}, %zmm4, %zmm5, %zmm6{%k7}
+
+	vpmovdb	%zmm6, 2032(%rdx)		# with unset EVEX.b bit
 # vpmovdb	%zmm6, 2032(%rdx)		# with set EVEX.b bit - we should get (bad) operand
-.byte 0x62, 0xf2, 0x7e, 0x58, 0x31, 0x72, 0x7f
+	.insn EVEX.f3.0f38.W0 0x31, %zmm6, 2032(%rdx){1to4}
--- a/gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.s
@@ -1,36 +1,15 @@ 
 .text
 	#vfcmaddcph %zmm30, %zmm29, %zmm30 dest and src registers must be distinct.
-	.byte 0x62
-	.byte 0x06
-	.byte 0x17
-	.byte 0x40
-	.byte 0x56
-	.byte 0xf6
+	.insn EVEX.f2.M6.W0 0x56, %zmm30, %zmm29, %zmm30
+
 	#vfcmaddcph (%rcx), %zmm3, %zmm3 dest and src registers must be distinct.
-	.byte 0x62
-	.byte 0xf6
-	.byte 0x67
-	.byte 0x48
-	.byte 0x56
-	.byte 0x19
+	.insn EVEX.f2.M6.W0 0x56, (%rcx), %zmm3, %zmm3
+
 	#vfcmaddcph %xmm3, %xmm2, %xmm2 dest and src registers must be distinct.
-	.byte 0x62
-	.byte 0xf6
-	.byte 0x6f
-	.byte 0x08
-	.byte 0x56
-	.byte 0xd3
+	.insn EVEX.f2.M6.W0 0x56, %xmm3, %xmm2, %xmm2
+
 	#vfcmaddcsh %xmm3, %xmm2, %xmm3 dest and src registers must be distinct.
-	.byte 0x62
-	.byte 0xf6
-	.byte 0x6f
-	.byte 0x08
-	.byte 0x57
-	.byte 0xdb
+	.insn EVEX.LIG.f2.M6.W0 0x57, %xmm3, %xmm2, %xmm3
+
 	#vfcmaddcsh %xmm3, %xmm2, %xmm2 dest and src registers must be distinct.
-	.byte 0x62
-	.byte 0xf6
-	.byte 0x6f
-	.byte 0x08
-	.byte 0x57
-	.byte 0xd3
+	.insn EVEX.LIG.f2.M6.W0 0x57, %xmm3, %xmm2, %xmm2
--- a/gas/testsuite/gas/i386/x86-64-disassem.d
+++ b/gas/testsuite/gas/i386/x86-64-disassem.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -drw
 #name: x86-64 opcodes with invalid modrm byte
 
--- a/gas/testsuite/gas/i386/x86-64-disassem.s
+++ b/gas/testsuite/gas/i386/x86-64-disassem.s
@@ -1,124 +1,124 @@ 
 .text
-.byte 0xFF, 0xEF
-.byte 0xFF, 0xD8
+	.insn 0xFF/5, %edi
+	.insn 0xFF/3, %eax
 .fill 0x5, 0x1, 0x90
 .byte 0xC5, 0xEC, 0x4A, 0x9B
 .byte 0xC5, 0xEC, 0x4A, 0x6F
-.byte 0xC5, 0xEC, 0x4A, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x4a, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x4A, 0x9B
 .byte 0xC5, 0xED, 0x4A, 0x6F
-.byte 0xC5, 0xED, 0x4A, 0x3F
+	.insn VEX.L1.66.0f.W0 0x4a, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x4A, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4A, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x4a, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x4A, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x4A, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x4A, 0x3F
+	.insn VEX.L1.66.0f.W1 0x4a, (%rdi), %k2, %k7
 .byte 0xC5, 0xEC, 0x41, 0x9B
 .byte 0xC5, 0xEC, 0x41, 0x6F
-.byte 0xC5, 0xEC, 0x41, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x41, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x41, 0x9B
 .byte 0xC5, 0xED, 0x41, 0x6F
-.byte 0xC5, 0xED, 0x41, 0x3F
+	.insn VEX.L1.66.0f.W0 0x41, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x41, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x41, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x41, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x41, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x41, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x41, 0x3F
+	.insn VEX.L1.66.0f.W1 0x41, (%rdi), %k2, %k7
 .byte 0xC5, 0xEC, 0x42, 0x9B
 .byte 0xC5, 0xEC, 0x42, 0x6F
-.byte 0xC5, 0xEC, 0x42, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x42, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x42, 0x9B
 .byte 0xC5, 0xED, 0x42, 0x6F
-.byte 0xC5, 0xED, 0x42, 0x3F
+	.insn VEX.L1.66.0f.W0 0x42, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x42, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x42, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x42, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x42, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x42, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x42, 0x3F
+	.insn VEX.L1.66.0f.W1 0x42, (%rdi), %k2, %k7
 .byte 0xC5, 0xEC, 0x4B, 0x9B
 .byte 0xC5, 0xEC, 0x4B, 0x6F
-.byte 0xC5, 0xEC, 0x4B, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x4b, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x4B, 0x9B
 .byte 0xC5, 0xED, 0x4B, 0x6F
-.byte 0xC5, 0xED, 0x4B, 0x3F
+	.insn VEX.L1.66.0f.W0 0x4b, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x4B, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x4B, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x4B, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x4b, (%rdi), %k2, %k7
 .byte 0xC5, 0xF8, 0x44, 0x9B
 .byte 0xC5, 0xF8, 0x44, 0x6F
-.byte 0xC5, 0xF8, 0x44, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x44, (%rdi), %k7
 .byte 0xC5, 0xF9, 0x44, 0x9B
 .byte 0xC5, 0xF9, 0x44, 0x6F
-.byte 0xC5, 0xF9, 0x44, 0x3F
+	.insn VEX.L0.66.0f.W0 0x44, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF8, 0x44, 0x9B
 .byte 0xC4, 0xE1, 0xF8, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x44, 0x3F
+	.insn VEX.L0.NP.0f.W1 0x44, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x44, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x44, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x44, 0x3F
+	.insn VEX.L0.66.0f.W1 0x44, (%rdi), %k7
 .byte 0xC5, 0xEC, 0x45, 0x9B
 .byte 0xC5, 0xEC, 0x45, 0x6F
-.byte 0xC5, 0xEC, 0x45, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x45, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x45, 0x9B
 .byte 0xC5, 0xED, 0x45, 0x6F
-.byte 0xC5, 0xED, 0x45, 0x3F
+	.insn VEX.L1.66.0f.W0 0x45, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x45, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x45, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x45, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x45, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x45, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x45, 0x3F
+	.insn VEX.L1.66.0f.W1 0x45, (%rdi), %k2, %k7
 .byte 0xC5, 0xF8, 0x98, 0x9B
 .byte 0xC5, 0xF8, 0x98, 0x6F
-.byte 0xC5, 0xF8, 0x98, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x98, (%rdi), %k7
 .byte 0xC5, 0xF9, 0x98, 0x9B
 .byte 0xC5, 0xF9, 0x98, 0x6F
-.byte 0xC5, 0xF9, 0x98, 0x3F
+	.insn VEX.L0.66.0f.W0 0x98, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF8, 0x98, 0x9B
 .byte 0xC4, 0xE1, 0xF8, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x98, 0x3F
+	.insn VEX.L0.NP.0f.W1 0x98, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x98, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x98, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x98, 0x3F
+	.insn VEX.L0.66.0f.W1 0x98, (%rdi), %k7
 .byte 0xC5, 0xEC, 0x46, 0x9B
 .byte 0xC5, 0xEC, 0x46, 0x6F
-.byte 0xC5, 0xEC, 0x46, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x46, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x46, 0x9B
 .byte 0xC5, 0xED, 0x46, 0x6F
-.byte 0xC5, 0xED, 0x46, 0x3F
+	.insn VEX.L1.66.0f.W0 0x46, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x46, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x46, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x46, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x46, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x46, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x46, 0x3F
+	.insn VEX.L1.66.0f.W1 0x46, (%rdi), %k2, %k7
 .byte 0xC5, 0xEC, 0x47, 0x9B
 .byte 0xC5, 0xEC, 0x47, 0x6F
-.byte 0xC5, 0xEC, 0x47, 0x3F
+	.insn VEX.L1.NP.0f.W0 0x47, (%rdi), %k2, %k7
 .byte 0xC5, 0xED, 0x47, 0x9B
 .byte 0xC5, 0xED, 0x47, 0x6F
-.byte 0xC5, 0xED, 0x47, 0x3F
+	.insn VEX.L1.66.0f.W0 0x47, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xEC, 0x47, 0x9B
 .byte 0xC4, 0xE1, 0xEC, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xEC, 0x47, 0x3F
+	.insn VEX.L1.NP.0f.W1 0x47, (%rdi), %k2, %k7
 .byte 0xC4, 0xE1, 0xED, 0x47, 0x9B
 .byte 0xC4, 0xE1, 0xED, 0x47, 0x6F
-.byte 0xC4, 0xE1, 0xED, 0x47, 0x3F
+	.insn VEX.L1.66.0f.W1 0x47, (%rdi), %k2, %k7
 .byte 0xC5, 0xF8, 0x99, 0x9B
 .byte 0xC5, 0xF8, 0x99, 0x6F
-.byte 0xC5, 0xF8, 0x99, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x99, (%rdi), %k7
 .byte 0xC5, 0xF9, 0x99, 0x9B
 .byte 0xC5, 0xF9, 0x99, 0x6F
-.byte 0xC5, 0xF9, 0x99, 0x3F
+	.insn VEX.L0.66.0f.W0 0x99, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF8, 0x99, 0x9B
 .byte 0xC4, 0xE1, 0xF8, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF8, 0x99, 0x3F
+	.insn VEX.L0.NP.0f.W1 0x99, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x99, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x99, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x99, 0x3F
+	.insn VEX.L0.66.0f.W1 0x99, (%rdi), %k7
 .byte 0xC4, 0xE3, 0xF9, 0x30, 0x8F, 0x01
 .byte 0xC4, 0xE3, 0xF9, 0x30, 0x6A, 0x01
 .byte 0xC4, 0xE3, 0xF9, 0x30, 0x04, 0x01
@@ -145,33 +145,33 @@ 
 .byte 0xC4, 0xE3, 0x79, 0x33, 0x04, 0x01
 .byte 0xC5, 0xF8, 0x92, 0x9B
 .byte 0xC5, 0xF8, 0x92, 0x6F
-.byte 0xC5, 0xF8, 0x92, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x92, (%rdi), %k7
 .byte 0xC5, 0xF9, 0x92, 0x9B
 .byte 0xC5, 0xF9, 0x92, 0x6F
-.byte 0xC5, 0xF9, 0x92, 0x3F
+	.insn VEX.L0.66.0f.W0 0x92, (%rdi), %k7
 .byte 0xC5, 0xFB, 0x92, 0x9B
 .byte 0xC5, 0xFB, 0x92, 0x6F
-.byte 0xC5, 0xFB, 0x92, 0x3F
+	.insn VEX.L0.f2.0f.W0 0x92, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x92, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x92, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x92, 0x3F
+	.insn VEX.L0.66.0f.W1 0x92, (%rdi), %k7
 .byte 0xC5, 0xF8, 0x93, 0x9B
 .byte 0xC5, 0xF8, 0x93, 0x6F
-.byte 0xC5, 0xF8, 0x93, 0x3F
+	.insn VEX.L0.NP.0f.W0 0x93, (%rdi), %k7
 .byte 0xC5, 0xF9, 0x93, 0x9B
 .byte 0xC5, 0xF9, 0x93, 0x6F
-.byte 0xC5, 0xF9, 0x93, 0x3F
+	.insn VEX.L0.66.0f.W0 0x93, (%rdi), %k7
 .byte 0xC5, 0xFB, 0x93, 0x9B
 .byte 0xC5, 0xFB, 0x93, 0x6F
-.byte 0xC5, 0xFB, 0x93, 0x3F
+	.insn VEX.L0.f2.0f.W0 0x93, (%rdi), %k7
 .byte 0xC4, 0xE1, 0xF9, 0x93, 0x9B
 .byte 0xC4, 0xE1, 0xF9, 0x93, 0x6F
-.byte 0xC4, 0xE1, 0xF9, 0x93, 0x3F
-.byte 0xc4, 0x62, 0x1, 0x1c, 0x41, 0x37
-.byte 0x62, 0x72, 0xad, 0x08, 0x1c, 0x01
+	.insn VEX.L0.66.0f.W1 0x93, (%rdi), %k7
+	.insn VEX.66.0f38.W0 0x1c, 0x37(%rcx), %xmm15, %xmm8
+	.insn EVEX.66.0f38.W1 0x1c, (%rcx), %xmm10, %xmm8
 .byte 0x1
-.byte 0x62, 0xf3, 0x7d, 0x28, 0x1b, 0xc8, 0x25
+	.insn EVEX.66.0f3a.W0 0x1b, $0x25, %ymm0, %xmm1
 .byte 0x62, 0xf3
-.byte 0x62, 0xf3, 0x75, 0x08, 0x23, 0xc2, 0x25
+	.insn EVEX.66.0f3a.W0 0x23, $0x25, %xmm2, %xmm1, %xmm0
 .byte 0x62
-.byte 0x62, 0xf2, 0x7d, 0x28, 0x5b, 0x41, 0x37
+	.insn EVEX.66.0f38.W0 0x5b, 0x37(%rcx){:d1}, %ymm0
--- a/gas/testsuite/gas/i386/x86-64-mpx.s
+++ b/gas/testsuite/gas/i386/x86-64-mpx.s
@@ -215,35 +215,19 @@  start:
 
 foo:	bnd ret
 
+	.att_syntax prefix
 bad:
-	# bndldx (%eax),(bad)
-	.byte 0x0f
-	.byte 0x1a
-	.byte 0x30
+	# bndldx (%rax),(bad)
+	.insn 0x0f1a, (%rax), %esi
 
 	# bndmov (bad),%bnd0
-	.byte 0x66
-	.byte 0x0f
-	.byte 0x1a
-	.byte 0xc4
+	.insn 0x660f1a, %esp, %bnd0
 
 	# bndmov with REX.B set
-	.byte 0x66
-	.byte 0x41
-	.byte 0x0f
-	.byte 0x1a
-	.byte 0xc0
+	.insn 0x660f1a, %r8d, %bnd0
 
 	# bndmov with REX.R set
-	.byte 0x66
-	.byte 0x44
-	.byte 0x0f
-	.byte 0x1a
-	.byte 0xc0
+	.insn 0x660f1a, %bnd0, %r8d
 
 	# bndmk (bad),%bnd0
-	.byte 0xf3
-	.byte 0x0f
-	.byte 0x1b
-	.byte 0x05
-	.long 0x90909090
+	.insn 0xf30f1b, -0x6f6f6f70(%rip), %bnd0
--- a/gas/testsuite/gas/i386/x86-64-nops.d
+++ b/gas/testsuite/gas/i386/x86-64-nops.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -drw
 #name: x86-64 nops
 
@@ -13,7 +14,7 @@  Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 1f 80 00 00 00 00 	nopl   0x0\(%rax\)
 [ 	]*[a-f0-9]+:	0f 1f 84 00 00 00 00 00 	nopl   0x0\(%rax,%rax,1\)
 [ 	]*[a-f0-9]+:	66 0f 1f 84 00 00 00 00 00 	nopw   0x0\(%rax,%rax,1\)
-[ 	]*[a-f0-9]+:	66 2e 0f 1f 84 00 00 00 00 00 	cs nopw 0x0\(%rax,%rax,1\)
+[ 	]*[a-f0-9]+:	2e 66 0f 1f 84 00 00 00 00 00 	cs nopw 0x0\(%rax,%rax,1\)
 [ 	]*[a-f0-9]+:	0f 19 ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1a ff             	nop    %edi
 [ 	]*[a-f0-9]+:	0f 1b ff             	nop    %edi
--- a/gas/testsuite/gas/i386/x86-64-nops.s
+++ b/gas/testsuite/gas/i386/x86-64-nops.s
@@ -1,48 +1,49 @@ 
 	.text
 
-	.byte 0x0f, 0x1f, 0x0	
-	.byte 0x0f, 0x1f, 0x40, 0x0	
-	.byte 0x0f, 0x1f, 0x44, 0x0,  0x0	
-	.byte 0x66, 0x0f, 0x1f, 0x44, 0x0,  0x0	
-	.byte 0x0f, 0x1f, 0x80, 0x0,  0x0,  0x0, 0x0	
-	.byte 0x0f, 0x1f, 0x84, 0x0,  0x0,  0x0, 0x0, 0x0
-	.byte 0x66, 0x0f, 0x1f, 0x84, 0x0,  0x0, 0x0, 0x0, 0x0
-	.byte 0x66, 0x2e, 0x0f, 0x1f, 0x84, 0x0, 0x0, 0x0, 0x0, 0x0
+	.insn 0x0f1f/0, (%rax)
+	.insn {disp8} 0x0f1f/0, 0(%rax)
+	.insn {disp8} 0x0f1f/0, 0(%rax,%rax)
+	.insn {disp8} data16 0x0f1f/0, 0(%rax,%rax)
+	.insn {disp32} 0x0f1f/0, 0(%rax)
+	.insn {disp32} 0x0f1f/0, 0(%rax,%rax)
+	.insn {disp32} data16 0x0f1f/0, 0(%rax,%rax)
+	.insn {disp32} data16 0x0f1f/0, %cs:0(%rax,%rax)
 
 	# reg,reg
-	.byte 0x0f, 0x19, 0xff
-	.byte 0x0f, 0x1a, 0xff  
-	.byte 0x0f, 0x1b, 0xff
-	.byte 0x0f, 0x1c, 0xff  
-	.byte 0x0f, 0x1d, 0xff
-	.byte 0x0f, 0x1e, 0xff  
-	.byte 0x0f, 0x1f, 0xff
+	.insn 0x0f19, %edi, %edi
+	.insn 0x0f1a, %edi, %edi
+	.insn 0x0f1b, %edi, %edi
+	.insn 0x0f1c, %edi, %edi
+	.insn 0x0f1d, %edi, %edi
+	.insn 0x0f1e, %edi, %edi
+	.insn 0x0f1f, %edi, %edi
 
 	# with base and imm8
-	.byte 0x0f, 0x19, 0x5A, 0x22
-	.byte 0x0f, 0x1c, 0x5A, 0x22
-	.byte 0x0f, 0x1d, 0x5A, 0x22
-	.byte 0x0f, 0x1e, 0x5A, 0x22
-	.byte 0x0f, 0x1f, 0x5A, 0x22
+	.insn 0x0f19/3, 0x22(%rdx)
+	.insn 0x0f1c/3, 0x22(%rdx)
+	.insn 0x0f1d/3, 0x22(%rdx)
+	.insn 0x0f1e/3, 0x22(%rdx)
+	.insn 0x0f1f/3, 0x22(%rdx)
 
 	# with sib and imm32
-	.byte 0x0f, 0x19, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1c, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1d, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1e, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-	.byte 0x0f, 0x1f, 0x9C, 0x1D, 0x11, 0x22, 0x33, 0x44
-
-	.byte 0x0f, 0x19, 0x04, 0x60
-	.byte 0x0f, 0x1c, 0x0c, 0x60
-	.byte 0x0f, 0x1d, 0x04, 0x60
-	.byte 0x0f, 0x1e, 0x04, 0x60
-	.byte 0x0f, 0x1f, 0x04, 0x60
-
-	.byte 0x0f, 0x19, 0x04, 0x59
-	.byte 0x0f, 0x1c, 0x0c, 0x59
-	.byte 0x0f, 0x1d, 0x04, 0x59
-	.byte 0x0f, 0x1e, 0x04, 0x59
-	.byte 0x0f, 0x1f, 0x04, 0x59
+	.insn 0x0f19/3, 0x44332211(%rbp,%rbx)
+	.insn 0x0f1c/3, 0x44332211(%rbp,%rbx)
+	.insn 0x0f1d/3, 0x44332211(%rbp,%rbx)
+	.insn 0x0f1e/3, 0x44332211(%rbp,%rbx)
+	.insn 0x0f1f/3, 0x44332211(%rbp,%rbx)
+
+	.allow_index_reg
+	.insn 0x0f19/0, (%rax,%riz,2)
+	.insn 0x0f1c/1, (%rax,%riz,2)
+	.insn 0x0f1d/0, (%rax,%riz,2)
+	.insn 0x0f1e/0, (%rax,%riz,2)
+	.insn 0x0f1f/0, (%rax,%riz,2)
+
+	.insn 0x0f19/0, (%rcx,%rbx,2)
+	.insn 0x0f1c/1, (%rcx,%rbx,2)
+	.insn 0x0f1d/0, (%rcx,%rbx,2)
+	.insn 0x0f1e/0, (%rcx,%rbx,2)
+	.insn 0x0f1f/0, (%rcx,%rbx,2)
 
 	nop %rax
 	nop %eax
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -1,4 +1,4 @@ 
-#as: -J
+#as: -J --divide
 #objdump: -drw
 #name: x86-64 opcode
 
--- a/gas/testsuite/gas/i386/x86-64-opcode.s
+++ b/gas/testsuite/gas/i386/x86-64-opcode.s
@@ -458,16 +458,16 @@ 
 	int3
 	int    $0x90
 
-	.byte 0xf6, 0xc9, 0x01
-	.byte 0x66, 0xf7, 0xc9, 0x02, 0x00
-	.byte 0xf7, 0xc9, 0x04, 0x00, 0x00, 0x00
-	.byte 0x48, 0xf7, 0xc9, 0x08, 0x00, 0x00, 0x00
-	.byte 0xc0, 0xf0, 0x02
-	.byte 0xc1, 0xf0, 0x01
-	.byte 0x48, 0xc1, 0xf0, 0x01
-	.byte 0xd0, 0xf0
-	.byte 0xd1, 0xf0
-	.byte 0x48, 0xd1, 0xf0
-	.byte 0xd2, 0xf0
-	.byte 0xd3, 0xf0
-	.byte 0x48, 0xd3, 0xf0
+	.insn 0xf6/1, $1, %cl
+	.insn 0xf7/1, $2{:u16}, %cx
+	.insn 0xf7/1, $4{:u32}, %ecx
+	.insn 0xf7/1, $8{:s32}, %rcx
+	.insn 0xc0/6, $2, %al
+	.insn 0xc1/6, $1, %eax
+	.insn 0xc1/6, $1, %rax
+	.insn 0xd0/6, %al
+	.insn 0xd1/6, %eax
+	.insn 0xd1/6, %rax
+	.insn 0xd2/6, %al
+	.insn 0xd3/6, %eax
+	.insn 0xd3/6, %rax
--- a/gas/testsuite/gas/i386/x86-64-opcode-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-opcode-bad.s
@@ -1,10 +1,4 @@ 
 	.text
 # All the followings are bad opcodes for x86-64.
-	.byte 0xc5
-	.byte 0xac
-	.byte 0x46
-	.byte 0xf5
-	.byte 0xc5
-	.byte 0x2c
-	.byte 0x46
-	.byte 0xf5
+	.insn VEX.L1.0f 0x46, %k5, %r10d, %k6
+	.insn VEX.L1.0f 0x46, %k5, %r10d, %r14d
--- a/gas/testsuite/gas/i386/x86-64-prefetch.d
+++ b/gas/testsuite/gas/i386/x86-64-prefetch.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -dw
 #name: x86-64 prefetch
 #source: prefetch.s
--- a/gas/testsuite/gas/i386/x86-64-prefetch-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-prefetch-intel.d
@@ -1,3 +1,4 @@ 
+#as: --divide
 #objdump: -dw -Mintel
 #name: x86-64 prefetch (Intel disassembly)
 #source: prefetch.s
--- a/gas/testsuite/gas/i386/x86-64-prefetchi-inval-register.d
+++ b/gas/testsuite/gas/i386/x86-64-prefetchi-inval-register.d
@@ -1,4 +1,4 @@ 
-#as:
+#as: --divide
 #objdump: -dw
 #name: x86-64 PREFETCHI INVAL REGISTER insns
 
--- a/gas/testsuite/gas/i386/x86-64-prefetchi-inval-register.s
+++ b/gas/testsuite/gas/i386/x86-64-prefetchi-inval-register.s
@@ -1,9 +1,6 @@ 
 .text
         #prefetchit0 (%rcx) PREFETCHIT0/1 apply without RIP-relative addressing, should stay NOPs.
-        .byte 0x0f
-        .byte 0x18
-        .byte 0x39
+        .insn 0x0f18/7, (%rcx)
+
         #prefetchit1 (%rcx) PREFETCHIT1/1 apply without RIP-relative addressing, should stay NOPs.
-        .byte 0x0f
-        .byte 0x18
-        .byte 0x31
+        .insn 0x0f18/6, (%rcx)