diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 1ea12bf1ada..54362082d98 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -940,31 +940,31 @@ const struct riscv_opcode riscv_opcodes[] =
 {"wrs.sto",    0, INSN_CLASS_ZAWRS, "", MATCH_WRS_STO, MASK_WRS_STO, match_opcode, 0 },
 
 /* Zbb or zbkb instructions.  */
-{"clz",        0, INSN_CLASS_ZBB,  "d,s",   MATCH_CLZ, MASK_CLZ, match_opcode, 0 },
-{"ctz",        0, INSN_CLASS_ZBB,  "d,s",   MATCH_CTZ, MASK_CTZ, match_opcode, 0 },
-{"cpop",       0, INSN_CLASS_ZBB,  "d,s",   MATCH_CPOP, MASK_CPOP, match_opcode, 0 },
-{"min",        0, INSN_CLASS_ZBB,  "d,s,t", MATCH_MIN, MASK_MIN, match_opcode, 0 },
-{"max",        0, INSN_CLASS_ZBB,  "d,s,t", MATCH_MAX, MASK_MAX, match_opcode, 0 },
-{"minu",       0, INSN_CLASS_ZBB,  "d,s,t", MATCH_MINU, MASK_MINU, match_opcode, 0 },
-{"maxu",       0, INSN_CLASS_ZBB,  "d,s,t", MATCH_MAXU, MASK_MAXU, match_opcode, 0 },
-{"sext.b",     0, INSN_CLASS_ZBB,  "d,s",   MATCH_SEXT_B, MASK_SEXT_B, match_opcode, 0 },
-{"sext.b",     0, INSN_CLASS_I,         "d,s",   0, (int) M_SEXTB, match_never, INSN_MACRO },
-{"sext.h",     0, INSN_CLASS_ZBB,  "d,s",   MATCH_SEXT_H, MASK_SEXT_H, match_opcode, 0 },
-{"sext.h",     0, INSN_CLASS_I,         "d,s",   0, (int) M_SEXTH, match_never, INSN_MACRO },
-{"zext.h",    32, INSN_CLASS_ZBB,  "d,s",   MATCH_PACK, MASK_PACK | MASK_RS2, match_opcode, 0 },
-{"zext.h",    64, INSN_CLASS_ZBB,  "d,s",   MATCH_PACKW, MASK_PACKW | MASK_RS2, match_opcode, 0 },
-{"zext.h",     0, INSN_CLASS_I,         "d,s",   0, (int) M_ZEXTH, match_never, INSN_MACRO },
-{"orc.b",      0, INSN_CLASS_ZBB,  "d,s",   MATCH_GORCI | MATCH_SHAMT_ORC_B, MASK_GORCI | MASK_SHAMT, match_opcode, 0 },
-{"clzw",      64, INSN_CLASS_ZBB,  "d,s",   MATCH_CLZW, MASK_CLZW, match_opcode, 0 },
-{"ctzw",      64, INSN_CLASS_ZBB,  "d,s",   MATCH_CTZW, MASK_CTZW, match_opcode, 0 },
-{"cpopw",     64, INSN_CLASS_ZBB,  "d,s",   MATCH_CPOPW, MASK_CPOPW, match_opcode, 0 },
-{"brev8",     32, INSN_CLASS_ZBKB,  "d,s",      MATCH_GREVI | MATCH_SHAMT_BREV8, MASK_GREVI | MASK_SHAMT, match_opcode, 0 },
-{"brev8",     64, INSN_CLASS_ZBKB,  "d,s",      MATCH_GREVI | MATCH_SHAMT_BREV8, MASK_GREVI | MASK_SHAMT, match_opcode, 0 },
-{"zip",       32, INSN_CLASS_ZBKB,  "d,s",      MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
-{"unzip",     32, INSN_CLASS_ZBKB,  "d,s",      MATCH_UNSHFLI|MATCH_SHAMT_ZIP_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
-{"pack",       0, INSN_CLASS_ZBKB,  "d,s,t",    MATCH_PACK, MASK_PACK, match_opcode, 0 },
-{"packh",      0, INSN_CLASS_ZBKB,  "d,s,t",    MATCH_PACKH, MASK_PACKH, match_opcode, 0 },
-{"packw",     64, INSN_CLASS_ZBKB,  "d,s,t",    MATCH_PACKW, MASK_PACKW, match_opcode, 0 },
+{"clz",        0, INSN_CLASS_ZBB,          "d,s",   MATCH_CLZ, MASK_CLZ, match_opcode, 0 },
+{"ctz",        0, INSN_CLASS_ZBB,          "d,s",   MATCH_CTZ, MASK_CTZ, match_opcode, 0 },
+{"cpop",       0, INSN_CLASS_ZBB,          "d,s",   MATCH_CPOP, MASK_CPOP, match_opcode, 0 },
+{"min",        0, INSN_CLASS_ZBB,          "d,s,t", MATCH_MIN, MASK_MIN, match_opcode, 0 },
+{"max",        0, INSN_CLASS_ZBB,          "d,s,t", MATCH_MAX, MASK_MAX, match_opcode, 0 },
+{"minu",       0, INSN_CLASS_ZBB,          "d,s,t", MATCH_MINU, MASK_MINU, match_opcode, 0 },
+{"maxu",       0, INSN_CLASS_ZBB,          "d,s,t", MATCH_MAXU, MASK_MAXU, match_opcode, 0 },
+{"sext.b",     0, INSN_CLASS_ZBB,          "d,s",   MATCH_SEXT_B, MASK_SEXT_B, match_opcode, 0 },
+{"sext.b",     0, INSN_CLASS_I,            "d,s",   0, (int) M_SEXTB, match_never, INSN_MACRO },
+{"sext.h",     0, INSN_CLASS_ZBB,          "d,s",   MATCH_SEXT_H, MASK_SEXT_H, match_opcode, 0 },
+{"sext.h",     0, INSN_CLASS_I,            "d,s",   0, (int) M_SEXTH, match_never, INSN_MACRO },
+{"zext.h",    32, INSN_CLASS_ZBB,          "d,s",   MATCH_PACK, MASK_PACK | MASK_RS2, match_opcode, 0 },
+{"zext.h",    64, INSN_CLASS_ZBB,          "d,s",   MATCH_PACKW, MASK_PACKW | MASK_RS2, match_opcode, 0 },
+{"zext.h",     0, INSN_CLASS_I,            "d,s",   0, (int) M_ZEXTH, match_never, INSN_MACRO },
+{"orc.b",      0, INSN_CLASS_ZBB,          "d,s",   MATCH_GORCI | MATCH_SHAMT_ORC_B, MASK_GORCI | MASK_SHAMT, match_opcode, 0 },
+{"clzw",      64, INSN_CLASS_ZBB,          "d,s",   MATCH_CLZW, MASK_CLZW, match_opcode, 0 },
+{"ctzw",      64, INSN_CLASS_ZBB,          "d,s",   MATCH_CTZW, MASK_CTZW, match_opcode, 0 },
+{"cpopw",     64, INSN_CLASS_ZBB,          "d,s",   MATCH_CPOPW, MASK_CPOPW, match_opcode, 0 },
+{"brev8",     32, INSN_CLASS_ZBKB,         "d,s",   MATCH_GREVI | MATCH_SHAMT_BREV8, MASK_GREVI | MASK_SHAMT, match_opcode, 0 },
+{"brev8",     64, INSN_CLASS_ZBKB,         "d,s",   MATCH_GREVI | MATCH_SHAMT_BREV8, MASK_GREVI | MASK_SHAMT, match_opcode, 0 },
+{"zip",       32, INSN_CLASS_ZBKB,         "d,s",   MATCH_SHFLI|MATCH_SHAMT_ZIP_32, MASK_SHFLI|MASK_SHAMT, match_opcode, 0 },
+{"unzip",     32, INSN_CLASS_ZBKB,         "d,s",   MATCH_UNSHFLI|MATCH_SHAMT_ZIP_32, MASK_UNSHFLI|MASK_SHAMT, match_opcode, 0 },
+{"pack",       0, INSN_CLASS_ZBKB,         "d,s,t", MATCH_PACK, MASK_PACK, match_opcode, 0 },
+{"packh",      0, INSN_CLASS_ZBKB,         "d,s,t", MATCH_PACKH, MASK_PACKH, match_opcode, 0 },
+{"packw",     64, INSN_CLASS_ZBKB,         "d,s,t", MATCH_PACKW, MASK_PACKW, match_opcode, 0 },
 {"andn",       0, INSN_CLASS_ZBB_OR_ZBKB,  "d,s,t", MATCH_ANDN, MASK_ANDN, match_opcode, 0 },
 {"orn",        0, INSN_CLASS_ZBB_OR_ZBKB,  "d,s,t", MATCH_ORN, MASK_ORN, match_opcode, 0 },
 {"xnor",       0, INSN_CLASS_ZBB_OR_ZBKB,  "d,s,t", MATCH_XNOR, MASK_XNOR, match_opcode, 0 },
@@ -987,7 +987,7 @@ const struct riscv_opcode riscv_opcodes[] =
 {"sh2add.uw", 64, INSN_CLASS_ZBA,  "d,s,t", MATCH_SH2ADD_UW, MASK_SH2ADD_UW, match_opcode, 0 },
 {"sh3add.uw", 64, INSN_CLASS_ZBA,  "d,s,t", MATCH_SH3ADD_UW, MASK_SH3ADD_UW, match_opcode, 0 },
 {"zext.w",    64, INSN_CLASS_ZBA,  "d,s",   MATCH_ADD_UW, MASK_ADD_UW | MASK_RS2, match_opcode, INSN_ALIAS },
-{"zext.w",    64, INSN_CLASS_I, "d,s",       0, (int) M_ZEXTW, match_never, INSN_MACRO },
+{"zext.w",    64, INSN_CLASS_I,    "d,s",   0, (int) M_ZEXTW, match_never, INSN_MACRO },
 {"add.uw",    64, INSN_CLASS_ZBA,  "d,s,t", MATCH_ADD_UW, MASK_ADD_UW, match_opcode, 0 },
 {"slli.uw",   64, INSN_CLASS_ZBA,  "d,s,>", MATCH_SLLI_UW, MASK_SLLI_UW, match_opcode, 0 },
 
