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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id r1-20020ac85c81000000b00417d39dfc3esi4793349qta.755.2023.10.15.23.03.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Oct 2023 23:03:24 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@irq.a4lg.com header.s=2017s01 header.b=Wet56hmZ; arc=pass (i=1); spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=irq.a4lg.com Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 722C23857359 for ; Mon, 16 Oct 2023 06:03:23 +0000 (GMT) X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 5ED0B385841D for ; Mon, 16 Oct 2023 06:03:15 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 5ED0B385841D Authentication-Results: sourceware.org; dmarc=pass (p=none dis=none) header.from=irq.a4lg.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=irq.a4lg.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 5ED0B385841D Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2401:2500:203:30b:4000:6bfe:4757:0 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697436197; cv=none; b=WvTcu7yauE6PB5rUkvpVPMkQUHBSFHhdSESxmmZJedP8szn7SmWYwEfM4d6jfBDTfnxbDx76E6hddakzkviHsp6OcCpft7e+bGk2fVwIosCEcBPbpM3HWFs6sbUfDqLSwYeDYi/KmaL6nL4j83h3/Aj8BiS+TEmQC7E/ugyz2gI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1697436197; c=relaxed/simple; bh=P/kmpp7YIb5lPe0mKqxJR7LgjM3ooxx2lJi7NNCGWv8=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:Mime-Version; b=e3Ife+AHWNF3cyfo9NCqw74XpCAzdMiS/EA0uxfVNvOdk2TRQSL3tg+8hW8vxMNMF3+Ndsqky+ifrxO1z3hJSYDLMUR7AYn/L6wG+XH6ySJdd0D3GBUT9znghT+ouhvw0xnsaWBy3/gq9Y6Kfw0Hq5xlFCSKO82xj855yS6Dems= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id A7735300089; Mon, 16 Oct 2023 06:03:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=irq.a4lg.com; s=2017s01; t=1697436192; bh=1JjoaVuOLAvfkKqCy7UJGk5aNGt3SezS5AB1KexbgXk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Mime-Version:Content-Transfer-Encoding; b=Wet56hmZ4yuCr3I4WiGRfFaBG5OFz9RZpSKDOqls9XojqKQrPLi7LIh9AjM7o4rk7 x4/cWQ9yYw3UTnZJ/LqFGwwINrP9em+QTa53s4aYQFhnLYObergSDzHw6S3A6gVtpX jcAVU+EsdklasqeVMqvUOiw94gPL+uhssmFeyptA= From: Tsukasa OI To: Tsukasa OI , Palmer Dabbelt , Andrew Waterman , Jim Wilson , Nelson Chu , Kito Cheng Cc: binutils@sourceware.org Subject: [PATCH 2/2] RISC-V: Renumber internal-only [GT]PREL_[IS] reloc Date: Mon, 16 Oct 2023 06:02:37 +0000 Message-ID: <24acc029d54e6dc15ee302976be857d8b94d5170.1697436144.git.research_trasio@irq.a4lg.com> In-Reply-To: References: Mime-Version: 1.0 X-Spam-Status: No, score=-11.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, KAM_MANYTO, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779890865311526994 X-GMAIL-MSGID: 1779890865311526994 From: Tsukasa OI After ratification of the RISC-V psABI specification (version 1.0), it is getting enhanced and improved. Some commits include new relocation types: [1] [2] The latest draft of the RISC-V psABI specification started to use relocation types 47-49 [2] but some of them conflict with Binutils' internal-only relocation types: | N | psABI type (draft) | Binutils type | | -- | ------------------- | --------------- | | 47 | GPREL_LO12_I | R_RISCV_GPREL_I | | 48 | GPREL_LO12_S | R_RISCV_GPREL_S | | 49 | GPREL_HI20 | R_RISCV_TPREL_I | | 50 | (reserved) | R_RISCV_TPREL_S | Note that R_RISCV_GPREL_[IS] cannot be used for GPREL_LO12_[IS] because GPREL_LO12_[IS] do not allow rewrite to rd and internal R_RISCV_GPREL_[IS] are for single instruction sequence only (that's why we have both internal TPREL_[IS] and external TPREL_LO12_[IS]). We have to move at least 47-49 but for locality, we move R_RISCV_GPREL_[IS] from 47-48 to 41-42 and R_RISCV_TPREL_[IS] from 49-50 to 66-67 (note that 62-65 are reserved for other relocation types in the latest draft of RISC-V psABI [1]). It also notes all reserved relocation types as defined in the latest draft of RISC-V psABI. bfd/ChangeLog: * elfxx-riscv.c (howto_table): Reserve all defined relocation types as defined in the latest draft of RISC-V psABI. Move R_RISCV_[GT]PREL_[IS] to the empty spaces. include/ChangeLog: * elf/riscv.h (elf_riscv_reloc_type): Renumber R_RISCV_[GT]PREL_[IS] from 47-50 to 41, 42, 66 and 67. Comment all defined relocation types as defined in the latest draft of RISC-V psABI. --- bfd/elfxx-riscv.c | 138 +++++++++++++++++++++++++------------------- include/elf/riscv.h | 15 +++-- 2 files changed, 90 insertions(+), 63 deletions(-) diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index ffcdae341b2f..18fc638d05cb 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -601,9 +601,35 @@ static reloc_howto_type howto_table[] = MINUS_ONE, /* dst_mask */ false), /* pcrel_offset */ - /* 41 and 42 are reserved. */ - EMPTY_HOWTO (0), - EMPTY_HOWTO (0), + /* GP-relative load. */ + HOWTO (R_RISCV_GPREL_I, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_GPREL_I", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_ITYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ + + /* GP-relative store. */ + HOWTO (R_RISCV_GPREL_S, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_dont, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_GPREL_S", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_STYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ /* Indicates an alignment statement. The addend field encodes how many bytes of NOPs follow the statement. The desired alignment is the @@ -667,65 +693,17 @@ static reloc_howto_type howto_table[] = ENCODE_CITYPE_IMM (-1U), /* dst_mask */ false), /* pcrel_offset */ - /* GP-relative load. */ - HOWTO (R_RISCV_GPREL_I, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_dont, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_GPREL_I", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_ITYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* Reserved for R_RISCV_GPREL_LO12_I. */ + EMPTY_HOWTO (47), - /* GP-relative store. */ - HOWTO (R_RISCV_GPREL_S, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_dont, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_GPREL_S", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_STYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* Reserved for R_RISCV_GPREL_LO12_S. */ + EMPTY_HOWTO (48), - /* TP-relative TLS LE load. */ - HOWTO (R_RISCV_TPREL_I, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_TPREL_I", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_ITYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* Reserved for R_RISCV_GPREL_HI20. */ + EMPTY_HOWTO (49), - /* TP-relative TLS LE store. */ - HOWTO (R_RISCV_TPREL_S, /* type */ - 0, /* rightshift */ - 4, /* size */ - 32, /* bitsize */ - false, /* pc_relative */ - 0, /* bitpos */ - complain_overflow_signed, /* complain_on_overflow */ - bfd_elf_generic_reloc, /* special_function */ - "R_RISCV_TPREL_S", /* name */ - false, /* partial_inplace */ - 0, /* src_mask */ - ENCODE_STYPE_IMM (-1U), /* dst_mask */ - false), /* pcrel_offset */ + /* 50 is reserved. */ + EMPTY_HOWTO (50), /* The paired relocation may be relaxed. */ HOWTO (R_RISCV_RELAX, /* type */ @@ -879,6 +857,48 @@ static reloc_howto_type howto_table[] = 0, /* src_mask */ 0, /* dst_mask */ false), /* pcrel_offset */ + + /* Reserved for R_RISCV_TLSDESC_HI20. */ + EMPTY_HOWTO (62), + + /* Reserved for R_RISCV_TLSDESC_LOAD_LO12. */ + EMPTY_HOWTO (63), + + /* Reserved for R_RISCV_TLSDESC_ADD_LO12. */ + EMPTY_HOWTO (64), + + /* Reserved for R_RISCV_TLSDESC_CALL. */ + EMPTY_HOWTO (65), + + /* TP-relative TLS LE load. */ + HOWTO (R_RISCV_TPREL_I, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_TPREL_I", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_ITYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ + + /* TP-relative TLS LE store. */ + HOWTO (R_RISCV_TPREL_S, /* type */ + 0, /* rightshift */ + 4, /* size */ + 32, /* bitsize */ + false, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_signed, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + "R_RISCV_TPREL_S", /* name */ + false, /* partial_inplace */ + 0, /* src_mask */ + ENCODE_STYPE_IMM (-1U), /* dst_mask */ + false), /* pcrel_offset */ }; /* A mapping from BFD reloc types to RISC-V ELF reloc types. */ diff --git a/include/elf/riscv.h b/include/elf/riscv.h index 0aa8b3359c4c..6ae31f6a969a 100644 --- a/include/elf/riscv.h +++ b/include/elf/riscv.h @@ -71,14 +71,15 @@ START_RELOC_NUMBERS (elf_riscv_reloc_type) RELOC_NUMBER (R_RISCV_SUB16, 38) RELOC_NUMBER (R_RISCV_SUB32, 39) RELOC_NUMBER (R_RISCV_SUB64, 40) + RELOC_NUMBER (R_RISCV_GPREL_I, 41) + RELOC_NUMBER (R_RISCV_GPREL_S, 42) RELOC_NUMBER (R_RISCV_ALIGN, 43) RELOC_NUMBER (R_RISCV_RVC_BRANCH, 44) RELOC_NUMBER (R_RISCV_RVC_JUMP, 45) RELOC_NUMBER (R_RISCV_RVC_LUI, 46) - RELOC_NUMBER (R_RISCV_GPREL_I, 47) - RELOC_NUMBER (R_RISCV_GPREL_S, 48) - RELOC_NUMBER (R_RISCV_TPREL_I, 49) - RELOC_NUMBER (R_RISCV_TPREL_S, 50) + /* Reserved 47 for R_RISCV_GPREL_LO12_I. */ + /* Reserved 48 for R_RISCV_GPREL_LO12_S. */ + /* Reserved 49 for R_RISCV_GPREL_HI20. */ RELOC_NUMBER (R_RISCV_RELAX, 51) RELOC_NUMBER (R_RISCV_SUB6, 52) RELOC_NUMBER (R_RISCV_SET6, 53) @@ -90,6 +91,12 @@ START_RELOC_NUMBERS (elf_riscv_reloc_type) /* Reserved 59 for R_RISCV_PLT32. */ RELOC_NUMBER (R_RISCV_SET_ULEB128, 60) RELOC_NUMBER (R_RISCV_SUB_ULEB128, 61) + /* Reserved 62 for R_RISCV_TLSDESC_HI20. */ + /* Reserved 63 for R_RISCV_TLSDESC_LOAD_LO12. */ + /* Reserved 64 for R_RISCV_TLSDESC_ADD_LO12. */ + /* Reserved 65 for R_RISCV_TLSDESC_CALL. */ + RELOC_NUMBER (R_RISCV_TPREL_I, 66) + RELOC_NUMBER (R_RISCV_TPREL_S, 67) END_RELOC_NUMBERS (R_RISCV_max) /* Processor specific flags for the ELF header e_flags field. */